[llvm] [DAGTypeLegalizer] Add missing BR_CC handler for soft-promoted half operands (PR #196214)

[Tony Varghese via llvm-commits]

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@@ -0,0 +1,170 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:     -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-P9
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:     -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-P8
+
+; Basic comparison with branch
+define i32 @test_br_cc_olt(half %a, half %b) {
+; CHECK-P9-LABEL: test_br_cc_olt:
+; CHECK-P9:       # %bb.0:
+; CHECK-P9-NEXT:    clrlwi 3, 3, 16
+; CHECK-P9-NEXT:    clrlwi 4, 4, 16
+; CHECK-P9-NEXT:    mtfprwz 0, 4
+; CHECK-P9-NEXT:    mtfprwz 1, 3
+; CHECK-P9-NEXT:    xscvhpdp 0, 0
+; CHECK-P9-NEXT:    xscvhpdp 1, 1
+; CHECK-P9-NEXT:    fcmpu 0, 1, 0
+; CHECK-P9-NEXT:    bge 0, .LBB0_2
+; CHECK-P9-NEXT:  # %bb.1: # %if.then
+; CHECK-P9-NEXT:    li 3, 1
+; CHECK-P9-NEXT:    blr
+; CHECK-P9-NEXT:  .LBB0_2: # %if.else
+; CHECK-P9-NEXT:    li 3, 0
+; CHECK-P9-NEXT:    blr
+;
+; CHECK-P8-LABEL: test_br_cc_olt:
+; CHECK-P8:       # %bb.0:
+; CHECK-P8-NEXT:    mflr 0
+; CHECK-P8-NEXT:    .cfi_def_cfa_offset 64
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tonykuttai wrote:

done

https://github.com/llvm/llvm-project/pull/196214