[llvm] [AMDGPU] Optimize fneg and fsub with packed fp16 ops (PR #196659)
via llvm-commits
llvm-commits at lists.llvm.org
Fri May 8 15:50:23 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Changpeng Fang (changpeng)
<details>
<summary>Changes</summary>
pre-commit tests to show the issues
---
Patch is 32.56 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/196659.diff
1 Files Affected:
- (added) llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll (+685)
``````````diff
diff --git a/llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll b/llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
new file mode 100644
index 0000000000000..3b4ab84bc78f3
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
@@ -0,0 +1,685 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX950,GFX950-SDAG %s
+; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX950,GFX950-GISEL %s
+; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
+; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
+
+define <4 x half> @fadd_v4f16_neg(<4 x half> %first, <4 x half> %second) {
+; GFX950-SDAG-LABEL: fadd_v4f16_neg:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_add_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-SDAG-NEXT: v_pk_add_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: fadd_v4f16_neg:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v4, v0, v2
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v2, v1, v3
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v0, v4, v0
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v1, v2, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-SDAG-LABEL: fadd_v4f16_neg:
+; GFX1250-SDAG: ; %bb.0:
+; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1250-SDAG-NEXT: v_pk_add_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_add_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1250-GISEL-LABEL: fadd_v4f16_neg:
+; GFX1250-GISEL: ; %bb.0:
+; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v0.l, v0.l, v2.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v0.h, v0.h, v2.h
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v1.l, v1.l, v3.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v1.h, v1.h, v3.h
+; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %neg = fneg <4 x half> %second
+ %add = fadd <4 x half> %first, %neg
+ ret <4 x half> %add
+}
+
+define <8 x half> @fadd_v8f16_neg(<8 x half> %first, <8 x half> %second) {
+; GFX950-SDAG-LABEL: fadd_v8f16_neg:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_sub_f16_sdwa v8, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-SDAG-NEXT: v_sub_f16_sdwa v9, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-SDAG-NEXT: v_sub_f16_sdwa v10, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-SDAG-NEXT: v_sub_f16_sdwa v11, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-SDAG-NEXT: v_sub_f16_e32 v3, v3, v7
+; GFX950-SDAG-NEXT: v_sub_f16_e32 v2, v2, v6
+; GFX950-SDAG-NEXT: v_sub_f16_e32 v1, v1, v5
+; GFX950-SDAG-NEXT: v_sub_f16_e32 v0, v0, v4
+; GFX950-SDAG-NEXT: v_pack_b32_f16 v0, v0, v11
+; GFX950-SDAG-NEXT: v_pack_b32_f16 v1, v1, v10
+; GFX950-SDAG-NEXT: v_pack_b32_f16 v2, v2, v9
+; GFX950-SDAG-NEXT: v_pack_b32_f16 v3, v3, v8
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: fadd_v8f16_neg:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v8, v0, v4
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v4, v1, v5
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v5, v2, v6
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v6, v3, v7
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v3, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v0, v8, v0
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v1, v4, v1
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v2, v5, v2
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v3, v6, v3
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-SDAG-LABEL: fadd_v8f16_neg:
+; GFX1250-SDAG: ; %bb.0:
+; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v3.h, v3.h, v7.h
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v2.h, v2.h, v6.h
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v1.h, v1.h, v5.h
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v0.h, v0.h, v4.h
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v0.l, v0.l, v4.l
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v1.l, v1.l, v5.l
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v2.l, v2.l, v6.l
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v3.l, v3.l, v7.l
+; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1250-GISEL-LABEL: fadd_v8f16_neg:
+; GFX1250-GISEL: ; %bb.0:
+; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v0.l, v0.l, v4.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v0.h, v0.h, v4.h
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v1.l, v1.l, v5.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v1.h, v1.h, v5.h
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v2.l, v2.l, v6.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v2.h, v2.h, v6.h
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v3.l, v3.l, v7.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v3.h, v3.h, v7.h
+; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %neg = fneg <8 x half> %second
+ %add = fadd <8 x half> %first, %neg
+ ret <8 x half> %add
+}
+
+define <4 x half> @fsub_v4f16(<4 x half> %first, <4 x half> %second) {
+; GFX950-SDAG-LABEL: fsub_v4f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_add_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-SDAG-NEXT: v_pk_add_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: fsub_v4f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v4, v0, v2
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v2, v1, v3
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v0, v4, v0
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v1, v2, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-SDAG-LABEL: fsub_v4f16:
+; GFX1250-SDAG: ; %bb.0:
+; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1250-SDAG-NEXT: v_pk_add_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_add_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1250-GISEL-LABEL: fsub_v4f16:
+; GFX1250-GISEL: ; %bb.0:
+; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v0.l, v0.l, v2.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v0.h, v0.h, v2.h
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v1.l, v1.l, v3.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v1.h, v1.h, v3.h
+; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %sub = fsub <4 x half> %first, %second
+ ret <4 x half> %sub
+}
+
+define <8 x half> @fsub_v8f16(<8 x half> %first, <8 x half> %second) {
+; GFX950-SDAG-LABEL: fsub_v8f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_sub_f16_sdwa v8, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-SDAG-NEXT: v_sub_f16_sdwa v9, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-SDAG-NEXT: v_sub_f16_sdwa v10, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-SDAG-NEXT: v_sub_f16_sdwa v11, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-SDAG-NEXT: v_sub_f16_e32 v3, v3, v7
+; GFX950-SDAG-NEXT: v_sub_f16_e32 v2, v2, v6
+; GFX950-SDAG-NEXT: v_sub_f16_e32 v1, v1, v5
+; GFX950-SDAG-NEXT: v_sub_f16_e32 v0, v0, v4
+; GFX950-SDAG-NEXT: v_pack_b32_f16 v0, v0, v11
+; GFX950-SDAG-NEXT: v_pack_b32_f16 v1, v1, v10
+; GFX950-SDAG-NEXT: v_pack_b32_f16 v2, v2, v9
+; GFX950-SDAG-NEXT: v_pack_b32_f16 v3, v3, v8
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: fsub_v8f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v8, v0, v4
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v4, v1, v5
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v5, v2, v6
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_sub_f16_e32 v6, v3, v7
+; GFX950-GISEL-NEXT: v_sub_f16_sdwa v3, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v0, v8, v0
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v1, v4, v1
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v2, v5, v2
+; GFX950-GISEL-NEXT: v_pack_b32_f16 v3, v6, v3
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-SDAG-LABEL: fsub_v8f16:
+; GFX1250-SDAG: ; %bb.0:
+; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v3.h, v3.h, v7.h
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v2.h, v2.h, v6.h
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v1.h, v1.h, v5.h
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v0.h, v0.h, v4.h
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v0.l, v0.l, v4.l
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v1.l, v1.l, v5.l
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v2.l, v2.l, v6.l
+; GFX1250-SDAG-NEXT: v_sub_f16_e32 v3.l, v3.l, v7.l
+; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1250-GISEL-LABEL: fsub_v8f16:
+; GFX1250-GISEL: ; %bb.0:
+; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v0.l, v0.l, v4.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v0.h, v0.h, v4.h
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v1.l, v1.l, v5.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v1.h, v1.h, v5.h
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v2.l, v2.l, v6.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v2.h, v2.h, v6.h
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v3.l, v3.l, v7.l
+; GFX1250-GISEL-NEXT: v_sub_f16_e32 v3.h, v3.h, v7.h
+; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %sub = fsub <8 x half> %first, %second
+ ret <8 x half> %sub
+}
+
+define <2 x half> @fneg_v2f16(<2 x half> %first) {
+; GFX950-LABEL: fneg_v2f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_xor_b32_e32 v0, 0x80008000, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fneg_v2f16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_xor_b32_e32 v0, 0x80008000, v0
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %neg = fneg <2 x half> %first
+ ret <2 x half> %neg
+}
+
+define <4 x half> @fneg_v4f16(<4 x half> %first) {
+; GFX950-LABEL: fneg_v4f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_xor_b32_e32 v0, 0x80008000, v0
+; GFX950-NEXT: v_xor_b32_e32 v1, 0x80008000, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fneg_v4f16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_xor_b32_e32 v0, 0x80008000, v0
+; GFX1250-NEXT: v_xor_b32_e32 v1, 0x80008000, v1
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %neg = fneg <4 x half> %first
+ ret <4 x half> %neg
+}
+
+define <4 x half> @fmul_v4f16_neg(<4 x half> %first, <4 x half> %second) {
+; GFX950-LABEL: fmul_v4f16_neg:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fmul_v4f16_neg:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %neg = fneg <4 x half> %second
+ %mul = fmul <4 x half> %first, %neg
+ ret <4 x half> %mul
+}
+
+define <2 x half> @fabs_v2f16(<2 x half> %first) {
+; GFX950-LABEL: fabs_v2f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fabs_v2f16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %abs = tail call <2 x half> @llvm.fabs.v2f16(<2 x half> %first)
+ ret <2 x half> %abs
+}
+
+define <4 x half> @fabs_v4f16(<4 x half> %first) {
+; GFX950-LABEL: fabs_v4f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
+; GFX950-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fabs_v4f16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
+; GFX1250-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v1
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %abs = tail call <4 x half> @llvm.fabs.v4f16(<4 x half> %first)
+ ret <4 x half> %abs
+}
+
+define <2 x half> @fneg_fabs_v2f16(<2 x half> %first) {
+; GFX950-LABEL: fneg_fabs_v2f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_or_b32_e32 v0, 0x80008000, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fneg_fabs_v2f16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_or_b32_e32 v0, 0x80008000, v0
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %abs = tail call <2 x half> @llvm.fabs.v2f16(<2 x half> %first)
+ %neg = fneg <2 x half> %abs
+ ret <2 x half> %neg
+}
+
+define <4 x half> @fneg_fabs_v4f16(<4 x half> %first) {
+; GFX950-LABEL: fneg_fabs_v4f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_or_b32_e32 v0, 0x80008000, v0
+; GFX950-NEXT: v_or_b32_e32 v1, 0x80008000, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fneg_fabs_v4f16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_or_b32_e32 v0, 0x80008000, v0
+; GFX1250-NEXT: v_or_b32_e32 v1, 0x80008000, v1
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %abs = tail call <4 x half> @llvm.fabs.v4f16(<4 x half> %first)
+ %neg = fneg <4 x half> %abs
+ ret <4 x half> %neg
+}
+
+define <8 x half> @fmul_v8f16_neg(<8 x half> %first, <8 x half> %second) {
+; GFX950-LABEL: fmul_v8f16_neg:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_mul_f16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-NEXT: v_pk_mul_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-NEXT: v_pk_mul_f16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-NEXT: v_pk_mul_f16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fmul_v8f16_neg:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_pk_mul_f16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-NEXT: v_pk_mul_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-NEXT: v_pk_mul_f16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-NEXT: v_pk_mul_f16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %neg = fneg <8 x half> %second
+ %mul = fmul <8 x half> %first, %neg
+ ret <8 x half> %mul
+}
+
+define <4 x half> @fma_v4f16_neg(<4 x half> %first, <4 x half> %second, <4 x half> %third) {
+; GFX950-LABEL: fma_v4f16_neg:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_fma_f16 v0, v0, v2, v4 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX950-NEXT: v_pk_fma_f16 v1, v1, v3, v5 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fma_v4f16_neg:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_pk_fma_f16 v0, v0, v2, v4 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX1250-NEXT: v_pk_fma_f16 v1, v1, v3, v5 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %neg = fneg <4 x half> %second
+ %fma = tail call <4 x half> @llvm.fma.v4f16(<4 x half> %first, <4 x half> %neg, <4 x half> %third)
+ ret <4 x half> %fma
+}
+
+define <8 x half> @fma_v8f16_neg(<8 x half> %first, <8 x half> %second, <8 x half> %third) {
+; GFX950-LABEL: fma_v8f16_neg:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_fma_f16 v0, v0, v4, v8 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX950-NEXT: v_pk_fma_f16 v1, v1, v5, v9 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX950-NEXT: v_pk_fma_f16 v2, v2, v6, v10 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX950-NEXT: v_pk_fma_f16 v3, v3, v7, v11 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: fma_v8f16_neg:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_pk_fma_f16 v0, v0, v4, v8 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX1250-NEXT: v_pk_fma_f16 v1, v1, v5, v9 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX1250-NEXT: v_pk_fma_f16 v2, v2, v6, v10 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX1250-NEXT: v_pk_fma_f16 v3, v3, v7, v11 neg_lo:[0,1,0] neg_hi:[0,1,0]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %neg = fneg <8 x half> %second
+ %fma = tail call <8 x half> @llvm.fma.v8f16(<8 x half> %first, <8 x half> %neg, <8 x half> %third)
+ ret <8 x half> %fma
+}
+
+define <4 x half> @fminnum_v4f16_neg(<4 x half> %first, <4 x half> %second) {
+; GFX950-SDAG-LABEL: fminnum_v4f16_neg:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2 neg_lo:[1,1] neg_hi:[1,1]
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v3, v3 neg_lo:[1,1] neg_hi:[1,1]
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: fminnum_v4f16_neg:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/196659
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