[llvm] GlobalISel/Combiner: Fix building G_CONSTANT for fp extended LLT (PR #196397)
Petar Avramovic via llvm-commits
llvm-commits at lists.llvm.org
Fri May 8 01:07:32 PDT 2026
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/196397
>From 34ee97cb2a322ca9d235759b3690dff35e88806d Mon Sep 17 00:00:00 2001
From: Petar Avramovic <Petar.Avramovic at amd.com>
Date: Thu, 7 May 2026 20:55:53 +0200
Subject: [PATCH] GlobalISel/Combiner: Fix building G_CONSTANT for fp extended
LLT
---
.../lib/CodeGen/GlobalISel/CombinerHelper.cpp | 7 +-
.../AArch64/GlobalISel/combine-unmerge.mir | 17 +
.../test/CodeGen/AArch64/fptosi-sat-scalar.ll | 36 +-
.../test/CodeGen/AArch64/fptosi-sat-vector.ll | 411 ++++++++++--------
.../test/CodeGen/AArch64/fptoui-sat-scalar.ll | 34 +-
.../test/CodeGen/AArch64/fptoui-sat-vector.ll | 323 ++++++++------
6 files changed, 473 insertions(+), 355 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index c58fb84a3890e..1f3167741be6c 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -2360,7 +2360,12 @@ void CombinerHelper::applyCombineUnmergeConstant(
unsigned NumElems = MI.getNumOperands() - 1;
for (unsigned Idx = 0; Idx < NumElems; ++Idx) {
Register DstReg = MI.getOperand(Idx).getReg();
- Builder.buildConstant(DstReg, Csts[Idx]);
+ LLT DstTy = MRI.getType(DstReg);
+ if (DstTy.isFloat())
+ Builder.buildFConstant(DstReg,
+ APFloat(getFltSemanticForLLT(DstTy), Csts[Idx]));
+ else
+ Builder.buildConstant(DstReg, Csts[Idx]);
}
MI.eraseFromParent();
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
index f427f8648a301..df72a44a731e3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
@@ -613,3 +613,20 @@ body: |
%me:_(s128) = G_MERGE_VALUES %opaque(s64), %def
$q0 = COPY %me(s128)
...
+# Check that unmerged f64 constants use G_FCONSTANT
+---
+name: test_unmerge_fconstant
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: test_unmerge_fconstant
+ ; CHECK: [[C:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(f64) = G_FCONSTANT double -7.500000e+00
+ ; CHECK-NEXT: $x0 = COPY [[C]](f64)
+ ; CHECK-NEXT: $x1 = COPY [[C1]](f64)
+ ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1
+ %2:_(f128) = G_FCONSTANT fp128 f0xC01E0000000000000000000000000000
+ %25:_(f64), %26:_(f64) = G_UNMERGE_VALUES %2:_(f128)
+ $x0 = COPY %25:_(f64)
+ $x1 = COPY %26:_(f64)
+ RET_ReallyLR implicit $x0, implicit $x1
+...
diff --git a/llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll b/llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
index b6cbe9eb46389..bda283206251f 100644
--- a/llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
+++ b/llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
@@ -969,34 +969,38 @@ define i32 @test_signed_f128_i32(fp128 %f) {
; CHECK-GI-LABEL: test_signed_f128_i32:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: sub sp, sp, #48
-; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #16] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-GI-NEXT: .cfi_def_cfa_offset 48
; CHECK-GI-NEXT: .cfi_offset w19, -8
-; CHECK-GI-NEXT: .cfi_offset w20, -16
-; CHECK-GI-NEXT: .cfi_offset w30, -32
+; CHECK-GI-NEXT: .cfi_offset w30, -16
+; CHECK-GI-NEXT: .cfi_offset b8, -24
+; CHECK-GI-NEXT: .cfi_offset b9, -32
; CHECK-GI-NEXT: adrp x8, .LCPI30_1
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI30_1]
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x9, #-4603241769126068224 // =0xc01e000000000000
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, x9, gt
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov d1, #-7.50000000
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d1, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x19, d1
; CHECK-GI-NEXT: adrp x8, .LCPI30_0
-; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI30_0]
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: mov x8, #281474976448512 // =0xfffffffc0000
; CHECK-GI-NEXT: movk x8, #16413, lsl #48
-; CHECK-GI-NEXT: csel x8, x20, x8, mi
+; CHECK-GI-NEXT: csel x8, x19, x8, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
@@ -1004,9 +1008,9 @@ define i32 @test_signed_f128_i32(fp128 %f) {
; CHECK-GI-NEXT: mov v1.16b, v0.16b
; CHECK-GI-NEXT: bl __unordtf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: csel w0, wzr, w19, ne
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: add sp, sp, #48
; CHECK-GI-NEXT: ret
%x = call i32 @llvm.fptosi.sat.i32.f128(fp128 %f)
diff --git a/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll b/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
index 6a06d99689df9..506b720498e00 100644
--- a/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
+++ b/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
@@ -518,34 +518,38 @@ define <1 x i32> @test_signed_v1f128_v1i32(<1 x fp128> %f) {
; CHECK-GI-LABEL: test_signed_v1f128_v1i32:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: sub sp, sp, #48
-; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #16] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-GI-NEXT: .cfi_def_cfa_offset 48
; CHECK-GI-NEXT: .cfi_offset w19, -8
-; CHECK-GI-NEXT: .cfi_offset w20, -16
-; CHECK-GI-NEXT: .cfi_offset w30, -32
+; CHECK-GI-NEXT: .cfi_offset w30, -16
+; CHECK-GI-NEXT: .cfi_offset b8, -24
+; CHECK-GI-NEXT: .cfi_offset b9, -32
; CHECK-GI-NEXT: adrp x8, .LCPI14_1
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI14_1]
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x9, #-4603241769126068224 // =0xc01e000000000000
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, x9, gt
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov d1, #-7.50000000
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d1, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x19, d1
; CHECK-GI-NEXT: adrp x8, .LCPI14_0
-; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI14_0]
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: mov x8, #281474976448512 // =0xfffffffc0000
; CHECK-GI-NEXT: movk x8, #16413, lsl #48
-; CHECK-GI-NEXT: csel x8, x20, x8, mi
+; CHECK-GI-NEXT: csel x8, x19, x8, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
@@ -553,9 +557,9 @@ define <1 x i32> @test_signed_v1f128_v1i32(<1 x fp128> %f) {
; CHECK-GI-NEXT: mov v1.16b, v0.16b
; CHECK-GI-NEXT: bl __unordtf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: csel w8, wzr, w19, ne
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: add sp, sp, #48
; CHECK-GI-NEXT: ret
@@ -631,16 +635,19 @@ define <2 x i32> @test_signed_v2f128_v2i32(<2 x fp128> %f) {
;
; CHECK-GI-LABEL: test_signed_v2f128_v2i32:
; CHECK-GI: // %bb.0:
-; CHECK-GI-NEXT: sub sp, sp, #112
-; CHECK-GI-NEXT: str x30, [sp, #64] // 8-byte Spill
-; CHECK-GI-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 112
+; CHECK-GI-NEXT: sub sp, sp, #128
+; CHECK-GI-NEXT: str d10, [sp, #64] // 8-byte Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #80] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x21, [sp, #96] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill
+; CHECK-GI-NEXT: .cfi_def_cfa_offset 128
; CHECK-GI-NEXT: .cfi_offset w19, -8
; CHECK-GI-NEXT: .cfi_offset w20, -16
; CHECK-GI-NEXT: .cfi_offset w21, -24
-; CHECK-GI-NEXT: .cfi_offset w22, -32
-; CHECK-GI-NEXT: .cfi_offset w30, -48
+; CHECK-GI-NEXT: .cfi_offset w30, -32
+; CHECK-GI-NEXT: .cfi_offset b8, -40
+; CHECK-GI-NEXT: .cfi_offset b9, -48
+; CHECK-GI-NEXT: .cfi_offset b10, -64
; CHECK-GI-NEXT: adrp x8, .LCPI15_1
; CHECK-GI-NEXT: str q1, [sp, #48] // 16-byte Spill
; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI15_1]
@@ -648,25 +655,28 @@ define <2 x i32> @test_signed_v2f128_v2i32(<2 x fp128> %f) {
; CHECK-GI-NEXT: mov v1.16b, v2.16b
; CHECK-GI-NEXT: str q2, [sp, #16] // 16-byte Spill
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x20, #-4603241769126068224 // =0xc01e000000000000
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x21, x8, x20, gt
+; CHECK-GI-NEXT: fmov d10, #-7.50000000
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fcsel d1, d0, d10, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: adrp x8, .LCPI15_0
-; CHECK-GI-NEXT: mov v0.d[1], x21
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI15_0]
; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x22, #281474976448512 // =0xfffffffc0000
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
-; CHECK-GI-NEXT: movk x22, #16413, lsl #48
+; CHECK-GI-NEXT: mov x20, #281474976448512 // =0xfffffffc0000
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: movk x20, #16413, lsl #48
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x21, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x20, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Reload
@@ -678,20 +688,22 @@ define <2 x i32> @test_signed_v2f128_v2i32(<2 x fp128> %f) {
; CHECK-GI-NEXT: cmp w0, #0
; CHECK-GI-NEXT: csel w21, wzr, w19, ne
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d10, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x19, d1
; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, x20, gt
-; CHECK-GI-NEXT: mov v0.d[1], x20
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x20, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x20, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Reload
@@ -700,13 +712,14 @@ define <2 x i32> @test_signed_v2f128_v2i32(<2 x fp128> %f) {
; CHECK-GI-NEXT: bl __unordtf2
; CHECK-GI-NEXT: fmov s0, w21
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: ldr x30, [sp, #64] // 8-byte Reload
+; CHECK-GI-NEXT: ldr d10, [sp, #64] // 8-byte Reload
; CHECK-GI-NEXT: csel w8, wzr, w19, ne
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x30, x21, [sp, #96] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #80] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w8
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
-; CHECK-GI-NEXT: add sp, sp, #112
+; CHECK-GI-NEXT: add sp, sp, #128
; CHECK-GI-NEXT: ret
%x = call <2 x i32> @llvm.fptosi.sat.v2f128.v2i32(<2 x fp128> %f)
ret <2 x i32> %x
@@ -799,17 +812,21 @@ define <3 x i32> @test_signed_v3f128_v3i32(<3 x fp128> %f) {
;
; CHECK-GI-LABEL: test_signed_v3f128_v3i32:
; CHECK-GI: // %bb.0:
-; CHECK-GI-NEXT: sub sp, sp, #128
-; CHECK-GI-NEXT: stp x30, x23, [sp, #80] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x22, x21, [sp, #96] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 128
+; CHECK-GI-NEXT: sub sp, sp, #144
+; CHECK-GI-NEXT: str d10, [sp, #80] // 8-byte Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #88] // 16-byte Folded Spill
+; CHECK-GI-NEXT: str x30, [sp, #104] // 8-byte Spill
+; CHECK-GI-NEXT: stp x22, x21, [sp, #112] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x20, x19, [sp, #128] // 16-byte Folded Spill
+; CHECK-GI-NEXT: .cfi_def_cfa_offset 144
; CHECK-GI-NEXT: .cfi_offset w19, -8
; CHECK-GI-NEXT: .cfi_offset w20, -16
; CHECK-GI-NEXT: .cfi_offset w21, -24
; CHECK-GI-NEXT: .cfi_offset w22, -32
-; CHECK-GI-NEXT: .cfi_offset w23, -40
-; CHECK-GI-NEXT: .cfi_offset w30, -48
+; CHECK-GI-NEXT: .cfi_offset w30, -40
+; CHECK-GI-NEXT: .cfi_offset b8, -48
+; CHECK-GI-NEXT: .cfi_offset b9, -56
+; CHECK-GI-NEXT: .cfi_offset b10, -64
; CHECK-GI-NEXT: adrp x8, .LCPI16_1
; CHECK-GI-NEXT: str q1, [sp, #48] // 16-byte Spill
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI16_1]
@@ -817,25 +834,28 @@ define <3 x i32> @test_signed_v3f128_v3i32(<3 x fp128> %f) {
; CHECK-GI-NEXT: str q2, [sp, #64] // 16-byte Spill
; CHECK-GI-NEXT: str q1, [sp, #32] // 16-byte Spill
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x20, #-4603241769126068224 // =0xc01e000000000000
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x21, x8, x20, gt
+; CHECK-GI-NEXT: fmov d9, #-7.50000000
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d10, d1, d8, gt
+; CHECK-GI-NEXT: fcsel d1, d0, d9, gt
+; CHECK-GI-NEXT: fmov x8, d10
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: adrp x8, .LCPI16_0
-; CHECK-GI-NEXT: mov v0.d[1], x21
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI16_0]
; CHECK-GI-NEXT: str q1, [sp, #16] // 16-byte Spill
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x22, #281474976448512 // =0xfffffffc0000
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
-; CHECK-GI-NEXT: movk x22, #16413, lsl #48
+; CHECK-GI-NEXT: mov x21, #281474976448512 // =0xfffffffc0000
+; CHECK-GI-NEXT: fcsel d0, d10, d8, mi
+; CHECK-GI-NEXT: movk x21, #16413, lsl #48
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x21, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
@@ -844,22 +864,24 @@ define <3 x i32> @test_signed_v3f128_v3i32(<3 x fp128> %f) {
; CHECK-GI-NEXT: bl __unordtf2
; CHECK-GI-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel w21, wzr, w19, ne
+; CHECK-GI-NEXT: csel w20, wzr, w19, ne
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d10, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d10
+; CHECK-GI-NEXT: fcsel d1, d0, d9, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x19, d1
; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x23, x8, x20, gt
-; CHECK-GI-NEXT: mov v0.d[1], x23
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d10, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x23, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Reload
@@ -869,37 +891,41 @@ define <3 x i32> @test_signed_v3f128_v3i32(<3 x fp128> %f) {
; CHECK-GI-NEXT: ldr q0, [sp, #64] // 16-byte Reload
; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel w23, wzr, w19, ne
+; CHECK-GI-NEXT: csel w22, wzr, w19, ne
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #64] // 16-byte Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #64] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d10, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d10
+; CHECK-GI-NEXT: fcsel d1, d0, d9, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x19, d1
; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, x20, gt
-; CHECK-GI-NEXT: mov v0.d[1], x20
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d10, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x20, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp, #64] // 16-byte Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: mov v1.16b, v0.16b
; CHECK-GI-NEXT: bl __unordtf2
-; CHECK-GI-NEXT: fmov s0, w21
+; CHECK-GI-NEXT: fmov s0, w20
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: ldr x30, [sp, #104] // 8-byte Reload
; CHECK-GI-NEXT: csel w8, wzr, w19, ne
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x22, x21, [sp, #96] // 16-byte Folded Reload
-; CHECK-GI-NEXT: mov v0.s[1], w23
-; CHECK-GI-NEXT: ldp x30, x23, [sp, #80] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x20, x19, [sp, #128] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #88] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldr d10, [sp, #80] // 8-byte Reload
+; CHECK-GI-NEXT: mov v0.s[1], w22
+; CHECK-GI-NEXT: ldp x22, x21, [sp, #112] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[2], w8
-; CHECK-GI-NEXT: add sp, sp, #128
+; CHECK-GI-NEXT: add sp, sp, #144
; CHECK-GI-NEXT: ret
%x = call <3 x i32> @llvm.fptosi.sat.v3f128.v3i32(<3 x fp128> %f)
ret <3 x i32> %x
@@ -1014,44 +1040,50 @@ define <4 x i32> @test_signed_v4f128_v4i32(<4 x fp128> %f) {
;
; CHECK-GI-LABEL: test_signed_v4f128_v4i32:
; CHECK-GI: // %bb.0:
-; CHECK-GI-NEXT: sub sp, sp, #160
-; CHECK-GI-NEXT: str x30, [sp, #96] // 8-byte Spill
-; CHECK-GI-NEXT: stp x24, x23, [sp, #112] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x22, x21, [sp, #128] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #144] // 16-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 160
+; CHECK-GI-NEXT: sub sp, sp, #176
+; CHECK-GI-NEXT: str d10, [sp, #96] // 8-byte Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #112] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x23, [sp, #128] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x22, x21, [sp, #144] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x20, x19, [sp, #160] // 16-byte Folded Spill
+; CHECK-GI-NEXT: .cfi_def_cfa_offset 176
; CHECK-GI-NEXT: .cfi_offset w19, -8
; CHECK-GI-NEXT: .cfi_offset w20, -16
; CHECK-GI-NEXT: .cfi_offset w21, -24
; CHECK-GI-NEXT: .cfi_offset w22, -32
; CHECK-GI-NEXT: .cfi_offset w23, -40
-; CHECK-GI-NEXT: .cfi_offset w24, -48
-; CHECK-GI-NEXT: .cfi_offset w30, -64
+; CHECK-GI-NEXT: .cfi_offset w30, -48
+; CHECK-GI-NEXT: .cfi_offset b8, -56
+; CHECK-GI-NEXT: .cfi_offset b9, -64
+; CHECK-GI-NEXT: .cfi_offset b10, -80
; CHECK-GI-NEXT: adrp x8, .LCPI17_1
; CHECK-GI-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI17_1]
; CHECK-GI-NEXT: str q2, [sp, #32] // 16-byte Spill
; CHECK-GI-NEXT: stp q1, q3, [sp, #64] // 32-byte Folded Spill
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x20, #-4603241769126068224 // =0xc01e000000000000
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x21, x8, x20, gt
+; CHECK-GI-NEXT: fmov d9, #-7.50000000
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d10, d1, d8, gt
+; CHECK-GI-NEXT: fcsel d1, d0, d9, gt
+; CHECK-GI-NEXT: fmov x8, d10
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: adrp x8, .LCPI17_0
-; CHECK-GI-NEXT: mov v0.d[1], x21
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI17_0]
; CHECK-GI-NEXT: str q1, [sp, #48] // 16-byte Spill
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x22, #281474976448512 // =0xfffffffc0000
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
-; CHECK-GI-NEXT: movk x22, #16413, lsl #48
+; CHECK-GI-NEXT: mov x21, #281474976448512 // =0xfffffffc0000
+; CHECK-GI-NEXT: fcsel d0, d10, d8, mi
+; CHECK-GI-NEXT: movk x21, #16413, lsl #48
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x21, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
@@ -1061,22 +1093,24 @@ define <4 x i32> @test_signed_v4f128_v4i32(<4 x fp128> %f) {
; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: ldr q1, [sp, #64] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel w21, wzr, w19, ne
+; CHECK-GI-NEXT: csel w20, wzr, w19, ne
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d10, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d10
+; CHECK-GI-NEXT: fcsel d1, d0, d9, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x19, d1
; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x23, x8, x20, gt
-; CHECK-GI-NEXT: mov v0.d[1], x23
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d10, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x23, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload
@@ -1086,21 +1120,24 @@ define <4 x i32> @test_signed_v4f128_v4i32(<4 x fp128> %f) {
; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: ldr q1, [sp, #64] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel w23, wzr, w19, ne
+; CHECK-GI-NEXT: csel w22, wzr, w19, ne
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x24, x8, x20, gt
-; CHECK-GI-NEXT: mov v0.d[1], x24
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d10, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d10
+; CHECK-GI-NEXT: fcsel d1, d0, d9, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d10, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x24, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Reload
@@ -1109,39 +1146,42 @@ define <4 x i32> @test_signed_v4f128_v4i32(<4 x fp128> %f) {
; CHECK-GI-NEXT: bl __unordtf2
; CHECK-GI-NEXT: ldp q1, q0, [sp, #64] // 32-byte Folded Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel w24, wzr, w19, ne
+; CHECK-GI-NEXT: csel w23, wzr, w19, ne
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #80] // 16-byte Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #80] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d10, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d10
+; CHECK-GI-NEXT: fcsel d1, d0, d9, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x19, d1
; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, x20, gt
-; CHECK-GI-NEXT: mov v0.d[1], x20
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d10, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x20, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: ldr q0, [sp, #80] // 16-byte Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: mov v1.16b, v0.16b
; CHECK-GI-NEXT: bl __unordtf2
-; CHECK-GI-NEXT: fmov s0, w21
+; CHECK-GI-NEXT: fmov s0, w20
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: ldr x30, [sp, #96] // 8-byte Reload
+; CHECK-GI-NEXT: ldr d10, [sp, #96] // 8-byte Reload
; CHECK-GI-NEXT: csel w8, wzr, w19, ne
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #144] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x22, x21, [sp, #128] // 16-byte Folded Reload
-; CHECK-GI-NEXT: mov v0.s[1], w23
-; CHECK-GI-NEXT: mov v0.s[2], w24
-; CHECK-GI-NEXT: ldp x24, x23, [sp, #112] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x20, x19, [sp, #160] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #112] // 16-byte Folded Reload
+; CHECK-GI-NEXT: mov v0.s[1], w22
+; CHECK-GI-NEXT: ldp x22, x21, [sp, #144] // 16-byte Folded Reload
+; CHECK-GI-NEXT: mov v0.s[2], w23
+; CHECK-GI-NEXT: ldp x30, x23, [sp, #128] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[3], w8
-; CHECK-GI-NEXT: add sp, sp, #160
+; CHECK-GI-NEXT: add sp, sp, #176
; CHECK-GI-NEXT: ret
%x = call <4 x i32> @llvm.fptosi.sat.v4f128.v4i32(<4 x fp128> %f)
ret <4 x i32> %x
@@ -5126,17 +5166,20 @@ define <2 x i64> @test_signed_v2f128_v2i64(<2 x fp128> %f) {
;
; CHECK-GI-LABEL: test_signed_v2f128_v2i64:
; CHECK-GI: // %bb.0:
-; CHECK-GI-NEXT: sub sp, sp, #112
-; CHECK-GI-NEXT: stp x30, x23, [sp, #64] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 112
+; CHECK-GI-NEXT: sub sp, sp, #128
+; CHECK-GI-NEXT: stp d9, d8, [sp, #64] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x23, [sp, #80] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x22, x21, [sp, #96] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill
+; CHECK-GI-NEXT: .cfi_def_cfa_offset 128
; CHECK-GI-NEXT: .cfi_offset w19, -8
; CHECK-GI-NEXT: .cfi_offset w20, -16
; CHECK-GI-NEXT: .cfi_offset w21, -24
; CHECK-GI-NEXT: .cfi_offset w22, -32
; CHECK-GI-NEXT: .cfi_offset w23, -40
; CHECK-GI-NEXT: .cfi_offset w30, -48
+; CHECK-GI-NEXT: .cfi_offset b8, -56
+; CHECK-GI-NEXT: .cfi_offset b9, -64
; CHECK-GI-NEXT: adrp x8, .LCPI86_1
; CHECK-GI-NEXT: str q1, [sp, #48] // 16-byte Spill
; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI86_1]
@@ -5144,25 +5187,27 @@ define <2 x i64> @test_signed_v2f128_v2i64(<2 x fp128> %f) {
; CHECK-GI-NEXT: mov v1.16b, v2.16b
; CHECK-GI-NEXT: str q2, [sp, #16] // 16-byte Spill
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x20, #-4594234569871327232 // =0xc03e000000000000
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x21, x8, x20, gt
+; CHECK-GI-NEXT: fmov d9, #-30.00000000
; CHECK-GI-NEXT: adrp x8, .LCPI86_0
-; CHECK-GI-NEXT: mov v0.d[1], x21
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d1, d1, d8, gt
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: fcsel d1, d0, d9, gt
+; CHECK-GI-NEXT: mov v0.d[0], x19
+; CHECK-GI-NEXT: fmov x20, d1
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI86_0]
; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill
+; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: bl __lttf2
-; CHECK-GI-NEXT: mov x22, #-1125899906842624 // =0xfffc000000000000
+; CHECK-GI-NEXT: mov x21, #-1125899906842624 // =0xfffc000000000000
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x23, #4629137466983448575 // =0x403dffffffffffff
-; CHECK-GI-NEXT: csel x8, x19, x22, mi
+; CHECK-GI-NEXT: mov x22, #4629137466983448575 // =0x403dffffffffffff
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x21, x23, mi
+; CHECK-GI-NEXT: csel x8, x20, x22, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfdi
; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Reload
@@ -5172,36 +5217,38 @@ define <2 x i64> @test_signed_v2f128_v2i64(<2 x fp128> %f) {
; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Reload
; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x21, xzr, x19, ne
+; CHECK-GI-NEXT: csel x20, xzr, x19, ne
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d1, d1, d8, gt
+; CHECK-GI-NEXT: fmov x19, d1
; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
+; CHECK-GI-NEXT: fcsel d2, d0, d9, gt
; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, x20, gt
-; CHECK-GI-NEXT: mov v0.d[1], x20
+; CHECK-GI-NEXT: fmov x23, d2
+; CHECK-GI-NEXT: mov v0.d[1], x23
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x20, x23, mi
+; CHECK-GI-NEXT: csel x8, x23, x22, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixtfdi
; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Reload
; CHECK-GI-NEXT: mov x19, x0
; CHECK-GI-NEXT: mov v1.16b, v0.16b
; CHECK-GI-NEXT: bl __unordtf2
-; CHECK-GI-NEXT: fmov d0, x21
+; CHECK-GI-NEXT: fmov d0, x20
; CHECK-GI-NEXT: cmp w0, #0
; CHECK-GI-NEXT: csel x8, xzr, x19, ne
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x30, x23, [sp, #64] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x22, x21, [sp, #96] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x30, x23, [sp, #80] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.d[1], x8
-; CHECK-GI-NEXT: add sp, sp, #112
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #64] // 16-byte Folded Reload
+; CHECK-GI-NEXT: add sp, sp, #128
; CHECK-GI-NEXT: ret
%x = call <2 x i64> @llvm.fptosi.sat.v2f128.v2i64(<2 x fp128> %f)
ret <2 x i64> %x
diff --git a/llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll b/llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
index 7a5fe0f4222bc..395b15e6424be 100644
--- a/llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
+++ b/llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
@@ -784,34 +784,38 @@ define i32 @test_unsigned_f128_i32(fp128 %f) {
; CHECK-GI-LABEL: test_unsigned_f128_i32:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: sub sp, sp, #48
-; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #16] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-GI-NEXT: .cfi_def_cfa_offset 48
; CHECK-GI-NEXT: .cfi_offset w19, -8
-; CHECK-GI-NEXT: .cfi_offset w20, -16
-; CHECK-GI-NEXT: .cfi_offset w30, -32
+; CHECK-GI-NEXT: .cfi_offset w30, -16
+; CHECK-GI-NEXT: .cfi_offset b8, -24
+; CHECK-GI-NEXT: .cfi_offset b9, -32
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: adrp x8, .LCPI30_0
-; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI30_0]
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Reload
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #16] // 16-byte Folded Reload
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: mov x8, #281474976579584 // =0xfffffffe0000
; CHECK-GI-NEXT: movk x8, #16414, lsl #48
-; CHECK-GI-NEXT: csel x8, x20, x8, mi
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
+; CHECK-GI-NEXT: csel x8, x19, x8, mi
+; CHECK-GI-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: add sp, sp, #48
; CHECK-GI-NEXT: b __fixunstfsi
diff --git a/llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll b/llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
index d4feab2ea5d9b..bff7faeb2dfcc 100644
--- a/llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
+++ b/llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
@@ -474,37 +474,41 @@ define <1 x i32> @test_unsigned_v1f128_v1i32(<1 x fp128> %f) {
; CHECK-GI-LABEL: test_unsigned_v1f128_v1i32:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: sub sp, sp, #48
-; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #16] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-GI-NEXT: .cfi_def_cfa_offset 48
; CHECK-GI-NEXT: .cfi_offset w19, -8
-; CHECK-GI-NEXT: .cfi_offset w20, -16
-; CHECK-GI-NEXT: .cfi_offset w30, -32
+; CHECK-GI-NEXT: .cfi_offset w30, -16
+; CHECK-GI-NEXT: .cfi_offset b8, -24
+; CHECK-GI-NEXT: .cfi_offset b9, -32
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: adrp x8, .LCPI14_0
-; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI14_0]
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: mov x8, #281474976579584 // =0xfffffffe0000
; CHECK-GI-NEXT: movk x8, #16414, lsl #48
-; CHECK-GI-NEXT: csel x8, x20, x8, mi
+; CHECK-GI-NEXT: csel x8, x19, x8, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: fmov s0, w0
-; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: add sp, sp, #48
; CHECK-GI-NEXT: ret
%x = call <1 x i32> @llvm.fptoui.sat.v1f128.v1i32(<1 x fp128> %f)
@@ -564,61 +568,68 @@ define <2 x i32> @test_unsigned_v2f128_v2i32(<2 x fp128> %f) {
; CHECK-GI-LABEL: test_unsigned_v2f128_v2i32:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: sub sp, sp, #80
-; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Spill
-; CHECK-GI-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #32] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x21, [sp, #48] // 16-byte Folded Spill
; CHECK-GI-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: .cfi_def_cfa_offset 80
; CHECK-GI-NEXT: .cfi_offset w19, -8
; CHECK-GI-NEXT: .cfi_offset w20, -16
; CHECK-GI-NEXT: .cfi_offset w21, -24
-; CHECK-GI-NEXT: .cfi_offset w22, -32
-; CHECK-GI-NEXT: .cfi_offset w30, -48
+; CHECK-GI-NEXT: .cfi_offset w30, -32
+; CHECK-GI-NEXT: .cfi_offset b8, -40
+; CHECK-GI-NEXT: .cfi_offset b9, -48
; CHECK-GI-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: adrp x8, .LCPI15_0
-; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI15_0]
; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: mov x21, #281474976579584 // =0xfffffffe0000
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
-; CHECK-GI-NEXT: movk x21, #16414, lsl #48
+; CHECK-GI-NEXT: mov x20, #281474976579584 // =0xfffffffe0000
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: movk x20, #16414, lsl #48
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x20, x21, mi
+; CHECK-GI-NEXT: csel x8, x19, x20, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x20
-; CHECK-GI-NEXT: csel x22, x8, xzr, gt
-; CHECK-GI-NEXT: mov v0.d[1], x22
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x21, d1
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: mov v0.d[1], x21
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x20, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x22, x21, mi
+; CHECK-GI-NEXT: csel x8, x21, x20, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Reload
+; CHECK-GI-NEXT: ldp x30, x21, [sp, #48] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: add sp, sp, #80
@@ -692,86 +703,98 @@ define <3 x i32> @test_unsigned_v3f128_v3i32(<3 x fp128> %f) {
;
; CHECK-GI-LABEL: test_unsigned_v3f128_v3i32:
; CHECK-GI: // %bb.0:
-; CHECK-GI-NEXT: sub sp, sp, #96
-; CHECK-GI-NEXT: stp x30, x23, [sp, #48] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x22, x21, [sp, #64] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #80] // 16-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 96
+; CHECK-GI-NEXT: sub sp, sp, #112
+; CHECK-GI-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
+; CHECK-GI-NEXT: str x30, [sp, #64] // 8-byte Spill
+; CHECK-GI-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill
+; CHECK-GI-NEXT: .cfi_def_cfa_offset 112
; CHECK-GI-NEXT: .cfi_offset w19, -8
; CHECK-GI-NEXT: .cfi_offset w20, -16
; CHECK-GI-NEXT: .cfi_offset w21, -24
; CHECK-GI-NEXT: .cfi_offset w22, -32
-; CHECK-GI-NEXT: .cfi_offset w23, -40
; CHECK-GI-NEXT: .cfi_offset w30, -48
+; CHECK-GI-NEXT: .cfi_offset b8, -56
+; CHECK-GI-NEXT: .cfi_offset b9, -64
; CHECK-GI-NEXT: stp q1, q0, [sp] // 32-byte Folded Spill
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: str q2, [sp, #32] // 16-byte Spill
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: adrp x8, .LCPI16_0
-; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI16_0]
; CHECK-GI-NEXT: str q1, [sp, #16] // 16-byte Spill
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
; CHECK-GI-NEXT: mov x21, #281474976579584 // =0xfffffffe0000
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
; CHECK-GI-NEXT: movk x21, #16414, lsl #48
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x20, x21, mi
+; CHECK-GI-NEXT: csel x8, x19, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x20
-; CHECK-GI-NEXT: csel x22, x8, xzr, gt
-; CHECK-GI-NEXT: mov v0.d[1], x22
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x20, d1
+; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
+; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x20, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x22, x21, mi
+; CHECK-GI-NEXT: csel x8, x20, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: mov w20, w0
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldp q1, q0, [sp, #16] // 32-byte Folded Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x22, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x22
-; CHECK-GI-NEXT: csel x23, x8, xzr, gt
-; CHECK-GI-NEXT: mov v0.d[1], x23
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x22, d1
+; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
+; CHECK-GI-NEXT: mov v0.d[1], x22
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x22, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x23, x21, mi
+; CHECK-GI-NEXT: csel x8, x22, x21, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: fmov s0, w19
-; CHECK-GI-NEXT: ldp x22, x21, [sp, #64] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x30, x23, [sp, #48] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldr x30, [sp, #64] // 8-byte Reload
; CHECK-GI-NEXT: mov v0.s[1], w20
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #80] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[2], w0
-; CHECK-GI-NEXT: add sp, sp, #96
+; CHECK-GI-NEXT: add sp, sp, #112
; CHECK-GI-NEXT: ret
%x = call <3 x i32> @llvm.fptoui.sat.v3f128.v3i32(<3 x fp128> %f)
ret <3 x i32> %x
@@ -861,8 +884,8 @@ define <4 x i32> @test_unsigned_v4f128_v4i32(<4 x fp128> %f) {
; CHECK-GI-LABEL: test_unsigned_v4f128_v4i32:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: sub sp, sp, #128
-; CHECK-GI-NEXT: str x30, [sp, #64] // 8-byte Spill
-; CHECK-GI-NEXT: stp x24, x23, [sp, #80] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp d9, d8, [sp, #64] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x30, x23, [sp, #80] // 16-byte Folded Spill
; CHECK-GI-NEXT: stp x22, x21, [sp, #96] // 16-byte Folded Spill
; CHECK-GI-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill
; CHECK-GI-NEXT: .cfi_def_cfa_offset 128
@@ -871,94 +894,105 @@ define <4 x i32> @test_unsigned_v4f128_v4i32(<4 x fp128> %f) {
; CHECK-GI-NEXT: .cfi_offset w21, -24
; CHECK-GI-NEXT: .cfi_offset w22, -32
; CHECK-GI-NEXT: .cfi_offset w23, -40
-; CHECK-GI-NEXT: .cfi_offset w24, -48
-; CHECK-GI-NEXT: .cfi_offset w30, -64
+; CHECK-GI-NEXT: .cfi_offset w30, -48
+; CHECK-GI-NEXT: .cfi_offset b8, -56
+; CHECK-GI-NEXT: .cfi_offset b9, -64
; CHECK-GI-NEXT: stp q1, q2, [sp] // 32-byte Folded Spill
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: stp q3, q0, [sp, #32] // 32-byte Folded Spill
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: adrp x8, .LCPI17_0
-; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI17_0]
; CHECK-GI-NEXT: str q1, [sp, #48] // 16-byte Spill
+; CHECK-GI-NEXT: mov v0.d[1], x19
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
; CHECK-GI-NEXT: mov x22, #281474976579584 // =0xfffffffe0000
-; CHECK-GI-NEXT: csel x8, x19, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
; CHECK-GI-NEXT: movk x22, #16414, lsl #48
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x20, x22, mi
+; CHECK-GI-NEXT: csel x8, x19, x22, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x20, d1
; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x20
-; CHECK-GI-NEXT: csel x21, x8, xzr, gt
-; CHECK-GI-NEXT: mov v0.d[1], x21
+; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x20, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x21, x22, mi
+; CHECK-GI-NEXT: csel x8, x20, x22, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: mov w20, w0
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x21, d1
; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x21, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x21
-; CHECK-GI-NEXT: csel x23, x8, xzr, gt
-; CHECK-GI-NEXT: mov v0.d[1], x23
+; CHECK-GI-NEXT: mov v0.d[1], x21
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x21, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x23, x22, mi
+; CHECK-GI-NEXT: csel x8, x21, x22, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: mov w21, w0
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x23, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x23
-; CHECK-GI-NEXT: csel x24, x8, xzr, gt
-; CHECK-GI-NEXT: mov v0.d[1], x24
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d9, d1, d8, gt
+; CHECK-GI-NEXT: fmov x8, d9
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: mov v0.d[0], x8
+; CHECK-GI-NEXT: fmov x23, d1
+; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Reload
+; CHECK-GI-NEXT: mov v0.d[1], x23
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: csel x8, x23, xzr, mi
+; CHECK-GI-NEXT: fcsel d0, d9, d8, mi
+; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov v0.d[0], x8
-; CHECK-GI-NEXT: csel x8, x24, x22, mi
+; CHECK-GI-NEXT: csel x8, x23, x22, mi
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: fmov s0, w19
-; CHECK-GI-NEXT: ldp x24, x23, [sp, #80] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldr x30, [sp, #64] // 8-byte Reload
+; CHECK-GI-NEXT: ldp x30, x23, [sp, #80] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp d9, d8, [sp, #64] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w20
; CHECK-GI-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[2], w21
@@ -4124,31 +4158,35 @@ define <2 x i64> @test_signed_v2f128_v2i64(<2 x fp128> %f) {
;
; CHECK-GI-LABEL: test_signed_v2f128_v2i64:
; CHECK-GI: // %bb.0:
-; CHECK-GI-NEXT: sub sp, sp, #80
-; CHECK-GI-NEXT: stp x30, x23, [sp, #32] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
-; CHECK-GI-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 80
+; CHECK-GI-NEXT: sub sp, sp, #96
+; CHECK-GI-NEXT: str d8, [sp, #32] // 8-byte Spill
+; CHECK-GI-NEXT: stp x30, x23, [sp, #48] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x22, x21, [sp, #64] // 16-byte Folded Spill
+; CHECK-GI-NEXT: stp x20, x19, [sp, #80] // 16-byte Folded Spill
+; CHECK-GI-NEXT: .cfi_def_cfa_offset 96
; CHECK-GI-NEXT: .cfi_offset w19, -8
; CHECK-GI-NEXT: .cfi_offset w20, -16
; CHECK-GI-NEXT: .cfi_offset w21, -24
; CHECK-GI-NEXT: .cfi_offset w22, -32
; CHECK-GI-NEXT: .cfi_offset w23, -40
; CHECK-GI-NEXT: .cfi_offset w30, -48
+; CHECK-GI-NEXT: .cfi_offset b8, -64
; CHECK-GI-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: movi d8, #0000000000000000
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x19, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
-; CHECK-GI-NEXT: mov v0.d[0], x19
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
; CHECK-GI-NEXT: adrp x8, .LCPI86_0
-; CHECK-GI-NEXT: mov v0.d[1], x20
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d1, d1, d8, gt
+; CHECK-GI-NEXT: fmov x19, d1
+; CHECK-GI-NEXT: fcsel d1, d0, d8, gt
+; CHECK-GI-NEXT: mov v0.d[0], x19
+; CHECK-GI-NEXT: fmov x20, d1
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI86_0]
; CHECK-GI-NEXT: str q1, [sp] // 16-byte Spill
+; CHECK-GI-NEXT: mov v0.d[1], x20
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: mov x21, #-562949953421312 // =0xfffe000000000000
; CHECK-GI-NEXT: cmp w0, #0
@@ -4162,13 +4200,15 @@ define <2 x i64> @test_signed_v2f128_v2i64(<2 x fp128> %f) {
; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: mov x19, x0
; CHECK-GI-NEXT: bl __gttf2
-; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload
+; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Reload
; CHECK-GI-NEXT: cmp w0, #0
-; CHECK-GI-NEXT: fmov x8, d0
-; CHECK-GI-NEXT: csel x20, x8, xzr, gt
-; CHECK-GI-NEXT: mov x8, v0.d[1]
+; CHECK-GI-NEXT: mov d0, v1.d[1]
+; CHECK-GI-NEXT: fcsel d1, d1, d8, gt
+; CHECK-GI-NEXT: fmov x20, d1
+; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Reload
+; CHECK-GI-NEXT: fcsel d2, d0, d8, gt
; CHECK-GI-NEXT: mov v0.d[0], x20
-; CHECK-GI-NEXT: csel x23, x8, xzr, gt
+; CHECK-GI-NEXT: fmov x23, d2
; CHECK-GI-NEXT: mov v0.d[1], x23
; CHECK-GI-NEXT: bl __lttf2
; CHECK-GI-NEXT: cmp w0, #0
@@ -4178,11 +4218,12 @@ define <2 x i64> @test_signed_v2f128_v2i64(<2 x fp128> %f) {
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: bl __fixunstfdi
; CHECK-GI-NEXT: fmov d0, x19
-; CHECK-GI-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
-; CHECK-GI-NEXT: ldp x30, x23, [sp, #32] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x20, x19, [sp, #80] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldp x22, x21, [sp, #64] // 16-byte Folded Reload
+; CHECK-GI-NEXT: ldr d8, [sp, #32] // 8-byte Reload
+; CHECK-GI-NEXT: ldp x30, x23, [sp, #48] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.d[1], x0
-; CHECK-GI-NEXT: add sp, sp, #80
+; CHECK-GI-NEXT: add sp, sp, #96
; CHECK-GI-NEXT: ret
%x = call <2 x i64> @llvm.fptoui.sat.v2f128.v2i64(<2 x fp128> %f)
ret <2 x i64> %x
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