[llvm] [AMDGPU] Pre-commit unit test for RP tracking `reset`/`advance` inconsistencies fix (PR #196098)

[Diana Picus via llvm-commits]

================
@@ -0,0 +1,195 @@
+//===- GCNRegPressureTest.cpp ---------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "GCNRegPressure.h"
+#include "AMDGPUTargetMachine.h"
+#include "AMDGPUUnitTests.h"
+#include "llvm/Analysis/CGSCCPassManager.h"
+#include "llvm/Analysis/LoopAnalysisManager.h"
+#include "llvm/CodeGen/LiveIntervals.h"
+#include "llvm/CodeGen/MIRParser/MIRParser.h"
+#include "llvm/CodeGen/MachineFunctionAnalysis.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachinePassManager.h"
+#include "llvm/CodeGen/MachineScheduler.h"
+#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/CodeGen/TargetLowering.h"
+#include "llvm/IR/Module.h"
+#include "llvm/Passes/PassBuilder.h"
+#include "llvm/Target/TargetMachine.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+class GCNRegPressureTest : public testing::Test {
+public:
+  LLVMContext Context;
+  std::unique_ptr<GCNTargetMachine> TM;
+  std::unique_ptr<MachineModuleInfo> MMI;
+
+  LoopAnalysisManager LAM;
+  MachineFunctionAnalysisManager MFAM;
+  FunctionAnalysisManager FAM;
+  CGSCCAnalysisManager CGAM;
+  ModulePassManager MPM;
+  FunctionPassManager FPM;
+  MachineFunctionPassManager MFPM;
+  ModuleAnalysisManager MAM;
+
+  static void SetUpTestCase() { initializeAMDGPUTarget(); }
+
+  void SetUp() override {
+    TM = createAMDGPUTargetMachine("amdgcn--", "gfx908", "");
+    if (!TM)
+      GTEST_SKIP();
+    MMI = std::make_unique<MachineModuleInfo>(TM.get());
+
+    PassBuilder PB(TM.get());
+    PB.registerModuleAnalyses(MAM);
+    PB.registerCGSCCAnalyses(CGAM);
+    PB.registerFunctionAnalyses(FAM);
+    PB.registerLoopAnalyses(LAM);
+    PB.registerMachineFunctionAnalyses(MFAM);
+    PB.crossRegisterProxies(LAM, FAM, CGAM, MAM, &MFAM);
+    MAM.registerPass([&] { return MachineModuleAnalysis(*MMI); });
+  }
+};
+
+TEST_F(GCNRegPressureTest, DownwardTrackerEndOnDbgVal) {
+  StringRef MIR = R"(
+name:            DownwardTrackerEndOnDbgVal
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  bb.0:
+    %0:vgpr_32 = IMPLICIT_DEF
+    %1:vgpr_32 = IMPLICIT_DEF
+  
+  bb.1:
+    DBG_VALUE %0
+    DBG_VALUE %1
+    %2:vgpr_32 = IMPLICIT_DEF
+  
+  bb.3:
+    S_NOP 0, implicit %0, implicit %1, implicit %2
+    S_ENDPGM 0
+...
+)";
+
+  std::unique_ptr<Module> M = parseMIR(Context, *TM, MIR, *MMI);
+  MachineFunction &MF =
+      *MMI->getMachineFunction(*M->getFunction("DownwardTrackerEndOnDbgVal"));
+  const LiveIntervals &LIS = MFAM.getResult<LiveIntervalsAnalysis>(MF);
+
+  // MBB1 live-in pressure is equivalent to MBB0 live-out pressure.
+  MachineBasicBlock &MBB0 = *MF.getBlockNumbered(0);
+  MachineBasicBlock &MBB1 = *MF.getBlockNumbered(1);
+  GCNRPTracker::LiveRegSet MBB1LiveIns =
+      getLiveRegs(LIS.getInstructionIndex(*std::prev(MBB0.end())).getDeadSlot(),
+                  LIS, MF.getRegInfo());
+
+  // Track pressure across MBB1.
+  {
+    GCNDownwardRPTracker RPTracker(LIS), RPTrackerNoLiveIns(LIS);
+
+    // There is a debug instruction in bb.1 (%2's def), so advance should return
----------------
rovka wrote:

```suggestion
    // There is a non-debug instruction in bb.1 (%2's def), so advance should return
```

https://github.com/llvm/llvm-project/pull/196098