[llvm] [AMDGPU] Fix LowerDIVREM24 for the unsigned case (PR #196418)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,34 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -start-before=amdgpu-isel -mtriple=amdgcn--amdhsa -mcpu=gfx90a < %s | FileCheck %s
+
+; The precise IR that triggered the bug is optimized before
+; it reaches amdgpu-isel. Thus, the test starts directly from there.
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arsenm wrote:

Describe what is tested? Should this also test sdiv? Can it go into the existing test for this transform? 

https://github.com/llvm/llvm-project/pull/196418