[llvm] [MachineVerifier] physical register should not be a live-in for non e… (PR #194550)

[Zeng Wu via llvm-commits]

https://github.com/zwu-2025 updated https://github.com/llvm/llvm-project/pull/194550

>From c398f42bec9718324af3ef82e63e1bb1cff1bec2 Mon Sep 17 00:00:00 2001
From: zwu-2025 <Zeng.Wu2 at amd.com>
Date: Tue, 28 Apr 2026 06:09:39 +0000
Subject: [PATCH 1/3] [MachineVerifier] physical register should not be a
 live-in for non entry block

---
 llvm/lib/CodeGen/MachineVerifier.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index e5b145bb82c71..d7594974c620c 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -893,6 +893,12 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) {
   regsLive.clear();
   if (MRI->tracksLiveness()) {
     for (const auto &LI : MBB->liveins()) {
+      if (MRI->isSSA() && LI.PhysReg.isPhysical() && !MBB->isEntryBlock() &&
+          !MBB->isEHPad()) {
+        report("Physical registers should not be a live-in during SSA form",
+               MBB);
+        continue;
+      }
       if (!LI.PhysReg.isPhysical()) {
         report("MBB live-in list contains non-physical register", MBB);
         continue;

>From b26bb85952346b6f690d3427afaadbad63827bda Mon Sep 17 00:00:00 2001
From: zwu-2025 <Zeng.Wu2 at amd.com>
Date: Wed, 6 May 2026 21:34:38 +0000
Subject: [PATCH 2/3] comments

---
 llvm/lib/CodeGen/MachineVerifier.cpp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index d7594974c620c..b42747d7f3faa 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -893,16 +893,16 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) {
   regsLive.clear();
   if (MRI->tracksLiveness()) {
     for (const auto &LI : MBB->liveins()) {
+      if (!LI.PhysReg.isPhysical()) {
+        report("MBB live-in list contains non-physical register", MBB);
+        continue;
+      }
       if (MRI->isSSA() && LI.PhysReg.isPhysical() && !MBB->isEntryBlock() &&
           !MBB->isEHPad()) {
         report("Physical registers should not be a live-in during SSA form",
                MBB);
         continue;
       }
-      if (!LI.PhysReg.isPhysical()) {
-        report("MBB live-in list contains non-physical register", MBB);
-        continue;
-      }
       regsLive.insert_range(TRI->subregs_inclusive(LI.PhysReg));
     }
   }

>From bd664c4f6e46c9a042744ab552d3413b315e43a5 Mon Sep 17 00:00:00 2001
From: zwu-2025 <Zeng.Wu2 at amd.com>
Date: Thu, 7 May 2026 16:56:02 +0000
Subject: [PATCH 3/3] remove redundant check

---
 llvm/lib/CodeGen/MachineVerifier.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index b42747d7f3faa..3db78474da259 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -897,8 +897,7 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) {
         report("MBB live-in list contains non-physical register", MBB);
         continue;
       }
-      if (MRI->isSSA() && LI.PhysReg.isPhysical() && !MBB->isEntryBlock() &&
-          !MBB->isEHPad()) {
+      if (MRI->isSSA() && !MBB->isEntryBlock() && !MBB->isEHPad()) {
         report("Physical registers should not be a live-in during SSA form",
                MBB);
         continue;