[llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)

[Cheng Lingfei via llvm-commits]

clingfei wrote:

Thanks for your advice! I think we should also generate cmp+ccmp for direct xor and or. 

However, generating cmp+ccmp is not always better than direct XOR. The main issue is that AArch64 has different immediate encodings for these instructions. EOR/ORR can encode many logical immediates directly, for example, 0xff, 0xffff, or 0x8000000000000000. But CCMP immediates are much more restricted, making an additional mov instruction necessary.  

Currently, with the help of GPT-5.5, I consider four scenarios where xor+or would be better than cmp+ccmp, and then ruled them out in the code. The cases are mainly:
1. branch users, such as `eor + orr + cbz`;
2. logical immediates that can be encoded in an EOR but not legal for CCMP;
3. long or/xor chains;
4. multiple constants;

You can refer to i128-imm-compare-ccmp.ll for concrete examples.

https://github.com/llvm/llvm-project/pull/181822