[llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)

[Harrison Hao via llvm-commits]

harrisonGPU wrote:

> > > Actually VALU has v_bfi_b32 which can be used to implement the andNot pattern. See #156636. So the hasAndNot hook does not need to check for divergence.
> > 
> > 
> > I think we need to check for divergence here. Without this check, `unfoldMaskedMerge` would expand the XOR form masked merge into OR form for divergent values, which prevents `foldMaskedMerge` from folding it back and ultimately blocks the existing `v_bfi_b32` pattern from being matched.
> 
> No, hasAndNot should just return true. Does that cause codegen regessions? If so, we probably just need to improve the v_bfi_b32 patterns.
> 
> > And I think S_ANDN2 only exists in the SALU and operates on SGPRs, so returning true from hasAndNot for divergent values is incorrect.
> 
> VALU has a single instruction that can implement the and-not operation, so the hook should return true.

Thanks Jay! I understand your mind. I have found some patterns not support v_bfi_b32. I have implemented in this PR: https://github.com/llvm/llvm-project/pull/196325

https://github.com/llvm/llvm-project/pull/112647