[llvm] [SystemZ] Improve handling of memmoves. (PR #196285)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/include/llvm/CodeGen/TargetLowering.h llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/lib/Target/SystemZ/SystemZISelLowering.cpp llvm/lib/Target/SystemZ/SystemZISelLowering.h llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h --diff_from_common_commit
``````````

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``````````diff
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index a94f0e521..c1472fb43 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -10856,7 +10856,9 @@ SystemZTargetLowering::emitMemmoveImm(MachineInstr &MI,
       Register Reg = MRI.createVirtualRegister(&SystemZ::ADDR64BitRegClass);
       unsigned Opcode = TII->getOpcodeForOffset(SystemZ::LA, Disp);
       BuildMI(*MBB, MI, DL, TII->get(Opcode), Reg)
-          .add(Base).addImm(Disp).addReg(0);
+          .add(Base)
+          .addImm(Disp)
+          .addReg(0);
       Base = MachineOperand::CreateReg(Reg, false);
       Disp = 0;
     }
@@ -10869,12 +10871,14 @@ SystemZTargetLowering::emitMemmoveImm(MachineInstr &MI,
     Register VecReg = MRI.createVirtualRegister(&SystemZ::VR128BitRegClass);
     BuildMI(*MBB, MI, DL, TII->get(SystemZ::VLL), VecReg)
         .addReg(HighByteReg)
-        .add(SrcBase).addImm(SrcDisp);
+        .add(SrcBase)
+        .addImm(SrcDisp);
 
     BuildMI(*MBB, MI, DL, TII->get(SystemZ::VSTL))
         .addReg(VecReg)
         .addReg(HighByteReg)
-        .add(DstBase).addImm(DstDisp);
+        .add(DstBase)
+        .addImm(DstDisp);
 
     MI.eraseFromParent();
     return MBB;
@@ -10895,20 +10899,25 @@ SystemZTargetLowering::emitMemmoveImm(MachineInstr &MI,
 
   BuildMI(MBB, DL, TII->get(SystemZ::CLGR)).add(SrcBase).add(DstBase);
   BuildMI(MBB, DL, TII->get(SystemZ::BRC))
-      .addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_LT)
+      .addImm(SystemZ::CCMASK_ICMP)
+      .addImm(SystemZ::CCMASK_CMP_LT)
       .addMBB(MvcrlMBB);
 
   BuildMI(MvcMBB, DL, TII->get(SystemZ::MVC))
-      .add(DstBase).addImm(DstDisp)
+      .add(DstBase)
+      .addImm(DstDisp)
       .addImm(Len)
-      .add(SrcBase).addImm(SrcDisp)
+      .add(SrcBase)
+      .addImm(SrcDisp)
       .setMemRefs(MI.memoperands());
   BuildMI(MvcMBB, DL, TII->get(SystemZ::J)).addMBB(DoneMBB);
 
   BuildMI(MvcrlMBB, DL, TII->get(SystemZ::LHI), SystemZ::R0L).addImm(Len - 1);
   BuildMI(MvcrlMBB, DL, TII->get(SystemZ::MVCRL))
-      .add(DstBase).addImm(DstDisp)
-      .add(SrcBase).addImm(SrcDisp)
+      .add(DstBase)
+      .addImm(DstDisp)
+      .add(SrcBase)
+      .addImm(SrcDisp)
       .setMemRefs(MI.memoperands());
 
   MI.eraseFromParent();
diff --git a/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h b/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
index 96286d0c1..0a531c47e 100644
--- a/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
+++ b/llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
@@ -51,12 +51,12 @@ public:
                                   MachinePointerInfo DstPtrInfo,
                                   MachinePointerInfo SrcPtrInfo) const override;
 
-  SDValue EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &DL,
-                                   SDValue Chain, SDValue Dst, SDValue Src,
-                                   SDValue Size, Align Alignment,
-                                   bool IsVolatile,
-                                   MachinePointerInfo DstPtrInfo,
-                                   MachinePointerInfo SrcPtrInfo) const override;
+  SDValue
+  EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
+                           SDValue Dst, SDValue Src, SDValue Size,
+                           Align Alignment, bool IsVolatile,
+                           MachinePointerInfo DstPtrInfo,
+                           MachinePointerInfo SrcPtrInfo) const override;
 
   SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &DL,
                                   SDValue Chain, SDValue Dst, SDValue Byte,

``````````

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https://github.com/llvm/llvm-project/pull/196285