[llvm] [Mips] Optimize instr cvt.s.d+mfc1+slti to mfhc1+slti (PR #194806)

[via llvm-commits]

yingopq wrote:

> If you have interesting, can you have a look at #184788 . In this PR I emit cvt.s.d+mfc1+slti, in expandIS_FPCLASS, while it is not converted to mfhc1.

You mean this test?
```
define i1 @isclass_positive_nnan_double(double nofpclass(nan) %x) nounwind {
; R6-LABEL: isclass_positive_nnan_double:
; R6:       # %bb.0:
; R6-NEXT:    class.d $f0, $f12
; R6-NEXT:    mfc1 $1, $f0
; R6-NEXT:    andi $1, $1, 960
; R6-NEXT:    jr $ra
; R6-NEXT:    sltu $2, $zero, $1
;
; R2-LABEL: isclass_positive_nnan_double:
; R2:       # %bb.0:
; R2-NEXT:    cvt.s.d $f0, $f12
; R2-NEXT:    mfc1 $1, $f0
; R2-NEXT:    addiu $2, $zero, -1
; R2-NEXT:    jr $ra
; R2-NEXT:    slt $2, $2, $1
  %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 960)
  ret i1 %1
}
```

Because this did not match our new MIpsPat.

https://github.com/llvm/llvm-project/pull/194806