[llvm] AMDGPU/GlobalISel: RegBankLegalize rules for cluster_load_b32/b64/b128 (PR #196186)

[Petar Avramovic via llvm-commits]

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@@ -1872,6 +1876,26 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
                     amdgcn_global_store_async_from_lds_b128})
       .Any({{}, {{}, {IntrId, VgprP1, VgprP3}}});
 
+  addRulesForIOpcs({amdgcn_cluster_load_b32})
+      .Any({{UniB32}, {{UniInVgprB32}, {IntrId, SgprP1, Imm, SgprB32_M0}}})
+      .Any({{DivB32, _, UniP1}, {{VgprB32}, {IntrId, SgprP1, Imm, SgprB32_M0}}})
+      .Any(
+          {{DivB32, _, DivP1}, {{VgprB32}, {IntrId, VgprP1, Imm, SgprB32_M0}}});
+
+  addRulesForIOpcs({amdgcn_cluster_load_b64})
+      .Any({{UniV2S32}, {{UniInVgprV2S32}, {IntrId, SgprP1, Imm, SgprB32_M0}}})
+      .Any({{DivV2S32, _, UniP1},
+            {{VgprV2S32}, {IntrId, SgprP1, Imm, SgprB32_M0}}})
+      .Any({{DivV2S32, _, DivP1},
+            {{VgprV2S32}, {IntrId, VgprP1, Imm, SgprB32_M0}}});
+
+  addRulesForIOpcs({amdgcn_cluster_load_b128})
+      .Any({{UniV4S32}, {{UniInVgprV4S32}, {IntrId, SgprP1, Imm, SgprB32_M0}}})
+      .Any({{DivV4S32, _, UniP1},
+            {{VgprV4S32}, {IntrId, SgprP1, Imm, SgprB32_M0}}})
+      .Any({{DivV4S32, _, DivP1},
+            {{VgprV4S32}, {IntrId, VgprP1, Imm, SgprB32_M0}}});
+
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petar-avramovic wrote:

why not use B64 and B128 this is a load

https://github.com/llvm/llvm-project/pull/196186