[llvm] [AMDGPU] Break v2i32 and/or/xor ops into i32 pairs (PR #191422)

[Matt Arsenault via llvm-commits]

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@@ -14269,6 +14269,39 @@ static uint32_t getPermuteMask(SDValue V) {
   return ~0;
 }
 
+static SDValue splitAndOrXorv2i32Toi32(SDNode *N, SelectionDAG &DAG,
+                                       const GCNSubtarget *Subtarget) {
+  EVT VT = N->getValueType(0);
+  assert(VT == MVT::v2i32 && N->isDivergent());
+  const unsigned Opc = N->getOpcode();
+  SDValue LHS = N->getOperand(0);
+  SDValue RHS = N->getOperand(1);
+
+  if (AMDGPU::isGFX9Plus(*Subtarget)) {
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arsenm wrote:

The MC AMDGPU::is* predicate should be avoided, especially in codegen. This should use a GCNSubtarget method, checking a specific feature. Generation checks are unmaintainable 

https://github.com/llvm/llvm-project/pull/191422