[llvm] [TableGen] Emit Debug code for dynamic bits(eg: instruction operands) in DecoderEmitter (PR #194699)

[Sergei Barannikov via llvm-commits]

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@@ -144,6 +144,24 @@ include "Common/RegClassByHwModeCommon.td"
 
 
 
+// DISASM: DecodeStatus dbgFailOpd(const char *Op, const char *Desc, const char *Decoder,
+// DISASM-NEXT:                         bool *DecodeComplete = nullptr) {
+// DISASM-NEXT:   LLVM_DEBUG(dbgs() << "OPC_Decode for " << Op << ": " << Desc << " using "
+// DISASM-NEXT:                     << Decoder << " : FAIL\n");
+// DISASM-NEXT:   if (DecodeComplete)
+// DISASM-NEXT:     *DecodeComplete = false;
+// DISASM-NEXT:   return MCDisassembler::Fail;
+// DISASM-NEXT: }
+// DISASM-EMPTY:
+// DISASM-NEXT{LITERAL}: [[maybe_unused]] DecodeStatus dbgFailInsn(const char *Name, const char *Decoder,
+// DISASM-NEXT:                                           bool *DecodeComplete = nullptr) {
+// DISASM-NEXT:   LLVM_DEBUG(dbgs() << "OPC_Decode for " << Name << ": insn using " << Decoder
+// DISASM-NEXT:                     << " : FAIL\n");
+// DISASM-NEXT:   if (DecodeComplete)
+// DISASM-NEXT:     *DecodeComplete = false;
+// DISASM-NEXT:   return MCDisassembler::Fail;
+// DISASM-NEXT: }
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s-barannikov wrote:

I'm not sure this is the best place for these checks. This test verifies HwMode functionality, which is orthogonal to your changes.


https://github.com/llvm/llvm-project/pull/194699