[llvm] [TableGen] Emit Debug code for dynamic bits(eg: instruction operands) in DecoderEmitter (PR #194699)

[Prerona Chaudhuri via llvm-commits]

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@@ -42,5 +42,7 @@ def InstB : TestInstruction {
 // CHECK-NEXT:                                 // 22: }
 // CHECK-NEXT: };
 
-// CHECK: if (!Check(S, DecodeInstB(MI, insn, Address, Decoder))) { DecodeComplete = false; return MCDisassembler::Fail; }
-// CHECK: if (!Check(S, DecodeInstA(MI, insn, Address, Decoder))) { DecodeComplete = false; return MCDisassembler::Fail; }
+// CHECK-LABEL: case 0:
+// CHECK-NEXT:    if (!Check(S, DecodeInstB(MI, insn, Address, Decoder))) return dbgFail("InstB: insn using DecodeInstB", &DecodeComplete);
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pchaudhuri-nv wrote:

Thank you for the feedback, it has been incorporated...

https://github.com/llvm/llvm-project/pull/194699