[llvm] [AMDGPU] Use two v_xor_b32 instructions in fneg v2f32 selection pattern (PR #195585)

[Changpeng Fang via llvm-commits]

changpeng wrote:

> For code quality you could add a v2f32 version of the fcanonicalize-fneg pattern:
> 
> https://github.com/llvm/llvm-project/blob/462b60ba14f28b15422c0197c19a0e9fd65fb887/llvm/lib/Target/AMDGPU/SIInstructions.td#L3662

This is a good suggestion. I need to figure out unique tests for this pattern. If I simply add this pattern, the only changes
in existing tests are as following. This means the  fcanonicalize without fneg pattern will no long be tested: 

-; PACKED-GISEL-NEXT:    v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]
+; PACKED-GISEL-NEXT:    v_pk_mul_f32 v[0:1], -1.0, v[0:1] op_sel_hi:[0,1]


https://github.com/llvm/llvm-project/pull/195585