[llvm] [AMDGPU] Optimize fsub and fneg when packed fp32 ops are supported (PR #195962)

[Changpeng Fang via llvm-commits]

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@@ -872,7 +872,7 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
     if (Subtarget->hasPackedFP32Ops()) {
       setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG},
                          MVT::v2f32, Legal);
-      setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA},
+      setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG},
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changpeng wrote:

> Follow up should also handle fabs
 

For packed FP32 ops, ABS is not supported as source modifiers. So we may not make fabs v2f32 legal at all.
I think we inadvertently made fabs v2f32 legal on the global isel path, then we have to use *_AND_ to  pattern select the code.  

So should we NOT make G_FABS legal for v2f32, and remove the corresponding patterns?
@jayfoad , @rampitec ? 

https://github.com/llvm/llvm-project/pull/195962