[llvm] [AMDGPU] Account for inline asm size in inst_pref_size calculation (PR #192306)

[Jay Foad via llvm-commits]

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@@ -233,13 +233,48 @@ void AMDGPUAsmPrinter::emitFunctionBodyStart() {
     HSAMetadataStream->emitKernel(*MF, CurrentProgramInfo);
 }
 
+/// Set bits in a kernel descriptor MCExpr field:
+///   return ((Dst & ~Mask) | (Value << Shift))
+static const MCExpr *setBits(const MCExpr *Dst, const MCExpr *Value,
+                             uint32_t Mask, uint32_t Shift, MCContext &Ctx) {
+  const auto *Shft = MCConstantExpr::create(Shift, Ctx);
+  const auto *Msk = MCConstantExpr::create(Mask, Ctx);
+  Dst = MCBinaryExpr::createAnd(Dst, MCUnaryExpr::createNot(Msk, Ctx), Ctx);
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jayfoad wrote:

I think simplifying the expressions is more important than making them easily human readable.

However, isn't there some kind of knownbits-based optimization of these expressions, that could remove unnecessary masking in most cases? Come to think of it, if we simplify them based on knownbits, why didn't we already do constant folding of expressions like `~constant`?

https://github.com/llvm/llvm-project/pull/192306