[llvm] [AMDGPU] Disable dpp src1 sgpr on gfx11 (PR #164241)

[via llvm-commits]

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@@ -307,10 +307,12 @@ MachineInstr *GCNDPPCombine::createDPPInst(MachineInstr &OrigMI,
     if (Src1) {
       assert(AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::src1) &&
              "dpp version of instruction missing src1");
-      // If subtarget does not support SGPRs for src1 operand then the
-      // requirements are the same as for src0. We check src0 instead because
-      // pseudos are shared between subtargets and allow SGPR for src1 on all.
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LU-JOHN wrote:

I think the comment and the the check that src0 and src1 have the same size should be moved to the machine verifier.

https://github.com/llvm/llvm-project/pull/164241