[llvm] [VPlan] Add SCEV support for abs intrinsic (PR #195678)

[Ramkumar Ramachandra via llvm-commits]

================
@@ -33,6 +34,47 @@ namespace {
   } while (0)
 
 using VPInstructionTest = VPlanTestBase;
+using VPlanSCEVTest = VPlanTestIRBase;
+
+TEST_F(VPlanSCEVTest, GetSCEVExprForVPValueAbs) {
+  const char *ModuleString = R"(
+define void @f(i32 %x) {
+entry:
+  br label %loop
+loop:
+  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
+  %iv.next = add nuw nsw i32 %iv, 1
+  %exit = icmp eq i32 %iv.next, 4
+  br i1 %exit, label %exit.block, label %loop
+exit.block:
+  ret void
+}
+)";
----------------
artagnon wrote:

A bit confused by this example: where is the arg %x used? I think you can just pass the Loop argument L as nullptr, and eliminate the example, as it's misleading?

https://github.com/llvm/llvm-project/pull/195678