[llvm] 9928db4 - [DAGCombiner] Slightly simplify code in visitBSWAP. NFC (#193896)

via llvm-commits llvm-commits at lists.llvm.org
Mon May 4 09:08:25 PDT 2026


Author: Craig Topper
Date: 2026-05-04T09:08:19-07:00
New Revision: 9928db4b6e3b5077760eee3c2d1036def247ba8c

URL: https://github.com/llvm/llvm-project/commit/9928db4b6e3b5077760eee3c2d1036def247ba8c
DIFF: https://github.com/llvm/llvm-project/commit/9928db4b6e3b5077760eee3c2d1036def247ba8c.diff

LOG: [DAGCombiner] Slightly simplify code in visitBSWAP. NFC (#193896)

Use alignDown and do computation in bits instead of converting to bytes
and back to bits. This is similar to what we do in InstCombineCalls for
the same transform.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 72498d3d2bfff..2e079ce0a4576 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12212,16 +12212,15 @@ SDValue DAGCombiner::visitBSWAP(SDNode *N) {
     return DAG.getConstant(0, DL, VT);
   // If only one byte of the operand may be nonzero, bswap becomes a shift
   // to the mirror byte.
-  unsigned Lo = Known.countMinTrailingZeros();
-  unsigned Hi = BW - Known.countMinLeadingZeros();
-  if (unsigned SrcByte = Lo / 8; SrcByte == (Hi - 1) / 8) {
-    unsigned DstByte = (BW / 8) - 1 - SrcByte;
-    unsigned Opc = DstByte > SrcByte ? ISD::SHL : ISD::SRL;
+  unsigned TZ = alignDown(Known.countMinTrailingZeros(), 8);
+  unsigned LZ = alignDown(Known.countMinLeadingZeros(), 8);
+  if (BW - (LZ + TZ) == 8) {
+    unsigned Opc = LZ > TZ ? ISD::SHL : ISD::SRL;
     // Skip if the target would re-expand the produced shift post-legalize.
     // Targets that custom-lower byte-multiple shifts via bswap (e.g. MSP430
     // for shl i16) would loop with this combine.
     if (!LegalOperations || hasOperation(Opc, VT)) {
-      unsigned Amt = AbsoluteDifference(DstByte, SrcByte) * 8;
+      unsigned Amt = AbsoluteDifference(LZ, TZ);
       SDNodeFlags Flags =
           Opc == ISD::SHL ? SDNodeFlags::NoUnsignedWrap : SDNodeFlags::Exact;
       return DAG.getNode(Opc, DL, VT, N0,


        


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