[llvm] [CHERI] Define CHERI capability address space in computeRISCVDataLayout (PR #190806)

[Owen Anderson via llvm-commits]

https://github.com/resistor updated https://github.com/llvm/llvm-project/pull/190806

>From fdd5bd220c4681d0a9aef4d59f78cbf052e8956c Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor at mac.com>
Date: Tue, 7 Apr 2026 17:35:30 +0200
Subject: [PATCH] [CHERI] Define CHERI capability address space for CHERIoT

addrspace(200) is used to represent CHERI capabilities across both pure capability and hybrid modes. The same address space will also be used for RVY support, and this patch is factored in such a way as to compose easily with the draft patch for adding RVY support.
---
 llvm/lib/TargetParser/TargetDataLayout.cpp | 18 +++++++++++++-----
 llvm/unittests/TargetParser/TripleTest.cpp | 13 +++++++++++++
 2 files changed, 26 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/TargetParser/TargetDataLayout.cpp b/llvm/lib/TargetParser/TargetDataLayout.cpp
index ed04ccb53d8e6..33e71735789c9 100644
--- a/llvm/lib/TargetParser/TargetDataLayout.cpp
+++ b/llvm/lib/TargetParser/TargetDataLayout.cpp
@@ -7,6 +7,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/TargetParser/ARMTargetParser.h"
 #include "llvm/TargetParser/Triple.h"
@@ -298,19 +299,25 @@ static std::string computeRISCVDataLayout(const Triple &TT, StringRef ABIName) {
 
   // TODO: Maybe we should move RISCVABI to TargetParser, so we can reuse that
   // logic here instead of duplicating the string handling?
-  bool IsRVYPurecapABI =
-      ABIName.starts_with("il32pc64") || ABIName.starts_with("l64pc128");
+  bool HasCheriCapabilities =
+      ABIName.starts_with("il32pc64") || ABIName.starts_with("l64pc128") ||
+      ABIName.starts_with("cheriot");
 
   // Pointer and integer sizes.
+  auto IsCheriPureCapabilityABI =
+      StringSwitch<bool>(ABIName)
+          .Cases({"cheriot", "cheriot-baremetal"}, true)
+          .Default(false);
+  bool HasCheriCapabilities = IsCheriPureCapabilityABI;
   if (TT.isRISCV64()) {
     Ret += "-p:64:64";
-    if (IsRVYPurecapABI)
+    if (HasCheriCapabilities)
       Ret += "-pe200:128:128:128:64";
     Ret += "-i64:64-i128:128-n32:64";
   } else {
     assert(TT.isRISCV32() && "only RV32 and RV64 are currently supported");
     Ret += "-p:32:32";
-    if (IsRVYPurecapABI)
+    if (HasCheriCapabilities)
       Ret += "-pe200:64:64:64:32";
     Ret += "-i64:64-n32";
   }
@@ -323,7 +330,8 @@ static std::string computeRISCVDataLayout(const Triple &TT, StringRef ABIName) {
   else
     Ret += "-S128";
 
-  if (IsRVYPurecapABI)
+  // TODO: Support non-purecap CHERI ABIs.
+  if (HasCheriCapabilities)
     Ret += "-A200-P200-G200";
 
   return Ret;
diff --git a/llvm/unittests/TargetParser/TripleTest.cpp b/llvm/unittests/TargetParser/TripleTest.cpp
index d65e7855881e6..9ce222b6c9c39 100644
--- a/llvm/unittests/TargetParser/TripleTest.cpp
+++ b/llvm/unittests/TargetParser/TripleTest.cpp
@@ -3529,4 +3529,17 @@ TEST(TripleTest, DefaultWCharSize) {
   EXPECT_EQ(1u, Triple("xcore-unknown-unknown").getDefaultWCharSize());
 }
 
+TEST(DataLayoutTest, CheriRISCV32) {
+  Triple TT = Triple("riscv32-unknown-unknown");
+
+  EXPECT_THAT(TT.computeDataLayout(""),
+              testing::Not(testing::HasSubstr("pe200")));
+  EXPECT_THAT(TT.computeDataLayout(""),
+              testing::Not(testing::HasSubstr("A200-P200-G200")));
+  EXPECT_THAT(TT.computeDataLayout("cheriot"),
+              testing::HasSubstr("pe200:64:64:64:32"));
+  EXPECT_THAT(TT.computeDataLayout("cheriot"),
+              testing::HasSubstr("A200-P200-G200"));
+}
+
 } // end anonymous namespace