[llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v2i16, v4i16, v4f16, v2f32) (PR #192904)

[Fabian Ritter via llvm-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -global-isel=0 < %s | FileCheck -check-prefixes=SDAG %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -global-isel=1 < %s | FileCheck -check-prefixes=GISEL %s
+
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ritter-x2a wrote:

These tests overlap in some aspects with the `memory-legalizer-*.ll` tests (in that they test some different syncscopes and memory orderings), but they also cover things that are orthogonal to those tests (mainly the different access types).
I can see that it would make sense to have separate tests for the ISel lowering for the different access types of atomic loads/stores (especially with the memory-legalizer tests already being as gargantuan as they are), but then the names of the test files here should mirror that they only test this aspect; names like `load-atomic-global.ll` are too generic for that.
@Pierre-vh, what do you think?

https://github.com/llvm/llvm-project/pull/192904