[lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)

via llvm-commits llvm-commits at lists.llvm.org
Sun May 3 08:12:59 PDT 2026


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@@ -1094,6 +1176,44 @@ static bool relax(Ctx &ctx, int pass, InputSection &sec) {
   return changed;
 }
 
+static void scanTableJumpEntries(Ctx &ctx, const InputSection &sec) {
+  for (auto [i, r] : llvm::enumerate(sec.relocations)) {
+    if (!r.sym->isDefined())
+      continue;
+    if (i + 1 == sec.relocs().size() ||
+        sec.relocs()[i + 1].type != R_RISCV_RELAX)
+      continue;
+    switch (r.type) {
+    case R_RISCV_JAL:
+    case R_RISCV_CALL:
+    case R_RISCV_CALL_PLT: {
+      uint32_t insn = read32le(sec.content().data() + r.offset +
+                               (r.type == R_RISCV_JAL ? 0 : 4));
+      uint8_t rd = extractBits(insn, 11, 7);
+      if (rd != X_X0 && rd != X_RA)
+        break;
+      // Skip candidates that relaxCall will rewrite to c.j or c.jal. Pre-relax
+      // displacement is an upper bound (relaxation only shrinks code), so a
+      // nearby symbol now is still nearby post-relax.
+      const bool rvc = getEFlags(ctx, sec.file) & EF_RISCV_RVC;
+      const int64_t displace = getCallDisplace(ctx, r, sec.getVA() + r.offset);
+      if (rvc && isInt<12>(displace) &&
+          (rd == X_X0 || (rd == X_RA && !ctx.arg.is64)))
----------------
LukeZhuang wrote:

Done, now covered by riscv-tbljal-near-call.s (added one more case)

https://github.com/llvm/llvm-project/pull/183450


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