[llvm] [PrologEpilogInserter] Scan all blocks for inline stack probe insertion (PR #195456)
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Sat May 2 08:34:28 PDT 2026
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<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Rong "Mantle" Bao (CSharperMantle)
<details>
<summary>Changes</summary>
This PR extends the search range for inline stack probe insertion to all BBs, instead of the current "`SaveBlocks` only". This allows code generation for stack probe pseudoinstructions in non-entry BBs.
Fixes #<!-- -->195454.
---
Full diff: https://github.com/llvm/llvm-project/pull/195456.diff
2 Files Affected:
- (modified) llvm/lib/CodeGen/PrologEpilogInserter.cpp (+8-2)
- (added) llvm/test/CodeGen/RISCV/stack-probing-dynamic-nonentry.ll (+115)
``````````diff
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 68fd54cf00146..5c7dc6f48e274 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -1181,8 +1181,14 @@ void PEIImpl::insertPrologEpilogCode(MachineFunction &MF) {
// Zero call used registers before restoring callee-saved registers.
insertZeroCallUsedRegs(MF);
- for (MachineBasicBlock *SaveBlock : SaveBlocks)
- TFI.inlineStackProbe(MF, *SaveBlock);
+ {
+ SmallVector<MachineBasicBlock *, 8> Blocks;
+ for (MachineBasicBlock &MBB : MF)
+ Blocks.push_back(&MBB);
+
+ for (MachineBasicBlock *MBB : Blocks)
+ TFI.inlineStackProbe(MF, *MBB);
+ }
// Emit additional code that is required to support segmented stacks, if
// we've been asked for it. This, when linked with a runtime with support
diff --git a/llvm/test/CodeGen/RISCV/stack-probing-dynamic-nonentry.ll b/llvm/test/CodeGen/RISCV/stack-probing-dynamic-nonentry.ll
new file mode 100644
index 0000000000000..411168d445a95
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/stack-probing-dynamic-nonentry.ll
@@ -0,0 +1,115 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=riscv64 -mattr=+m -O2 < %s | FileCheck %s -check-prefix=RV64I
+; RUN: llc -mtriple=riscv32 -mattr=+m -O2 < %s | FileCheck %s -check-prefix=RV32I
+
+; Test that very large outgoing call frames in functions with variable-sized
+; objects get proper stack probing. The outgoing args are large enough to force
+; the PROBED_STACKALLOC path, which must be expanded in a non-entry block.
+
+define void @f(i64 %n) #0 {
+; RV64I-LABEL: f:
+; RV64I: # %bb.0: # %entry
+; RV64I-NEXT: addi sp, sp, -16
+; RV64I-NEXT: .cfi_def_cfa_offset 16
+; RV64I-NEXT: sd zero, 0(sp)
+; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
+; RV64I-NEXT: .cfi_offset ra, -8
+; RV64I-NEXT: .cfi_offset s0, -16
+; RV64I-NEXT: addi s0, sp, 16
+; RV64I-NEXT: .cfi_def_cfa s0, 0
+; RV64I-NEXT: slli a0, a0, 2
+; RV64I-NEXT: addi a0, a0, 15
+; RV64I-NEXT: andi a0, a0, -16
+; RV64I-NEXT: sub a0, sp, a0
+; RV64I-NEXT: lui a1, 1
+; RV64I-NEXT: .LBB0_1: # %entry
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sub sp, sp, a1
+; RV64I-NEXT: sd zero, 0(sp)
+; RV64I-NEXT: bltu a0, sp, .LBB0_1
+; RV64I-NEXT: # %bb.2: # %entry
+; RV64I-NEXT: mv sp, a0
+; RV64I-NEXT: lui a1, 5
+; RV64I-NEXT: sub t1, sp, a1
+; RV64I-NEXT: lui t2, 1
+; RV64I-NEXT: .LBB0_3: # %entry
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sub sp, sp, t2
+; RV64I-NEXT: sd zero, 0(sp)
+; RV64I-NEXT: bne sp, t1, .LBB0_3
+; RV64I-NEXT: # %bb.4: # %entry
+; RV64I-NEXT: addi sp, sp, -2048
+; RV64I-NEXT: addi sp, sp, -1424
+; RV64I-NEXT: sd zero, 0(sp)
+; RV64I-NEXT: call g
+; RV64I-NEXT: lui a0, 6
+; RV64I-NEXT: addi a0, a0, -624
+; RV64I-NEXT: add sp, sp, a0
+; RV64I-NEXT: addi sp, s0, -16
+; RV64I-NEXT: .cfi_def_cfa sp, 16
+; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
+; RV64I-NEXT: .cfi_restore ra
+; RV64I-NEXT: .cfi_restore s0
+; RV64I-NEXT: addi sp, sp, 16
+; RV64I-NEXT: .cfi_def_cfa_offset 0
+; RV64I-NEXT: ret
+;
+; RV32I-LABEL: f:
+; RV32I: # %bb.0: # %entry
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: .cfi_def_cfa_offset 16
+; RV32I-NEXT: sw zero, 0(sp)
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: .cfi_offset ra, -4
+; RV32I-NEXT: .cfi_offset s0, -8
+; RV32I-NEXT: addi s0, sp, 16
+; RV32I-NEXT: .cfi_def_cfa s0, 0
+; RV32I-NEXT: slli a0, a0, 2
+; RV32I-NEXT: addi a0, a0, 15
+; RV32I-NEXT: andi a0, a0, -16
+; RV32I-NEXT: sub a0, sp, a0
+; RV32I-NEXT: lui a1, 1
+; RV32I-NEXT: .LBB0_1: # %entry
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: sub sp, sp, a1
+; RV32I-NEXT: sw zero, 0(sp)
+; RV32I-NEXT: bltu a0, sp, .LBB0_1
+; RV32I-NEXT: # %bb.2: # %entry
+; RV32I-NEXT: mv sp, a0
+; RV32I-NEXT: lui a1, 5
+; RV32I-NEXT: sub t1, sp, a1
+; RV32I-NEXT: lui t2, 1
+; RV32I-NEXT: .LBB0_3: # %entry
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: sub sp, sp, t2
+; RV32I-NEXT: sw zero, 0(sp)
+; RV32I-NEXT: bne sp, t1, .LBB0_3
+; RV32I-NEXT: # %bb.4: # %entry
+; RV32I-NEXT: addi sp, sp, -2048
+; RV32I-NEXT: addi sp, sp, -1456
+; RV32I-NEXT: sw zero, 0(sp)
+; RV32I-NEXT: call g
+; RV32I-NEXT: lui a0, 6
+; RV32I-NEXT: addi a0, a0, -592
+; RV32I-NEXT: add sp, sp, a0
+; RV32I-NEXT: addi sp, s0, -16
+; RV32I-NEXT: .cfi_def_cfa sp, 16
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: .cfi_restore ra
+; RV32I-NEXT: .cfi_restore s0
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: .cfi_def_cfa_offset 0
+; RV32I-NEXT: ret
+entry:
+ %v = alloca i32, i64 %n
+ call void @g(ptr %v, [3000 x i64] poison)
+ ret void
+}
+
+declare void @g(ptr, [3000 x i64])
+
+attributes #0 = { "probe-stack"="inline-asm" }
``````````
</details>
https://github.com/llvm/llvm-project/pull/195456
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