[llvm] [AMDGPU] Fix waterfall inreg call args on gfx90a: hoist defs + avoid AGPR sources (PR #194890)
Amit Tiwari via llvm-commits
llvm-commits at lists.llvm.org
Fri May 1 12:37:24 PDT 2026
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@@ -7109,6 +7109,29 @@ static void emitLoadScalarOpsFromVGPRLoop(
unsigned NumSubRegs = RegSize / 32;
Register VScalarOp = ScalarOp->getReg();
+ auto LaneClassOf = [&](const TargetRegisterClass *RC) {
+ if (TRI->getRegSizeInBits(*RC) <= 32)
+ return RC;
+ const TargetRegisterClass *Sub =
+ TRI->getSubRegisterClass(RC, AMDGPU::sub0);
+ return Sub ? Sub : RC;
+ };
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amitamd7 wrote:
Was added it as if RC is wider than 32 bits, ask for the `AMDGPU::sub0` subreg class.
https://github.com/llvm/llvm-project/pull/194890
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