[llvm] [AArch64] Tablegen patterns for `shuffle(zext(...))` to `uaddlp` (PR #195120)

[David Green via llvm-commits]

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@@ -8660,6 +8661,25 @@ def : Pat<(add (v2i64 (zext (v2i32 (AArch64zip1 (v2i32 (extract_subvector v4i32:
                                          (v2i32 (extract_subvector v4i32:$src, (i64 2)))))))),
           (UADDLPv4i32_v2i64 V128:$src)>;
 
+// zext + shuffle
+def : Pat<(add (AArch64uzp1 (v8i16 (zext (v8i8 (extract_subvector v16i8:$src, (i64 0))))),
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davemgreen wrote:

Use add_like here? I think the pattern should apply to `disjoint or` at the moment, even if they could be optimized differently.

Are you interested in adding equivalent sext patterns too? They could be left till later but should be pretty similar I believe.

https://github.com/llvm/llvm-project/pull/195120