[llvm] 809a734 - [DAG] expandVecReduce - ensure widening to a wider vector type (#195251)

[via llvm-commits]

Author: Simon Pilgrim
Date: 2026-05-01T11:45:23Z
New Revision: 809a7344eb597e92eeb842d26886925dcec00dc4

URL: https://github.com/llvm/llvm-project/commit/809a7344eb597e92eeb842d26886925dcec00dc4
DIFF: https://github.com/llvm/llvm-project/commit/809a7344eb597e92eeb842d26886925dcec00dc4.diff

LOG: [DAG] expandVecReduce - ensure widening to a wider vector type (#195251)

Add missing check in #194672 that the getTypeToTransformTo is actually WIDER than the half type

Test coverage will follow shortly in an upcoming x86 patch

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 8921c04dbec06..22f43145303b6 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -12272,6 +12272,7 @@ SDValue TargetLowering::expandVecReduce(SDNode *Node, SelectionDAG &DAG) const {
           EVT WideVT = getTypeToTransformTo(*DAG.getContext(), HalfVT);
           if (WideVT.isVector() &&
               WideVT.getScalarType() == HalfVT.getScalarType() &&
+              WideVT.getVectorNumElements() >= HalfVT.getVectorNumElements() &&
               isOperationLegalOrCustom(BaseOpcode, WideVT)) {
             SDValue Lo, Hi;
             std::tie(Lo, Hi) = DAG.SplitVector(Op, dl);