[llvm] [AMDGPU] Add baseline tests for RewriteMFMAFormSchedStage (PR #193429)

[via llvm-commits]

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@@ -0,0 +1,199 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a \
+; RUN:     -amdgpu-disable-rewrite-mfma-form-sched-stage=false \
+; RUN:     < %s | FileCheck %s
+;
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a \
+; RUN:     -amdgpu-disable-rewrite-mfma-form-sched-stage=false \
+; RUN:     -stop-before=machine-scheduler \
+; RUN:     < %s | FileCheck %s --check-prefix=BEFORE
+; Verify MIR state BEFORE machine-scheduler (rewrite not yet applied):
+;   All 9 MFMAs use VGPR form: vreg_128_align2 / V_MFMA_F32_4X4X2BF16_vgprcd_e64.
+;   No AGPR COPYs inserted yet.
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xgxanq wrote:

> I don't see the point of this stop-before=machine-scheduler run

It really is.The BEFORE checks (lines 22-33) only verify that 9 MFMAs use _vgprcd_e64 (VGPR form) in bb.1.loop.body. But this is trivially true. the input .ll itself has VGPR-form MFMAs, no prior pass converts them. stop-before checking that a pass that hasn't run yet hasn't done anything.This test is generated by AI,I should have taken a closer look.We really shouldn't trust AI too much.

https://github.com/llvm/llvm-project/pull/193429