[llvm] [WIP][AMDGPU] Support the RF inline asm constraint (PR #195123)

[Jun Wang via llvm-commits]

================
@@ -19134,13 +19130,23 @@ SITargetLowering::getConstraintType(StringRef Constraint) const {
   } else if (Constraint.size() == 2) {
     if (Constraint == "VA")
       return C_RegisterClass;
+    else if (Constraint == "RF")
+      return C_Memory;
   }
   if (isImmConstraint(Constraint)) {
     return C_Other;
   }
   return TargetLowering::getConstraintType(Constraint);
 }
 
+InlineAsm::ConstraintCode
+SITargetLowering::getInlineAsmMemConstraint(StringRef ConstraintCode) const {
+  if (ConstraintCode == "RF")
----------------
jwanggit86 wrote:

> This goes back to my first question, where was this defined? Did you just make this up or is this supported somewhere else?

Pls see SWDEV-230897. Apparently GCC supports a set of memory related constraints.

https://github.com/llvm/llvm-project/pull/195123