[llvm] [CodeGen] Expand fmaximum/fminimum reductions (PR #195169)

[Prajwal KP via llvm-commits]

https://github.com/Prajwal-kp-18 created https://github.com/llvm/llvm-project/pull/195169

fixes - #195111 

>From f9fcb716fc39310ec600f41e2b0a9bdea09fb3df Mon Sep 17 00:00:00 2001
From: Prajwal <prajwal.kp.1817 at gmail.com>
Date: Fri, 1 May 2026 01:32:42 +0530
Subject: [PATCH] [CodeGen] Expand fmaximum/fminimum reductions

---
 llvm/lib/CodeGen/ExpandReductions.cpp | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/llvm/lib/CodeGen/ExpandReductions.cpp b/llvm/lib/CodeGen/ExpandReductions.cpp
index 2bc5faee78f3c..329237563bc24 100644
--- a/llvm/lib/CodeGen/ExpandReductions.cpp
+++ b/llvm/lib/CodeGen/ExpandReductions.cpp
@@ -49,6 +49,8 @@ bool expandReductions(Function &F, const TargetTransformInfo *TTI,
       case Intrinsic::vector_reduce_umin:
       case Intrinsic::vector_reduce_fmax:
       case Intrinsic::vector_reduce_fmin:
+      case Intrinsic::vector_reduce_fmaximum:
+      case Intrinsic::vector_reduce_fminimum:
         if (TTI->shouldExpandReduction(II))
           Worklist.push_back(II);
 
@@ -158,6 +160,19 @@ bool expandReductions(Function &F, const TargetTransformInfo *TTI,
       Rdx = getShuffleReduction(Builder, Vec, RdxOpcode, RS, RK);
       break;
     }
+    case Intrinsic::vector_reduce_fmaximum:
+    case Intrinsic::vector_reduce_fminimum: {
+      // We require "nnan" to use a shuffle reduction; "nsz" is implied by the
+      // semantics of the reduction.
+      Value *Vec = II->getArgOperand(0);
+      if (!isPowerOf2_32(
+              cast<FixedVectorType>(Vec->getType())->getNumElements()) ||
+          !FMF.noNaNs())
+        continue;
+      unsigned RdxOpcode = getArithmeticReductionInstruction(ID);
+      Rdx = getShuffleReduction(Builder, Vec, RdxOpcode, RS, RK);
+      break;
+    }
     }
     II->replaceAllUsesWith(Rdx);
     II->eraseFromParent();