[llvm] [LLVM][X86InstCombine] Extend mask combines to cover ConstantInt/FP based splats. (PR #195090)
Paul Walker via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 30 08:49:21 PDT 2026
https://github.com/paulwalker-arm updated https://github.com/llvm/llvm-project/pull/195090
>From 001efb1c3562b26e8d524bdb1d559e72250e258c Mon Sep 17 00:00:00 2001
From: Paul Walker <paul.walker at arm.com>
Date: Thu, 30 Apr 2026 16:23:43 +0100
Subject: [PATCH 1/2] Add tests show missing combine.
---
.../Transforms/InstCombine/X86/blend_x86.ll | 83 ++++++++++++++++++-
.../InstCombine/X86/x86-masked-memops.ll | 28 ++++++-
2 files changed, 107 insertions(+), 4 deletions(-)
diff --git a/llvm/test/Transforms/InstCombine/X86/blend_x86.ll b/llvm/test/Transforms/InstCombine/X86/blend_x86.ll
index 90fa512d306a2..a592f74ee8eb1 100644
--- a/llvm/test/Transforms/InstCombine/X86/blend_x86.ll
+++ b/llvm/test/Transforms/InstCombine/X86/blend_x86.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes=instcombine -mtriple=x86_64-apple-macosx -mcpu=core-avx2 -S | FileCheck %s
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-apple-macosx -mcpu=core-avx2 -use-constant-int-for-fixed-length-splat=false -use-constant-fp-for-fixed-length-splat=false -S | FileCheck %s -check-prefixes=CHECK,CHECK-CV
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-apple-macosx -mcpu=core-avx2 -use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat -S | FileCheck %s -check-prefixes=CHECK,CHECK-CI
define <2 x double> @constant_blendvpd(<2 x double> %xy, <2 x double> %ab) {
; CHECK-LABEL: @constant_blendvpd(
@@ -18,6 +19,18 @@ define <2 x double> @constant_blendvpd_zero(<2 x double> %xy, <2 x double> %ab)
ret <2 x double> %1
}
+define <2 x double> @constant_blendvpd_one(<2 x double> %ab) {
+; CHECK-CV-LABEL: @constant_blendvpd_one(
+; CHECK-CV-NEXT: ret <2 x double> zeroinitializer
+;
+; CHECK-CI-LABEL: @constant_blendvpd_one(
+; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> zeroinitializer, <2 x double> [[AB:%.*]], <2 x double> splat (double 1.000000e+00))
+; CHECK-CI-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> zeroinitializer, <2 x double> %ab, <2 x double> splat (double 1.000000e+00))
+ ret <2 x double> %1
+}
+
define <2 x double> @constant_blendvpd_dup(<2 x double> %xy, <2 x double> %sel) {
; CHECK-LABEL: @constant_blendvpd_dup(
; CHECK-NEXT: ret <2 x double> [[XY:%.*]]
@@ -43,6 +56,18 @@ define <4 x float> @constant_blendvps_zero(<4 x float> %xyzw, <4 x float> %abcd)
ret <4 x float> %1
}
+define <4 x float> @constant_blendvps_one(<4 x float> %abcd) {
+; CHECK-CV-LABEL: @constant_blendvps_one(
+; CHECK-CV-NEXT: ret <4 x float> zeroinitializer
+;
+; CHECK-CI-LABEL: @constant_blendvps_one(
+; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> zeroinitializer, <4 x float> [[ABCD:%.*]], <4 x float> splat (float 1.000000e+00))
+; CHECK-CI-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> zeroinitializer, <4 x float> %abcd, <4 x float> splat (float 1.000000e+00))
+ ret <4 x float> %1
+}
+
define <4 x float> @constant_blendvps_dup(<4 x float> %xyzw, <4 x float> %sel) {
; CHECK-LABEL: @constant_blendvps_dup(
; CHECK-NEXT: ret <4 x float> [[XYZW:%.*]]
@@ -68,6 +93,18 @@ define <16 x i8> @constant_pblendvb_zero(<16 x i8> %xyzw, <16 x i8> %abcd) {
ret <16 x i8> %1
}
+define <16 x i8> @constant_pblendvb_one(<16 x i8> %abcd) {
+; CHECK-CV-LABEL: @constant_pblendvb_one(
+; CHECK-CV-NEXT: ret <16 x i8> zeroinitializer
+;
+; CHECK-CI-LABEL: @constant_pblendvb_one(
+; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> zeroinitializer, <16 x i8> [[ABCD:%.*]], <16 x i8> splat (i8 1))
+; CHECK-CI-NEXT: ret <16 x i8> [[TMP1]]
+;
+ %1 = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> zeroinitializer, <16 x i8> %abcd, <16 x i8> splat (i8 1))
+ ret <16 x i8> %1
+}
+
define <16 x i8> @constant_pblendvb_dup(<16 x i8> %xyzw, <16 x i8> %sel) {
; CHECK-LABEL: @constant_pblendvb_dup(
; CHECK-NEXT: ret <16 x i8> [[XYZW:%.*]]
@@ -93,6 +130,18 @@ define <4 x double> @constant_blendvpd_avx_zero(<4 x double> %xy, <4 x double> %
ret <4 x double> %1
}
+define <4 x double> @constant_blendvpd_avx_one(<4 x double> %ab) {
+; CHECK-CV-LABEL: @constant_blendvpd_avx_one(
+; CHECK-CV-NEXT: ret <4 x double> zeroinitializer
+;
+; CHECK-CI-LABEL: @constant_blendvpd_avx_one(
+; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> zeroinitializer, <4 x double> [[AB:%.*]], <4 x double> splat (double 1.000000e+00))
+; CHECK-CI-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = tail call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> zeroinitializer, <4 x double> %ab, <4 x double> splat (double 1.000000e+00))
+ ret <4 x double> %1
+}
+
define <4 x double> @constant_blendvpd_avx_dup(<4 x double> %xy, <4 x double> %sel) {
; CHECK-LABEL: @constant_blendvpd_avx_dup(
; CHECK-NEXT: ret <4 x double> [[XY:%.*]]
@@ -118,6 +167,18 @@ define <8 x float> @constant_blendvps_avx_zero(<8 x float> %xyzw, <8 x float> %a
ret <8 x float> %1
}
+define <8 x float> @constant_blendvps_avx_one(<8 x float> %abcd) {
+; CHECK-CV-LABEL: @constant_blendvps_avx_one(
+; CHECK-CV-NEXT: ret <8 x float> zeroinitializer
+;
+; CHECK-CI-LABEL: @constant_blendvps_avx_one(
+; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> zeroinitializer, <8 x float> [[ABCD:%.*]], <8 x float> splat (float 1.000000e+00))
+; CHECK-CI-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = tail call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> zeroinitializer, <8 x float> %abcd, <8 x float> splat (float 1.000000e+00))
+ ret <8 x float> %1
+}
+
define <8 x float> @constant_blendvps_avx_dup(<8 x float> %xyzw, <8 x float> %sel) {
; CHECK-LABEL: @constant_blendvps_avx_dup(
; CHECK-NEXT: ret <8 x float> [[XYZW:%.*]]
@@ -147,6 +208,18 @@ define <32 x i8> @constant_pblendvb_avx2_zero(<32 x i8> %xyzw, <32 x i8> %abcd)
ret <32 x i8> %1
}
+define <32 x i8> @constant_pblendvb_avx2_one(<32 x i8> %abcd) {
+; CHECK-CV-LABEL: @constant_pblendvb_avx2_one(
+; CHECK-CV-NEXT: ret <32 x i8> zeroinitializer
+;
+; CHECK-CI-LABEL: @constant_pblendvb_avx2_one(
+; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> zeroinitializer, <32 x i8> [[ABCD:%.*]], <32 x i8> splat (i8 1))
+; CHECK-CI-NEXT: ret <32 x i8> [[TMP1]]
+;
+ %1 = tail call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> zeroinitializer, <32 x i8> %abcd, <32 x i8> splat (i8 1))
+ ret <32 x i8> %1
+}
+
define <32 x i8> @constant_pblendvb_avx2_dup(<32 x i8> %xyzw, <32 x i8> %sel) {
; CHECK-LABEL: @constant_pblendvb_avx2_dup(
; CHECK-NEXT: ret <32 x i8> [[XYZW:%.*]]
@@ -380,8 +453,12 @@ define <8 x float> @blendvps_demanded_msb(<8 x float> %a, <8 x float> %b, <8 x i
}
define <16 x i8> @pblendvb_or_affects_msb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %m) {
-; CHECK-LABEL: @pblendvb_or_affects_msb(
-; CHECK-NEXT: ret <16 x i8> [[R:%.*]]
+; CHECK-CV-LABEL: @pblendvb_or_affects_msb(
+; CHECK-CV-NEXT: ret <16 x i8> [[R:%.*]]
+;
+; CHECK-CI-LABEL: @pblendvb_or_affects_msb(
+; CHECK-CI-NEXT: [[R:%.*]] = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> splat (i8 -1))
+; CHECK-CI-NEXT: ret <16 x i8> [[R]]
;
%or = or <16 x i8> %m, splat (i8 128)
%r = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %or)
diff --git a/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll b/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
index 297d2b6522611..a041720a817ac 100644
--- a/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
+++ b/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -use-constant-int-for-fixed-length-splat=false -S | FileCheck %s -check-prefixes=CHECK,CHECK-CV
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -use-constant-int-for-fixed-length-splat -S | FileCheck %s -check-prefixes=CHECK,CHECK-CI
;; MASKED LOADS
@@ -48,6 +49,18 @@ define <4 x float> @mload_fake_ones(ptr %f) {
ret <4 x float> %ld
}
+define <4 x float> @mload_fake_ones_splat(ptr %f) {
+; CHECK-CV-LABEL: @mload_fake_ones_splat(
+; CHECK-CV-NEXT: ret <4 x float> zeroinitializer
+;
+; CHECK-CI-LABEL: @mload_fake_ones_splat(
+; CHECK-CI-NEXT: [[LD:%.*]] = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr [[F:%.*]], <4 x i32> splat (i32 1))
+; CHECK-CI-NEXT: ret <4 x float> [[LD]]
+;
+ %ld = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr %f, <4 x i32> splat(i32 1))
+ ret <4 x float> %ld
+}
+
; All mask bits are set, so this is just a vector load.
define <4 x float> @mload_real_ones(ptr %f) {
@@ -59,6 +72,19 @@ define <4 x float> @mload_real_ones(ptr %f) {
ret <4 x float> %ld
}
+define <4 x float> @mload_real_ones_splat(ptr %f) {
+; CHECK-CV-LABEL: @mload_real_ones_splat(
+; CHECK-CV-NEXT: [[UNMASKEDLOAD:%.*]] = load <4 x float>, ptr [[F:%.*]], align 1
+; CHECK-CV-NEXT: ret <4 x float> [[UNMASKEDLOAD]]
+;
+; CHECK-CI-LABEL: @mload_real_ones_splat(
+; CHECK-CI-NEXT: [[LD:%.*]] = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr [[F:%.*]], <4 x i32> splat (i32 -1))
+; CHECK-CI-NEXT: ret <4 x float> [[LD]]
+;
+ %ld = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr %f, <4 x i32> splat(i32 -1))
+ ret <4 x float> %ld
+}
+
; It's a constant mask, so convert to an LLVM intrinsic. The backend should optimize further.
define <4 x float> @mload_one_one(ptr %f) {
>From 4e977bc407677ba468f3ac126b1dfa7b309213ee Mon Sep 17 00:00:00 2001
From: Paul Walker <paul.walker at arm.com>
Date: Thu, 30 Apr 2026 14:49:16 +0100
Subject: [PATCH 2/2] [LLVM][X86InstCombine] Extend mask combines to cover
ConstantInt/FP based splats.
---
.../Target/X86/X86InstCombineIntrinsic.cpp | 8 +--
.../Transforms/InstCombine/X86/blend_x86.ll | 60 +++++--------------
.../InstCombine/X86/x86-masked-memops.ll | 22 +++----
3 files changed, 27 insertions(+), 63 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
index ff4b96e0e6935..932b4a416a8d3 100644
--- a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
@@ -40,8 +40,8 @@ static Constant *getNegativeIsTrueBoolVec(Constant *V, const DataLayout &DL) {
/// each element's most significant bit (the sign bit).
static Value *getBoolVecFromMask(Value *Mask, const DataLayout &DL) {
// Fold Constant Mask.
- if (auto *ConstantMask = dyn_cast<ConstantDataVector>(Mask))
- return getNegativeIsTrueBoolVec(ConstantMask, DL);
+ if (isa<ConstantInt, ConstantFP, ConstantDataVector>(Mask))
+ return getNegativeIsTrueBoolVec(cast<Constant>(Mask), DL);
// Mask was extended from a boolean vector.
Value *ExtMask;
@@ -2973,9 +2973,9 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
}
// Constant Mask - select 1st/2nd argument lane based on top bit of mask.
- if (auto *ConstantMask = dyn_cast<ConstantDataVector>(Mask)) {
+ if (isa<ConstantInt, ConstantFP, ConstantDataVector>(Mask)) {
Constant *NewSelector =
- getNegativeIsTrueBoolVec(ConstantMask, IC.getDataLayout());
+ getNegativeIsTrueBoolVec(cast<Constant>(Mask), IC.getDataLayout());
return SelectInst::Create(NewSelector, Op1, Op0, "blendv");
}
unsigned BitWidth = Mask->getType()->getScalarSizeInBits();
diff --git a/llvm/test/Transforms/InstCombine/X86/blend_x86.ll b/llvm/test/Transforms/InstCombine/X86/blend_x86.ll
index a592f74ee8eb1..75d1a693d4264 100644
--- a/llvm/test/Transforms/InstCombine/X86/blend_x86.ll
+++ b/llvm/test/Transforms/InstCombine/X86/blend_x86.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes=instcombine -mtriple=x86_64-apple-macosx -mcpu=core-avx2 -use-constant-int-for-fixed-length-splat=false -use-constant-fp-for-fixed-length-splat=false -S | FileCheck %s -check-prefixes=CHECK,CHECK-CV
-; RUN: opt < %s -passes=instcombine -mtriple=x86_64-apple-macosx -mcpu=core-avx2 -use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat -S | FileCheck %s -check-prefixes=CHECK,CHECK-CI
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-apple-macosx -mcpu=core-avx2 -use-constant-int-for-fixed-length-splat=false -use-constant-fp-for-fixed-length-splat=false -S | FileCheck %s
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-apple-macosx -mcpu=core-avx2 -use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat -S | FileCheck %s
define <2 x double> @constant_blendvpd(<2 x double> %xy, <2 x double> %ab) {
; CHECK-LABEL: @constant_blendvpd(
@@ -20,12 +20,8 @@ define <2 x double> @constant_blendvpd_zero(<2 x double> %xy, <2 x double> %ab)
}
define <2 x double> @constant_blendvpd_one(<2 x double> %ab) {
-; CHECK-CV-LABEL: @constant_blendvpd_one(
-; CHECK-CV-NEXT: ret <2 x double> zeroinitializer
-;
-; CHECK-CI-LABEL: @constant_blendvpd_one(
-; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> zeroinitializer, <2 x double> [[AB:%.*]], <2 x double> splat (double 1.000000e+00))
-; CHECK-CI-NEXT: ret <2 x double> [[TMP1]]
+; CHECK-LABEL: @constant_blendvpd_one(
+; CHECK-NEXT: ret <2 x double> zeroinitializer
;
%1 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> zeroinitializer, <2 x double> %ab, <2 x double> splat (double 1.000000e+00))
ret <2 x double> %1
@@ -57,12 +53,8 @@ define <4 x float> @constant_blendvps_zero(<4 x float> %xyzw, <4 x float> %abcd)
}
define <4 x float> @constant_blendvps_one(<4 x float> %abcd) {
-; CHECK-CV-LABEL: @constant_blendvps_one(
-; CHECK-CV-NEXT: ret <4 x float> zeroinitializer
-;
-; CHECK-CI-LABEL: @constant_blendvps_one(
-; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> zeroinitializer, <4 x float> [[ABCD:%.*]], <4 x float> splat (float 1.000000e+00))
-; CHECK-CI-NEXT: ret <4 x float> [[TMP1]]
+; CHECK-LABEL: @constant_blendvps_one(
+; CHECK-NEXT: ret <4 x float> zeroinitializer
;
%1 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> zeroinitializer, <4 x float> %abcd, <4 x float> splat (float 1.000000e+00))
ret <4 x float> %1
@@ -94,12 +86,8 @@ define <16 x i8> @constant_pblendvb_zero(<16 x i8> %xyzw, <16 x i8> %abcd) {
}
define <16 x i8> @constant_pblendvb_one(<16 x i8> %abcd) {
-; CHECK-CV-LABEL: @constant_pblendvb_one(
-; CHECK-CV-NEXT: ret <16 x i8> zeroinitializer
-;
-; CHECK-CI-LABEL: @constant_pblendvb_one(
-; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> zeroinitializer, <16 x i8> [[ABCD:%.*]], <16 x i8> splat (i8 1))
-; CHECK-CI-NEXT: ret <16 x i8> [[TMP1]]
+; CHECK-LABEL: @constant_pblendvb_one(
+; CHECK-NEXT: ret <16 x i8> zeroinitializer
;
%1 = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> zeroinitializer, <16 x i8> %abcd, <16 x i8> splat (i8 1))
ret <16 x i8> %1
@@ -131,12 +119,8 @@ define <4 x double> @constant_blendvpd_avx_zero(<4 x double> %xy, <4 x double> %
}
define <4 x double> @constant_blendvpd_avx_one(<4 x double> %ab) {
-; CHECK-CV-LABEL: @constant_blendvpd_avx_one(
-; CHECK-CV-NEXT: ret <4 x double> zeroinitializer
-;
-; CHECK-CI-LABEL: @constant_blendvpd_avx_one(
-; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> zeroinitializer, <4 x double> [[AB:%.*]], <4 x double> splat (double 1.000000e+00))
-; CHECK-CI-NEXT: ret <4 x double> [[TMP1]]
+; CHECK-LABEL: @constant_blendvpd_avx_one(
+; CHECK-NEXT: ret <4 x double> zeroinitializer
;
%1 = tail call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> zeroinitializer, <4 x double> %ab, <4 x double> splat (double 1.000000e+00))
ret <4 x double> %1
@@ -168,12 +152,8 @@ define <8 x float> @constant_blendvps_avx_zero(<8 x float> %xyzw, <8 x float> %a
}
define <8 x float> @constant_blendvps_avx_one(<8 x float> %abcd) {
-; CHECK-CV-LABEL: @constant_blendvps_avx_one(
-; CHECK-CV-NEXT: ret <8 x float> zeroinitializer
-;
-; CHECK-CI-LABEL: @constant_blendvps_avx_one(
-; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> zeroinitializer, <8 x float> [[ABCD:%.*]], <8 x float> splat (float 1.000000e+00))
-; CHECK-CI-NEXT: ret <8 x float> [[TMP1]]
+; CHECK-LABEL: @constant_blendvps_avx_one(
+; CHECK-NEXT: ret <8 x float> zeroinitializer
;
%1 = tail call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> zeroinitializer, <8 x float> %abcd, <8 x float> splat (float 1.000000e+00))
ret <8 x float> %1
@@ -209,12 +189,8 @@ define <32 x i8> @constant_pblendvb_avx2_zero(<32 x i8> %xyzw, <32 x i8> %abcd)
}
define <32 x i8> @constant_pblendvb_avx2_one(<32 x i8> %abcd) {
-; CHECK-CV-LABEL: @constant_pblendvb_avx2_one(
-; CHECK-CV-NEXT: ret <32 x i8> zeroinitializer
-;
-; CHECK-CI-LABEL: @constant_pblendvb_avx2_one(
-; CHECK-CI-NEXT: [[TMP1:%.*]] = tail call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> zeroinitializer, <32 x i8> [[ABCD:%.*]], <32 x i8> splat (i8 1))
-; CHECK-CI-NEXT: ret <32 x i8> [[TMP1]]
+; CHECK-LABEL: @constant_pblendvb_avx2_one(
+; CHECK-NEXT: ret <32 x i8> zeroinitializer
;
%1 = tail call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> zeroinitializer, <32 x i8> %abcd, <32 x i8> splat (i8 1))
ret <32 x i8> %1
@@ -453,12 +429,8 @@ define <8 x float> @blendvps_demanded_msb(<8 x float> %a, <8 x float> %b, <8 x i
}
define <16 x i8> @pblendvb_or_affects_msb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %m) {
-; CHECK-CV-LABEL: @pblendvb_or_affects_msb(
-; CHECK-CV-NEXT: ret <16 x i8> [[R:%.*]]
-;
-; CHECK-CI-LABEL: @pblendvb_or_affects_msb(
-; CHECK-CI-NEXT: [[R:%.*]] = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> splat (i8 -1))
-; CHECK-CI-NEXT: ret <16 x i8> [[R]]
+; CHECK-LABEL: @pblendvb_or_affects_msb(
+; CHECK-NEXT: ret <16 x i8> [[R:%.*]]
;
%or = or <16 x i8> %m, splat (i8 128)
%r = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %or)
diff --git a/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll b/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
index a041720a817ac..05976214ca179 100644
--- a/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
+++ b/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -use-constant-int-for-fixed-length-splat=false -S | FileCheck %s -check-prefixes=CHECK,CHECK-CV
-; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -use-constant-int-for-fixed-length-splat -S | FileCheck %s -check-prefixes=CHECK,CHECK-CI
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -use-constant-int-for-fixed-length-splat=false -S | FileCheck %s
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -use-constant-int-for-fixed-length-splat -S | FileCheck %s
;; MASKED LOADS
@@ -50,12 +50,8 @@ define <4 x float> @mload_fake_ones(ptr %f) {
}
define <4 x float> @mload_fake_ones_splat(ptr %f) {
-; CHECK-CV-LABEL: @mload_fake_ones_splat(
-; CHECK-CV-NEXT: ret <4 x float> zeroinitializer
-;
-; CHECK-CI-LABEL: @mload_fake_ones_splat(
-; CHECK-CI-NEXT: [[LD:%.*]] = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr [[F:%.*]], <4 x i32> splat (i32 1))
-; CHECK-CI-NEXT: ret <4 x float> [[LD]]
+; CHECK-LABEL: @mload_fake_ones_splat(
+; CHECK-NEXT: ret <4 x float> zeroinitializer
;
%ld = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr %f, <4 x i32> splat(i32 1))
ret <4 x float> %ld
@@ -73,13 +69,9 @@ define <4 x float> @mload_real_ones(ptr %f) {
}
define <4 x float> @mload_real_ones_splat(ptr %f) {
-; CHECK-CV-LABEL: @mload_real_ones_splat(
-; CHECK-CV-NEXT: [[UNMASKEDLOAD:%.*]] = load <4 x float>, ptr [[F:%.*]], align 1
-; CHECK-CV-NEXT: ret <4 x float> [[UNMASKEDLOAD]]
-;
-; CHECK-CI-LABEL: @mload_real_ones_splat(
-; CHECK-CI-NEXT: [[LD:%.*]] = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr [[F:%.*]], <4 x i32> splat (i32 -1))
-; CHECK-CI-NEXT: ret <4 x float> [[LD]]
+; CHECK-LABEL: @mload_real_ones_splat(
+; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <4 x float>, ptr [[F:%.*]], align 1
+; CHECK-NEXT: ret <4 x float> [[UNMASKEDLOAD]]
;
%ld = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr %f, <4 x i32> splat(i32 -1))
ret <4 x float> %ld
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