[llvm] AMDGPU/GlobalISel: Implement RegBankLegalizeRules for amdgcn_log, amdgcn_rcp, and amdgcn_sqrt (PR #195099)

Petar Avramovic via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 30 08:16:14 PDT 2026


================
@@ -300,13 +331,18 @@ define amdgpu_cs float @v_amdgcn_sqrt_f32(float inreg %src)  {
 }
 
 define amdgpu_cs half @v_amdgcn_sqrt_f16(half inreg %src)  {
-; GFX12-LABEL: v_amdgcn_sqrt_f16:
-; GFX12:       ; %bb.0:
-; GFX12-NEXT:    v_s_sqrt_f16 s0, s0
-; GFX12-NEXT:    s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT:    s_delay_alu instid0(TRANS32_DEP_1)
-; GFX12-NEXT:    v_mov_b32_e32 v0, s0
-; GFX12-NEXT:    ; return to shader part epilog
+; GFX12-SDAG-LABEL: v_amdgcn_sqrt_f16:
+; GFX12-SDAG:       ; %bb.0:
+; GFX12-SDAG-NEXT:    v_s_sqrt_f16 s0, s0
+; GFX12-SDAG-NEXT:    s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-NEXT:    s_delay_alu instid0(TRANS32_DEP_1)
+; GFX12-SDAG-NEXT:    v_mov_b32_e32 v0, s0
+; GFX12-SDAG-NEXT:    ; return to shader part epilog
+;
+; GFX12-GISEL-LABEL: v_amdgcn_sqrt_f16:
+; GFX12-GISEL:       ; %bb.0:
+; GFX12-GISEL-NEXT:    v_sqrt_f16_e32 v0.l, s0
----------------
petar-avramovic wrote:

globalisel did not generate v_s_sqrt_f16 so that is why there is such notable difference.
but in general s_wait_alu and s_delay_alu are generated/removed by later passes and should be correct regardless of sdag/globalisel

https://github.com/llvm/llvm-project/pull/195099


More information about the llvm-commits mailing list