[llvm] [GlobalISel] Add srem-by-pow2 combine to intrem_combines (PR #194673)
Alex MacLean via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 30 07:15:58 PDT 2026
================
@@ -6103,6 +6103,58 @@ void CombinerHelper::applyUDivByPow2(MachineInstr &MI) const {
MI.eraseFromParent();
}
+/// \p Reg is known to be +/- a power of 2.
+bool CombinerHelper::matchAbsPow2(Register Reg) const {
+ // Known bits only work for positive powers of 2.
+ if (isKnownToBeAPowerOfTwo(Reg, MRI, VT))
+ return true;
+
+ // Otherwise accept any constant whose absolute value is a power of 2.
----------------
AlexMaclean wrote:
This special case is for negative powers of 2 which won't be handled by isKnownToBeAPowerOfTwo since that is looking for 1 bit set.
https://github.com/llvm/llvm-project/pull/194673
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