[clang] [llvm] [RegAlloc] [X86] Enable callee saved register optimization for x86 (PR #188609)

[Matt Arsenault via llvm-commits]

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@@ -1229,3 +1229,13 @@ bool X86RegisterInfo::isNonRex2RegClass(const TargetRegisterClass *RC) const {
     return true;
   }
 }
+
+unsigned X86RegisterInfo::getCSRFirstUseCost(const MachineFunction &MF) const {
+  // If PPX is implemented, push/pop pairs doesn't access memory.
+  const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>();
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arsenm wrote:

TargetRegisterInfo is owned by the subtarget, in principle you should be able to get the subtarget directly here without passing in the function to find it 

https://github.com/llvm/llvm-project/pull/188609