[llvm] [AMDGPU] Extend max3/min3 tree-reduction combine to cover ternary chains (PR #194845)

[Dmitry Sidorov via llvm-commits]

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@@ -16012,21 +16012,26 @@ SDValue SITargetLowering::performMinMaxCombine(SDNode *N,
 
   if (supportsMin3Max3(*Subtarget, Opc, VT)) {
     auto IsTreeWithCombinableChildren = [Opc](SDValue Op) {
-      return Op.getOperand(0).getOpcode() == Opc &&
-             Op.getOperand(1).getOpcode() == Opc &&
-             (Op.getOperand(0).hasOneUse() || Op.getOperand(1).hasOneUse());
+      return (Op.getOperand(0).getOpcode() == Opc &&
+              Op.getOperand(0).hasOneUse()) ||
+             (Op.getOperand(1).getOpcode() == Opc &&
+              Op.getOperand(1).hasOneUse());
     };
 
+    bool TreeCombineApplies = Op0.getOpcode() == Opc && Op0.hasOneUse() &&
+                              Op1.getOpcode() == Opc && Op1.hasOneUse();
+    bool TreeCombineDeferred =
+        TreeCombineApplies && (IsTreeWithCombinableChildren(Op0) ||
+                               IsTreeWithCombinableChildren(Op1));
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MrSidims wrote:

Apologies, it was not about renaming, but mostly about moving CanTreeCombineApply out of the check :)

again, not a blocker.

https://github.com/llvm/llvm-project/pull/194845