[llvm] [AMDGPU] IGroupLP: Avoid DAG manipulation in greedyFind (PR #194827)

[Matt Arsenault via llvm-commits]

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@@ -469,6 +512,117 @@ int PipelineSolver::linkSUnit(
   return AddedCost;
 }
 
+template <bool ComputePreds>
+void PipelineSolver::EdgeSetBuilder::computeReachable(
+    DenseSet<SUnit *> &Reachable, SUnit *Start) {
+  if (!Reachable.insert(Start).second)
+    return;
+
+  SmallVector<SUnit *, 32> WorkList;
+  WorkList.push_back(Start);
+
+  while (!WorkList.empty()) {
+    SUnit *Current = WorkList.pop_back_val();
+
+    for (const SDep &Dep : ComputePreds ? Current->Preds : Current->Succs) {
+      if (Reachable.insert(Dep.getSUnit()).second)
+        WorkList.push_back(Dep.getSUnit());
+    }
+  }
+}
+
+void PipelineSolver::EdgeSetBuilder::computePreds(DenseSet<SUnit *> &Preds,
+                                                  SUnit *Start) {
+  computeReachable<true>(Preds, Start);
+}
+
+void PipelineSolver::EdgeSetBuilder::computeSuccs(DenseSet<SUnit *> &Succs,
+                                                  SUnit *Start) {
+  computeReachable<false>(Succs, Start);
+}
+
+int PipelineSolver::EdgeSetBuilder::build(
+    int SGID, std::list<std::pair<SUnit *, SUnit *>> &NewEdges) {
+  if (!Initialized) {
+    computePreds(InitialPreds, SU);
+    computeSuccs(Succs, SU);
+    Initialized = true;
+  }
+
+  // See comment in addEdges concerning the iterator direction.
+  return IsBottomUp ? buildImpl(SGID,
+                                llvm::make_range(SyncPipeline.rbegin(),
+                                                 SyncPipeline.rend()),
+                                NewEdges)
+                    : buildImpl(SGID,
+                                llvm::make_range(SyncPipeline.begin(),
+                                                 SyncPipeline.end()),
+                                NewEdges);
+}
+
+template <typename T>
+int PipelineSolver::EdgeSetBuilder::buildImpl(
+    int SGID, iterator_range<T> SchedGroups,
+    std::list<std::pair<SUnit *, SUnit *>> &NewEdges) {
+
+  // Determine the edges that will be added to the DAG if SU is
+  // assigned to the SchedGroup SG with the given SGID.  It might be
+  // impossible to add some edges because they would introduce
+  // cycles. The number of such edges is counted and returned, all
+  // other edges are added to NewEdges.
+  //
+  // SU is made a successor of SUnits in SchedGroups before SG, and a
+  // predecessor of SUnits after SG.  In each case, the cycle check
+  // requires reachability information for the opposing direction.
+
+  // Nodes U that can reach SU (U ~> SU).
+  // Will be extended as new edges are added and hence cannot be
+  // shared between calls to this function, in contrast to Succs.
+  DenseSet<SUnit *> Preds = InitialPreds;
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arsenm wrote:

Why is this a copy 

https://github.com/llvm/llvm-project/pull/194827