[llvm] [AMDGPU] Fix waterfall inreg call args on gfx90a: hoist defs + avoid AGPR sources (PR #194890)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,47 @@
+; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -O3 -verify-machineinstrs < %s | FileCheck %s
+
+; On gfx90a, an inreg call argument can be allocated to an AV_* register
+; class (VGPR-or-AGPR). The waterfall loop in SIInstrInfo's
+; emitLoadScalarOpsFromVGPRLoop must not feed an AGPR source directly into
+; V_READFIRSTLANE_B32 / V_CMP_EQ_U32_e64; doing so trips the verifier with
+; "Operand has incorrect register class" (`$sgprN = V_READFIRSTLANE_B32
+; $agpr0`) and aborts in LiveRangeCalc / MachineVerifier. The fix demotes
+; the operand into a pure VGPR class via a COPY before reading it in the
+; loop.
+
+ at G   = global ptr poison
+ at G.1 = global ptr poison
+ at G.2 = global ptr addrspace(1) poison
+ at G.3 = global ptr addrspace(3) poison
+ at G.4 = global ptr addrspace(5) poison
+ at G.5 = global ptr addrspace(5) poison
+
+declare amdgpu_cs_chain_preserve void @callee(ptr inreg, ptr,
+                                              ptr addrspace(1) inreg,
+                                              ptr addrspace(1),
+                                              ptr addrspace(3) inreg,
+                                              ptr addrspace(3),
+                                              ptr addrspace(5) inreg,
+                                              ptr addrspace(5))
+
+; The call must waterfall the inreg operands. The source of every emitted
+; v_readfirstlane_b32 in this loop must be a VGPR (v#), never an AGPR (a#);
+; otherwise we hit "Operand has incorrect register class" on gfx90a.
+;
+; CHECK-LABEL: chain_preserve_caller:
+; CHECK-NOT:  v_readfirstlane_b32 s{{[0-9]+}}, a{{[0-9]+}}
----------------
arsenm wrote:

-CHECK-NOT should very rarely be used, this should use generated checks 

https://github.com/llvm/llvm-project/pull/194890