[llvm] [LV][NFC] Remove instcombine from RUN lines when it has no effect (PR #194874)

[David Sherwood via llvm-commits]

https://github.com/david-arm updated https://github.com/llvm/llvm-project/pull/194874

>From 7fe188f4037ad9591175aa8be7d25251607567b8 Mon Sep 17 00:00:00 2001
From: David Sherwood <david.sherwood at arm.com>
Date: Wed, 29 Apr 2026 14:44:23 +0000
Subject: [PATCH 1/2] [LV][NFC] Remove instcombine from RUN lines when it has
 no effect

---
 .../LoopVectorize/AArch64/max-vf-for-interleaved.ll           | 2 +-
 llvm/test/Transforms/LoopVectorize/global_alias.ll            | 2 +-
 llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll              | 4 ++--
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/max-vf-for-interleaved.ll b/llvm/test/Transforms/LoopVectorize/AArch64/max-vf-for-interleaved.ll
index ca53ec612a99f..b5bf3def7fdce 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/max-vf-for-interleaved.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/max-vf-for-interleaved.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -force-vector-interleave=1 -store-to-load-forwarding-conflict-detection=false -passes=loop-vectorize,instcombine -S | FileCheck %s
+; RUN: opt < %s -force-vector-interleave=1 -store-to-load-forwarding-conflict-detection=false -passes=loop-vectorize -S | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
 target triple = "aarch64--linux-gnu"
diff --git a/llvm/test/Transforms/LoopVectorize/global_alias.ll b/llvm/test/Transforms/LoopVectorize/global_alias.ll
index 51f8e39bc7741..cf4cf8eb68290 100644
--- a/llvm/test/Transforms/LoopVectorize/global_alias.ll
+++ b/llvm/test/Transforms/LoopVectorize/global_alias.ll
@@ -1,4 +1,4 @@
-; RUN: opt -passes='loop-vectorize,instcombine' -force-vector-interleave=1 -force-vector-width=4 -S %s | FileCheck %s
+; RUN: opt -passes='loop-vectorize' -force-vector-interleave=1 -force-vector-width=4 -S %s | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
 
diff --git a/llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll b/llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
index c28c98b4b470f..7003f11d7a57d 100644
--- a/llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
+++ b/llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
@@ -1,5 +1,5 @@
-; RUN: opt < %s  -aa-pipeline=tbaa,basic-aa -passes=loop-vectorize,instcombine,simplifycfg -force-vector-interleave=1 -force-vector-width=4 -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
-; RUN: opt < %s  -aa-pipeline=basic-aa -passes=loop-vectorize,instcombine,simplifycfg -force-vector-interleave=1 -force-vector-width=4 -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s --check-prefix=CHECK-NOTBAA
+; RUN: opt < %s  -aa-pipeline=tbaa,basic-aa -passes=loop-vectorize,simplifycfg -force-vector-interleave=1 -force-vector-width=4 -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
+; RUN: opt < %s  -aa-pipeline=basic-aa -passes=loop-vectorize,simplifycfg -force-vector-interleave=1 -force-vector-width=4 -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s --check-prefix=CHECK-NOTBAA
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 ; TBAA partitions the accesses in this loop, so it can be vectorized without

>From 653ccac21c8459cadc93b527aefcc3962d96e5ea Mon Sep 17 00:00:00 2001
From: David Sherwood <david.sherwood at arm.com>
Date: Wed, 29 Apr 2026 15:28:01 +0000
Subject: [PATCH 2/2] Address review comment

---
 llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll b/llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
index 7003f11d7a57d..a2ca6c280621c 100644
--- a/llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
+++ b/llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
@@ -1,5 +1,5 @@
-; RUN: opt < %s  -aa-pipeline=tbaa,basic-aa -passes=loop-vectorize,simplifycfg -force-vector-interleave=1 -force-vector-width=4 -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
-; RUN: opt < %s  -aa-pipeline=basic-aa -passes=loop-vectorize,simplifycfg -force-vector-interleave=1 -force-vector-width=4 -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s --check-prefix=CHECK-NOTBAA
+; RUN: opt < %s  -aa-pipeline=tbaa,basic-aa -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck %s
+; RUN: opt < %s  -aa-pipeline=basic-aa -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck %s --check-prefix=CHECK-NOTBAA
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 ; TBAA partitions the accesses in this loop, so it can be vectorized without
@@ -7,7 +7,6 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 define i32 @test1(ptr nocapture %a, ptr nocapture readonly %b) {
 ; CHECK-LABEL: @test1
 ; CHECK: entry:
-; CHECK-NEXT: br label %vector.body
 ; CHECK: vector.body:
 
 ; CHECK: load <4 x float>, ptr %{{.*}}, align 4, !tbaa
@@ -19,7 +18,7 @@ define i32 @test1(ptr nocapture %a, ptr nocapture readonly %b) {
 ; CHECK-NOTBAA: entry:
 ; CHECK-NOTBAA: icmp ult i64
 ; CHECK-NOTBAA-NOT: icmp
-; CHECK-NOTBAA: br i1 {{.+}}, label %for.body, label %vector.body
+; CHECK-NOTBAA: vector.body:
 
 ; CHECK-NOTBAA: load <4 x float>, ptr %{{.*}}, align 4, !tbaa
 ; CHECK-NOTBAA: store <4 x i32> %{{.*}}, ptr %{{.*}}, align 4, !tbaa
@@ -51,7 +50,7 @@ define i32 @test2(ptr nocapture readonly %a, ptr nocapture readonly %b, ptr noca
 ; CHECK: entry:
 ; CHECK: icmp ult i64
 ; CHECK-NOT: icmp
-; CHECK: br i1 {{.+}}, label %for.body, label %vector.body
+; CHECK: vector.body:
 
 ; CHECK: load <4 x float>, ptr %{{.*}}, align 4, !tbaa
 ; CHECK: store <4 x float> %{{.*}}, ptr %{{.*}}, align 4, !tbaa
@@ -63,7 +62,7 @@ define i32 @test2(ptr nocapture readonly %a, ptr nocapture readonly %b, ptr noca
 ; CHECK-NOTBAA: icmp ult i64
 ; CHECK-NOTBAA: icmp ult i64
 ; CHECK-NOTBAA-NOT: icmp
-; CHECK-NOTBAA: br i1 {{.+}}, label %for.body, label %vector.body
+; CHECK-NOTBAA: vector.body:
 
 ; CHECK-NOTBAA: load <4 x float>, ptr %{{.*}}, align 4, !tbaa
 ; CHECK-NOTBAA: store <4 x float> %{{.*}}, ptr %{{.*}}, align 4, !tbaa