[llvm] [RISCV][GISel] Support select G_INSERT_VECTOR_ELT (PR #176687)

[Jianjian Guan via llvm-commits]

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@@ -136,6 +138,45 @@ RISCVPostLegalizerCombinerImpl::RISCVPostLegalizerCombinerImpl(
 {
 }
 
+bool RISCVPostLegalizerCombinerImpl::tryCombineAll(MachineInstr &MI) const {
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jacquesguan wrote:

This part is similar to `RISCVTargetLowering::PerformDAGCombine`. Since we can only match the pattern of no-group vector type for vmv.s, we should make sure that we only use M1 or smaller vector before selection. I think this is more like part of CodeGen.

https://github.com/llvm/llvm-project/pull/176687