[llvm] 16897c2 - [WebAssembly][GlobalISel] Migrate to extended LLT (#193047)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 28 16:06:11 PDT 2026
Author: Demetrius Kanios
Date: 2026-04-28T16:06:06-07:00
New Revision: 16897c234a2980e913113d91bcf824ec8dbc429b
URL: https://github.com/llvm/llvm-project/commit/16897c234a2980e913113d91bcf824ec8dbc429b
DIFF: https://github.com/llvm/llvm-project/commit/16897c234a2980e913113d91bcf824ec8dbc429b.diff
LOG: [WebAssembly][GlobalISel] Migrate to extended LLT (#193047)
Moves Wasm GISel to use the the new extended LLTs added by #155107.
Extended LLTs have (optional) information about whether a particular
scalar is integer vs floating-point. This is a big win for Wasm, since
we can avoid a lot of guess work, and map LLT i32, i64, f32, and f64
directly to their Wasm counterparts.
To take full advantage of this, RegBankSelect has been automated,
iterating over all operands and mapping typed LLTs to their appropriate
register bank.
Added:
Modified:
llvm/lib/Target/WebAssembly/CMakeLists.txt
llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir
llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/WebAssembly/CMakeLists.txt b/llvm/lib/Target/WebAssembly/CMakeLists.txt
index 39ee5e86f0191..ef5f7d11e7e49 100644
--- a/llvm/lib/Target/WebAssembly/CMakeLists.txt
+++ b/llvm/lib/Target/WebAssembly/CMakeLists.txt
@@ -15,7 +15,7 @@ tablegen(LLVM WebAssemblyGenSDNodeInfo.inc -gen-sd-node-info)
tablegen(LLVM WebAssemblyGenSubtargetInfo.inc -gen-subtarget)
set(LLVM_TARGET_DEFINITIONS WebAssemblyGISel.td)
-tablegen(LLVM WebAssemblyGenGlobalISel.inc -gen-global-isel)
+tablegen(LLVM WebAssemblyGenGlobalISel.inc -gen-global-isel -gisel-extended-llt)
tablegen(LLVM WebAssemblyGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
-combiners="WebAssemblyPreLegalizerCombiner")
tablegen(LLVM WebAssemblyGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
diff --git a/llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp b/llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
index 29997f67db0cd..12c53c788f7bc 100644
--- a/llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
+++ b/llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
@@ -25,24 +25,27 @@ WebAssemblyLegalizerInfo::WebAssemblyLegalizerInfo(
const WebAssemblySubtarget &ST) {
using namespace TargetOpcode;
+ const LLT i32 = LLT::integer(32);
+ const LLT i64 = LLT::integer(64);
+
const LLT s32 = LLT::scalar(32);
const LLT s64 = LLT::scalar(64);
getActionDefinitionsBuilder({G_CONSTANT, G_IMPLICIT_DEF, G_ADD, G_SUB, G_MUL,
G_UDIV, G_SDIV, G_UREM, G_SREM, G_AND, G_OR,
G_XOR})
- .legalFor({s32, s64})
+ .legalFor({i32, i64})
.widenScalarToNextPow2(0)
.clampScalar(0, s32, s64);
getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL})
- .legalFor({{s32, s32}, {s64, s64}})
+ .legalFor({{i32, i32}, {i64, i64}})
.widenScalarToNextPow2(0)
.clampScalar(0, s32, s64)
.scalarSameSizeAs(1, 0);
getActionDefinitionsBuilder({G_CTLZ, G_CTTZ, G_CTPOP})
- .legalFor({{s32, s32}, {s64, s64}})
+ .legalFor({{i32, i32}, {i64, i64}})
.widenScalarToNextPow2(1)
.clampScalar(1, s32, s64)
.scalarSameSizeAs(0, 1);
@@ -50,24 +53,24 @@ WebAssemblyLegalizerInfo::WebAssemblyLegalizerInfo(
getActionDefinitionsBuilder({G_CTLZ_ZERO_UNDEF, G_CTTZ_ZERO_UNDEF}).lower();
getActionDefinitionsBuilder({G_ROTL, G_ROTR})
- .legalFor({{s32, s32}, {s64, s64}})
+ .legalFor({{i32, i32}, {i64, i64}})
.scalarSameSizeAs(1, 0)
.lower();
getActionDefinitionsBuilder({G_FSHL, G_FSHR}).lower();
getActionDefinitionsBuilder({G_ANYEXT, G_SEXT, G_ZEXT})
- .legalFor({{s64, s32}})
+ .legalFor({{i64, i32}})
.clampScalar(0, s64, s64)
.clampScalar(1, s32, s32);
getActionDefinitionsBuilder(G_TRUNC)
- .legalFor({{s32, s64}})
+ .legalFor({{i32, i64}})
.clampScalar(0, s32, s32)
.clampScalar(1, s64, s64);
getActionDefinitionsBuilder(G_SEXT_INREG)
- .customFor(ST.hasSignExt(), {s32, s64})
+ .customFor(ST.hasSignExt(), {i32, i64})
.clampScalar(0, s32, s64)
.lower();
diff --git a/llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp b/llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
index ef1b5bcc65a96..3d370d04c0879 100644
--- a/llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
+++ b/llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
@@ -31,29 +31,9 @@ enum PartialMappingIdx {
PMI_Min = PMI_I32,
};
-enum ValueMappingIdx {
- InvalidIdx = 0,
- I32Idx = 1,
- I64Idx = 5,
-};
-
const RegisterBankInfo::PartialMapping PartMappings[]{{0, 32, I32RegBank},
{0, 64, I64RegBank}};
-const RegisterBankInfo::ValueMapping ValueMappings[] = {
- // invalid
- {nullptr, 0},
- // up to 4 operands as I32
- {&PartMappings[PMI_I32 - PMI_Min], 1},
- {&PartMappings[PMI_I32 - PMI_Min], 1},
- {&PartMappings[PMI_I32 - PMI_Min], 1},
- {&PartMappings[PMI_I32 - PMI_Min], 1},
- // up to 4 operands as I64
- {&PartMappings[PMI_I64 - PMI_Min], 1},
- {&PartMappings[PMI_I64 - PMI_Min], 1},
- {&PartMappings[PMI_I64 - PMI_Min], 1},
- {&PartMappings[PMI_I64 - PMI_Min], 1},
-};
} // namespace WebAssembly
} // namespace llvm
@@ -67,8 +47,6 @@ WebAssemblyRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
unsigned Opc = MI.getOpcode();
const MachineFunction &MF = *MI.getParent()->getParent();
const MachineRegisterInfo &MRI = MF.getRegInfo();
- const WebAssemblySubtarget &STI = MF.getSubtarget<WebAssemblySubtarget>();
- const WebAssemblyRegisterInfo &TRI = *STI.getRegisterInfo();
if ((Opc != TargetOpcode::COPY && !isPreISelGenericOpcode(Opc)) ||
Opc == TargetOpcode::G_PHI) {
@@ -78,93 +56,54 @@ WebAssemblyRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
return Mapping;
}
- const unsigned NumOperands = MI.getNumOperands();
- const ValueMapping *OperandsMapping = nullptr;
+ const unsigned NumOperands = MI.isCopyLike() ? 1 : MI.getNumOperands();
unsigned MappingID = DefaultMappingID;
- const LLT Op0Ty = MRI.getType(MI.getOperand(0).getReg());
- unsigned Op0Size = Op0Ty.getSizeInBits();
-
- auto &Op0IntValueMapping =
- WebAssembly::ValueMappings[Op0Size == 64 ? WebAssembly::I64Idx
- : WebAssembly::I32Idx];
-
- using namespace TargetOpcode;
- switch (Opc) {
- case G_CONSTANT:
- OperandsMapping = getOperandsMapping({&Op0IntValueMapping, nullptr});
- break;
- case G_IMPLICIT_DEF:
- OperandsMapping = &Op0IntValueMapping;
- break;
- case G_ADD:
- case G_SUB:
- case G_MUL:
- case G_UDIV:
- case G_SDIV:
- case G_UREM:
- case G_SREM:
- case G_AND:
- case G_OR:
- case G_XOR:
- case G_ASHR:
- case G_LSHR:
- case G_SHL:
- case G_CTLZ:
- case G_CTLZ_ZERO_UNDEF:
- case G_CTTZ:
- case G_CTTZ_ZERO_UNDEF:
- case G_CTPOP:
- case G_ROTL:
- case G_ROTR:
- OperandsMapping = &Op0IntValueMapping;
- break;
- case G_ZEXT:
- case G_ANYEXT:
- case G_SEXT:
- case G_TRUNC: {
- const LLT Op1Ty = MRI.getType(MI.getOperand(1).getReg());
- unsigned Op1Size = Op1Ty.getSizeInBits();
-
- auto &Op1IntValueMapping =
- WebAssembly::ValueMappings[Op1Size == 64 ? WebAssembly::I64Idx
- : WebAssembly::I32Idx];
- OperandsMapping =
- getOperandsMapping({&Op0IntValueMapping, &Op1IntValueMapping});
- break;
- }
- case G_SEXT_INREG:
- OperandsMapping =
- getOperandsMapping({&Op0IntValueMapping, &Op0IntValueMapping, nullptr});
- break;
- case COPY: {
- Register DstReg = MI.getOperand(0).getReg();
- Register SrcReg = MI.getOperand(1).getReg();
-
- const RegisterBank *DstRB = getRegBank(DstReg, MRI, TRI);
- const RegisterBank *SrcRB = getRegBank(SrcReg, MRI, TRI);
-
- if (!DstRB)
- DstRB = SrcRB;
- else if (!SrcRB)
- SrcRB = DstRB;
-
- assert(DstRB && SrcRB && "Both RegBank were nullptr");
-
- if (DstRB != SrcRB) {
- break; // for now, only allow no-op copies
+ // Track the size and bank of each register. We don't do partial mappings.
+ SmallVector<unsigned, 8> OpSize(NumOperands);
+ SmallVector<WebAssembly::PartialMappingIdx, 8> OpRegBankIdx(NumOperands);
+ for (unsigned Idx = 0; Idx < NumOperands; ++Idx) {
+ auto &MO = MI.getOperand(Idx);
+ if (!MO.isReg() || !MO.getReg())
+ continue;
+
+ LLT Ty = MRI.getType(MO.getReg());
+ if (!Ty.isValid())
+ continue;
+
+ OpSize[Idx] = Ty.getSizeInBits().getKnownMinValue();
+
+ if (Ty.isInteger()) {
+ if (OpSize[Idx] == 32) {
+ OpRegBankIdx[Idx] = WebAssembly::PMI_I32;
+ } else if (OpSize[Idx] == 64) {
+ OpRegBankIdx[Idx] = WebAssembly::PMI_I64;
+ }
}
-
- return getInstructionMapping(
- MappingID, /*Cost=*/1, &Op0IntValueMapping,
- // We only care about the mapping of the destination for COPY.
- 1);
- }
}
- if (!OperandsMapping)
- return getInvalidInstructionMapping();
+ SmallVector<const ValueMapping *, 8> OpdsMapping(NumOperands);
+ for (unsigned Idx = 0; Idx < NumOperands; ++Idx) {
+ if (MI.getOperand(Idx).isReg() && MI.getOperand(Idx).getReg()) {
+ LLT Ty = MRI.getType(MI.getOperand(Idx).getReg());
+ if (!Ty.isValid())
+ continue;
+
+ if (OpRegBankIdx[Idx] <= 0) {
+ return getInvalidInstructionMapping();
+ }
+
+ const auto &Mapping = getValueMapping(
+ &WebAssembly::PartMappings[OpRegBankIdx[Idx] - WebAssembly::PMI_Min],
+ 1);
+
+ if (!Mapping.isValid())
+ return getInvalidInstructionMapping();
+
+ OpdsMapping[Idx] = &Mapping;
+ }
+ }
- return getInstructionMapping(MappingID, /*Cost=*/1, OperandsMapping,
- NumOperands);
+ return getInstructionMapping(MappingID, /*Cost=*/1,
+ getOperandsMapping(OpdsMapping), NumOperands);
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index ac6c2969cecda..f533e839fe6d0 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -215,6 +215,9 @@ WebAssemblyTargetMachine::WebAssemblyTargetMachine(
basicCheckForEHAndSjLj(this);
initAsmInfo();
+
+ LLT::setUseExtended(true);
+
// Note that we don't use setRequiresStructuredCFG(true). It disables
// optimizations than we're ok with, and want, such as critical edge
// splitting and tail merging.
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir
index 272175ef35dbc..4ce64cc824a82 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir
@@ -13,10 +13,10 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: RETURN [[ARGUMENT_i32_]], implicit-def $arguments
- %1:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s8) = G_TRUNC %1(s32)
- %2:i32(s32) = G_ANYEXT %0(s8)
- RETURN %2(s32), implicit-def $arguments
+ %1:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i8) = G_TRUNC %1(i32)
+ %2:i32(i32) = G_ANYEXT %0(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: aext_i8_i64
@@ -31,10 +31,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: [[I64_EXTEND_U_I32_:%[0-9]+]]:i64 = I64_EXTEND_U_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I64_EXTEND_U_I32_]], implicit-def $arguments
- %1:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s8) = G_TRUNC %1(s32)
- %2:i64(s64) = G_ANYEXT %0(s8)
- RETURN %2(s64), implicit-def $arguments
+ %1:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i8) = G_TRUNC %1(i32)
+ %2:i64(i64) = G_ANYEXT %0(i8)
+ RETURN %2(i64), implicit-def $arguments
...
---
@@ -49,10 +49,10 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: RETURN [[ARGUMENT_i32_]], implicit-def $arguments
- %1:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s16) = G_TRUNC %1(s32)
- %2:i32(s32) = G_ANYEXT %0(s16)
- RETURN %2(s32), implicit-def $arguments
+ %1:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i16) = G_TRUNC %1(i32)
+ %2:i32(i32) = G_ANYEXT %0(i16)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: aext_i16_i64
@@ -67,10 +67,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: [[I64_EXTEND_U_I32_:%[0-9]+]]:i64 = I64_EXTEND_U_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I64_EXTEND_U_I32_]], implicit-def $arguments
- %1:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s16) = G_TRUNC %1(s32)
- %2:i64(s64) = G_ANYEXT %0(s16)
- RETURN %2(s64), implicit-def $arguments
+ %1:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i16) = G_TRUNC %1(i32)
+ %2:i64(i64) = G_ANYEXT %0(i16)
+ RETURN %2(i64), implicit-def $arguments
...
---
name: aext_i32_i64
@@ -85,7 +85,7 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: [[I64_EXTEND_U_I32_:%[0-9]+]]:i64 = I64_EXTEND_U_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I64_EXTEND_U_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:i64(s64) = G_ANYEXT %0(s32)
- RETURN %1(s64), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:i64(i64) = G_ANYEXT %0(i32)
+ RETURN %1(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir
index 62b90d8f75d90..d9306410d3fee 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir
@@ -15,10 +15,10 @@ body: |
; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments
; CHECK-NEXT: [[SHR_S_I32_:%[0-9]+]]:i32 = SHR_S_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHR_S_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 21
- %2:_(s32) = G_ASHR %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 21
+ %2:_(i32) = G_ASHR %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
name: ashrv_i32_i8
@@ -36,11 +36,11 @@ body: |
; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: [[SHR_S_I32_:%[0-9]+]]:i32 = SHR_S_I32 [[ARGUMENT_i32_]], [[AND_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHR_S_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = G_ASHR %0, %1
- RETURN %3(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i32) = G_ASHR %0, %1
+ RETURN %3(i32), implicit-def $arguments
...
---
@@ -59,10 +59,10 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[CONST_I64_]], [[CONST_I64_1]], implicit-def dead $arguments
; CHECK-NEXT: [[SHR_S_I64_:%[0-9]+]]:i64 = SHR_S_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHR_S_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 37
- %2:_(s64) = G_ASHR %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 37
+ %2:_(i64) = G_ASHR %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
name: ashrv_i64_i8
@@ -81,9 +81,9 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[I64_EXTEND_U_I32_]], [[CONST_I64_]], implicit-def dead $arguments
; CHECK-NEXT: [[SHR_S_I64_:%[0-9]+]]:i64 = SHR_S_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHR_S_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s64) = G_ASHR %0, %1
- RETURN %3(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i64) = G_ASHR %0, %1
+ RETURN %3(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir
index 11204d27dc7f5..0817eb8f77d40 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir
@@ -14,10 +14,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: [[CLZ_I32_:%[0-9]+]]:i32 = CLZ_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[CLZ_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CTLZ %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CTLZ %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: ctlz_i64_i8
@@ -33,10 +33,10 @@ body: |
; CHECK-NEXT: [[CLZ_I64_:%[0-9]+]]:i64 = CLZ_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[CLZ_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CTLZ %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CTLZ %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: ctlz_i64_i32
@@ -52,9 +52,9 @@ body: |
; CHECK-NEXT: [[CLZ_I64_:%[0-9]+]]:i64 = CLZ_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[CLZ_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s32) = G_CTLZ %0
- RETURN %1(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i32) = G_CTLZ %0
+ RETURN %1(i32), implicit-def $arguments
...
@@ -71,10 +71,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: [[CLZ_I32_:%[0-9]+]]:i32 = CLZ_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[CLZ_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CTLZ_ZERO_UNDEF %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CTLZ_ZERO_UNDEF %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: ctlz_zundef_i64_i8
@@ -90,10 +90,10 @@ body: |
; CHECK-NEXT: [[CLZ_I64_:%[0-9]+]]:i64 = CLZ_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[CLZ_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CTLZ_ZERO_UNDEF %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CTLZ_ZERO_UNDEF %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: ctlz_zundef_i64_i32
@@ -109,7 +109,7 @@ body: |
; CHECK-NEXT: [[CLZ_I64_:%[0-9]+]]:i64 = CLZ_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[CLZ_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s32) = G_CTLZ_ZERO_UNDEF %0
- RETURN %1(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i32) = G_CTLZ_ZERO_UNDEF %0
+ RETURN %1(i32), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir
index cf7989cb35259..77c7735a8fca4 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir
@@ -14,10 +14,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: [[POPCNT_I32_:%[0-9]+]]:i32 = POPCNT_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[POPCNT_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CTPOP %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CTPOP %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
@@ -34,10 +34,10 @@ body: |
; CHECK-NEXT: [[POPCNT_I64_:%[0-9]+]]:i64 = POPCNT_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[POPCNT_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CTPOP %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CTPOP %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: ctpop_i64_i32
@@ -53,7 +53,7 @@ body: |
; CHECK-NEXT: [[POPCNT_I64_:%[0-9]+]]:i64 = POPCNT_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[POPCNT_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s32) = G_CTPOP %0
- RETURN %1(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i32) = G_CTPOP %0
+ RETURN %1(i32), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir
index b503351945b4a..5fad67e3873d0 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir
@@ -14,10 +14,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: [[CTZ_I32_:%[0-9]+]]:i32 = CTZ_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[CTZ_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CTTZ %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CTTZ %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: cttz_i64_i8
@@ -33,10 +33,10 @@ body: |
; CHECK-NEXT: [[CTZ_I64_:%[0-9]+]]:i64 = CTZ_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[CTZ_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CTTZ %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CTTZ %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: cttz_i64_i32
@@ -52,9 +52,9 @@ body: |
; CHECK-NEXT: [[CTZ_I64_:%[0-9]+]]:i64 = CTZ_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[CTZ_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s32) = G_CTTZ %0
- RETURN %1(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i32) = G_CTTZ %0
+ RETURN %1(i32), implicit-def $arguments
...
@@ -71,10 +71,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: [[CTZ_I32_:%[0-9]+]]:i32 = CTZ_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[CTZ_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CTTZ_ZERO_UNDEF %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CTTZ_ZERO_UNDEF %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: cttz_zundef_i64_i8
@@ -90,10 +90,10 @@ body: |
; CHECK-NEXT: [[CTZ_I64_:%[0-9]+]]:i64 = CTZ_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[CTZ_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CTTZ_ZERO_UNDEF %0
- %2:_(s32) = G_ANYEXT %1(s8)
- RETURN %2(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CTTZ_ZERO_UNDEF %0
+ %2:_(i32) = G_ANYEXT %1(i8)
+ RETURN %2(i32), implicit-def $arguments
...
---
name: cttz_zundef_i64_i32
@@ -109,7 +109,7 @@ body: |
; CHECK-NEXT: [[CTZ_I64_:%[0-9]+]]:i64 = CTZ_I64 [[ARGUMENT_i64_]], implicit-def dead $arguments
; CHECK-NEXT: [[I32_WRAP_I64_:%[0-9]+]]:i32 = I32_WRAP_I64 [[CTZ_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[I32_WRAP_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s32) = G_CTTZ_ZERO_UNDEF %0
- RETURN %1(s32), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i32) = G_CTTZ_ZERO_UNDEF %0
+ RETURN %1(i32), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir
index 09de59cb4518c..28866a87fe3cc 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir
@@ -19,11 +19,11 @@ body: |
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[ARGUMENT_i32_1]], [[CONST_I32_1]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHL_I32_]], [[SHR_U_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %2:_(s8) = G_CONSTANT i8 21
- %3:_(s32) = G_FSHL %0, %1, %2(s8)
- RETURN %3(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %2:_(i8) = G_CONSTANT i8 21
+ %3:_(i32) = G_FSHL %0, %1, %2(i8)
+ RETURN %3(i32), implicit-def $arguments
...
---
name: fshlv_i32_i8
@@ -46,12 +46,12 @@ body: |
; CHECK-NEXT: [[SHR_U_I32_1:%[0-9]+]]:i32 = SHR_U_I32 [[SHR_U_I32_]], [[XOR_I32_]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHL_I32_]], [[SHR_U_I32_1]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %3:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- %2:_(s8) = G_TRUNC %3(s32)
- %4:_(s32) = G_FSHL %0, %1, %2(s8)
- RETURN %4(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %3:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ %2:_(i8) = G_TRUNC %3(i32)
+ %4:_(i32) = G_FSHL %0, %1, %2(i8)
+ RETURN %4(i32), implicit-def $arguments
...
@@ -77,11 +77,11 @@ body: |
; CHECK-NEXT: [[SHR_U_I64_:%[0-9]+]]:i64 = SHR_U_I64 [[ARGUMENT_i64_1]], [[AND_I64_1]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I64_:%[0-9]+]]:i64 = disjoint OR_I64 [[SHL_I64_]], [[SHR_U_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- %2:_(s8) = G_CONSTANT i8 21
- %3:_(s64) = G_FSHL %0, %1, %2(s8)
- RETURN %3(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ %2:_(i8) = G_CONSTANT i8 21
+ %3:_(i64) = G_FSHL %0, %1, %2(i8)
+ RETURN %3(i64), implicit-def $arguments
...
---
name: fshlv_i64_i8
@@ -115,10 +115,10 @@ body: |
; CHECK-NEXT: [[SHR_U_I64_1:%[0-9]+]]:i64 = SHR_U_I64 [[SHR_U_I64_]], [[AND_I64_2]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I64_:%[0-9]+]]:i64 = disjoint OR_I64 [[SHL_I64_]], [[SHR_U_I64_1]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- %3:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- %2:_(s8) = G_TRUNC %3(s32)
- %4:_(s64) = G_FSHL %0, %1, %2(s8)
- RETURN %4(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ %3:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ %2:_(i8) = G_TRUNC %3(i32)
+ %4:_(i64) = G_FSHL %0, %1, %2(i8)
+ RETURN %4(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir
index 98825443e1f5d..4e893e247b812 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir
@@ -19,11 +19,11 @@ body: |
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[ARGUMENT_i32_1]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHL_I32_]], [[SHR_U_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %2:_(s8) = G_CONSTANT i8 21
- %3:_(s32) = G_FSHR %0, %1, %2(s8)
- RETURN %3(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %2:_(i8) = G_CONSTANT i8 21
+ %3:_(i32) = G_FSHR %0, %1, %2(i8)
+ RETURN %3(i32), implicit-def $arguments
...
---
name: fshrv_i32_i8
@@ -46,12 +46,12 @@ body: |
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[ARGUMENT_i32_1]], [[ARGUMENT_i32_2]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHL_I32_1]], [[SHR_U_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %3:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- %2:_(s8) = G_TRUNC %3(s32)
- %4:_(s32) = G_FSHR %0, %1, %2(s8)
- RETURN %4(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %3:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ %2:_(i8) = G_TRUNC %3(i32)
+ %4:_(i32) = G_FSHR %0, %1, %2(i8)
+ RETURN %4(i32), implicit-def $arguments
...
@@ -77,11 +77,11 @@ body: |
; CHECK-NEXT: [[SHR_U_I64_:%[0-9]+]]:i64 = SHR_U_I64 [[ARGUMENT_i64_1]], [[AND_I64_1]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I64_:%[0-9]+]]:i64 = disjoint OR_I64 [[SHL_I64_]], [[SHR_U_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- %2:_(s8) = G_CONSTANT i8 21
- %3:_(s64) = G_FSHR %0, %1, %2(s8)
- RETURN %3(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ %2:_(i8) = G_CONSTANT i8 21
+ %3:_(i64) = G_FSHR %0, %1, %2(i8)
+ RETURN %3(i64), implicit-def $arguments
...
---
name: fshrv_i64_i8
@@ -115,10 +115,10 @@ body: |
; CHECK-NEXT: [[SHR_U_I64_:%[0-9]+]]:i64 = SHR_U_I64 [[ARGUMENT_i64_1]], [[AND_I64_2]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I64_:%[0-9]+]]:i64 = disjoint OR_I64 [[SHL_I64_1]], [[SHR_U_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- %3:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- %2:_(s8) = G_TRUNC %3(s32)
- %4:_(s64) = G_FSHR %0, %1, %2(s8)
- RETURN %4(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ %3:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ %2:_(i8) = G_TRUNC %3(i32)
+ %4:_(i64) = G_FSHR %0, %1, %2(i8)
+ RETURN %4(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir
index 51a15c0f34ed6..cabb6584aad83 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir
@@ -13,9 +13,9 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[DEF:%[0-9]+]]:i32 = IMPLICIT_DEF
; CHECK-NEXT: RETURN [[DEF]], implicit-def $arguments
- %0:_(s8) = G_IMPLICIT_DEF
- %1:_(s32) = G_ANYEXT %0(s8)
- RETURN %1(s32), implicit-def $arguments
+ %0:_(i8) = G_IMPLICIT_DEF
+ %1:_(i32) = G_ANYEXT %0(i8)
+ RETURN %1(i32), implicit-def $arguments
...
---
@@ -30,9 +30,9 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[DEF:%[0-9]+]]:i32 = IMPLICIT_DEF
; CHECK-NEXT: RETURN [[DEF]], implicit-def $arguments
- %0:_(s16) = G_IMPLICIT_DEF
- %1:_(s32) = G_ANYEXT %0(s16)
- RETURN %1(s32), implicit-def $arguments
+ %0:_(i16) = G_IMPLICIT_DEF
+ %1:_(i32) = G_ANYEXT %0(i16)
+ RETURN %1(i32), implicit-def $arguments
...
---
@@ -47,8 +47,8 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[DEF:%[0-9]+]]:i32 = IMPLICIT_DEF
; CHECK-NEXT: RETURN [[DEF]], implicit-def $arguments
- %0:_(s32) = G_IMPLICIT_DEF
- RETURN %0(s32), implicit-def $arguments
+ %0:_(i32) = G_IMPLICIT_DEF
+ RETURN %0(i32), implicit-def $arguments
...
---
@@ -63,6 +63,6 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[DEF:%[0-9]+]]:i64 = IMPLICIT_DEF
; CHECK-NEXT: RETURN [[DEF]], implicit-def $arguments
- %0:_(s64) = G_IMPLICIT_DEF
- RETURN %0(s64), implicit-def $arguments
+ %0:_(i64) = G_IMPLICIT_DEF
+ RETURN %0(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir
index ebd293e68f5d1..4164438b39662 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir
@@ -15,10 +15,10 @@ body: |
; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHR_U_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 21
- %2:_(s32) = G_LSHR %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 21
+ %2:_(i32) = G_LSHR %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
name: lshrv_i32_i8
@@ -36,11 +36,11 @@ body: |
; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[ARGUMENT_i32_]], [[AND_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHR_U_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = G_LSHR %0, %1
- RETURN %3(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i32) = G_LSHR %0, %1
+ RETURN %3(i32), implicit-def $arguments
...
---
@@ -59,10 +59,10 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[CONST_I64_]], [[CONST_I64_1]], implicit-def dead $arguments
; CHECK-NEXT: [[SHR_U_I64_:%[0-9]+]]:i64 = SHR_U_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHR_U_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 37
- %2:_(s64) = G_LSHR %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 37
+ %2:_(i64) = G_LSHR %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
name: lshrv_i64_i8
@@ -81,9 +81,9 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[I64_EXTEND_U_I32_]], [[CONST_I64_]], implicit-def dead $arguments
; CHECK-NEXT: [[SHR_U_I64_:%[0-9]+]]:i64 = SHR_U_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHR_U_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s64) = G_LSHR %0, %1
- RETURN %3(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i64) = G_LSHR %0, %1
+ RETURN %3(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir
index bba3d4c06e497..4806838fb6bdb 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir
@@ -21,12 +21,12 @@ body: |
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[AND_I32_]], [[CONST_I32_1]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHL_I32_]], [[SHR_U_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %2:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s8) = G_TRUNC %2(s32)
- %1:_(s8) = G_CONSTANT i8 5
- %3:_(s8) = G_ROTL %0, %1
- %4:_(s32) = G_ANYEXT %3(s8)
- RETURN %4(s32), implicit-def $arguments
+ %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i8) = G_TRUNC %2(i32)
+ %1:_(i8) = G_CONSTANT i8 5
+ %3:_(i8) = G_ROTL %0, %1
+ %4:_(i32) = G_ANYEXT %3(i8)
+ RETURN %4(i32), implicit-def $arguments
...
---
@@ -52,13 +52,13 @@ body: |
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[AND_I32_2]], [[AND_I32_1]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHL_I32_]], [[SHR_U_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %2:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s8) = G_TRUNC %2(s32)
- %3:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %3(s32)
- %4:_(s8) = G_ROTL %0, %1
- %5:_(s32) = G_ANYEXT %4(s8)
- RETURN %5(s32), implicit-def $arguments
+ %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i8) = G_TRUNC %2(i32)
+ %3:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %3(i32)
+ %4:_(i8) = G_ROTL %0, %1
+ %5:_(i32) = G_ANYEXT %4(i8)
+ RETURN %5(i32), implicit-def $arguments
...
---
@@ -80,12 +80,12 @@ body: |
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[AND_I32_]], [[CONST_I32_1]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHL_I32_]], [[SHR_U_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %2:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s16) = G_TRUNC %2(s32)
- %1:_(s16) = G_CONSTANT i16 13
- %3:_(s16) = G_ROTL %0, %1
- %4:_(s32) = G_ANYEXT %3(s16)
- RETURN %4(s32), implicit-def $arguments
+ %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i16) = G_TRUNC %2(i32)
+ %1:_(i16) = G_CONSTANT i16 13
+ %3:_(i16) = G_ROTL %0, %1
+ %4:_(i32) = G_ANYEXT %3(i16)
+ RETURN %4(i32), implicit-def $arguments
...
---
@@ -111,13 +111,13 @@ body: |
; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[AND_I32_2]], [[AND_I32_1]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHL_I32_]], [[SHR_U_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %2:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s16) = G_TRUNC %2(s32)
- %3:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s16) = G_TRUNC %3(s32)
- %4:_(s16) = G_ROTL %0, %1
- %5:_(s32) = G_ANYEXT %4(s16)
- RETURN %5(s32), implicit-def $arguments
+ %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i16) = G_TRUNC %2(i32)
+ %3:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i16) = G_TRUNC %3(i32)
+ %4:_(i16) = G_ROTL %0, %1
+ %5:_(i32) = G_ANYEXT %4(i16)
+ RETURN %5(i32), implicit-def $arguments
...
---
@@ -134,10 +134,10 @@ body: |
; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments
; CHECK-NEXT: [[ROTL_I32_:%[0-9]+]]:i32 = ROTL_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTL_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s32) = G_CONSTANT i32 21
- %2:_(s32) = G_ROTL %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i32) = G_CONSTANT i32 21
+ %2:_(i32) = G_ROTL %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
@@ -154,10 +154,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments
; CHECK-NEXT: [[ROTL_I32_:%[0-9]+]]:i32 = ROTL_I32 [[ARGUMENT_i32_]], [[ARGUMENT_i32_1]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTL_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %2:_(s32) = G_ROTL %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %2:_(i32) = G_ROTL %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
@@ -174,10 +174,10 @@ body: |
; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments
; CHECK-NEXT: [[ROTL_I32_:%[0-9]+]]:i32 = ROTL_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTL_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 21
- %2:_(s32) = G_ROTL %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 21
+ %2:_(i32) = G_ROTL %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
@@ -196,11 +196,11 @@ body: |
; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: [[ROTL_I32_:%[0-9]+]]:i32 = ROTL_I32 [[ARGUMENT_i32_]], [[AND_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTL_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = G_ROTL %0, %1
- RETURN %3(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i32) = G_ROTL %0, %1
+ RETURN %3(i32), implicit-def $arguments
...
---
@@ -217,10 +217,10 @@ body: |
; CHECK-NEXT: [[CONST_I64_:%[0-9]+]]:i64 = CONST_I64 37, implicit-def dead $arguments
; CHECK-NEXT: [[ROTL_I64_:%[0-9]+]]:i64 = ROTL_I64 [[ARGUMENT_i64_]], [[CONST_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTL_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s64) = G_CONSTANT i64 37
- %2:_(s64) = G_ROTL %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i64) = G_CONSTANT i64 37
+ %2:_(i64) = G_ROTL %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
@@ -237,10 +237,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64 = ARGUMENT_i64 1, implicit $arguments
; CHECK-NEXT: [[ROTL_I64_:%[0-9]+]]:i64 = ROTL_I64 [[ARGUMENT_i64_]], [[ARGUMENT_i64_1]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTL_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- %2:_(s64) = G_ROTL %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ %2:_(i64) = G_ROTL %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
@@ -259,10 +259,10 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[CONST_I64_]], [[CONST_I64_1]], implicit-def dead $arguments
; CHECK-NEXT: [[ROTL_I64_:%[0-9]+]]:i64 = ROTL_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTL_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 37
- %2:_(s64) = G_ROTL %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 37
+ %2:_(i64) = G_ROTL %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
@@ -282,10 +282,10 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[I64_EXTEND_U_I32_]], [[CONST_I64_]], implicit-def dead $arguments
; CHECK-NEXT: [[ROTL_I64_:%[0-9]+]]:i64 = ROTL_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTL_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s64) = G_ROTL %0, %1
- RETURN %3(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i64) = G_ROTL %0, %1
+ RETURN %3(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir
index eb25eb6b953be..5c47bf654c372 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir
@@ -21,12 +21,12 @@ body: |
; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[CONST_I32_2]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHR_U_I32_]], [[SHL_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %2:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s8) = G_TRUNC %2(s32)
- %1:_(s8) = G_CONSTANT i8 5
- %3:_(s8) = G_ROTR %0, %1
- %4:_(s32) = G_ANYEXT %3(s8)
- RETURN %4(s32), implicit-def $arguments
+ %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i8) = G_TRUNC %2(i32)
+ %1:_(i8) = G_CONSTANT i8 5
+ %3:_(i8) = G_ROTR %0, %1
+ %4:_(i32) = G_ANYEXT %3(i8)
+ RETURN %4(i32), implicit-def $arguments
...
---
@@ -52,13 +52,13 @@ body: |
; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[AND_I32_2]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHR_U_I32_]], [[SHL_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %2:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s8) = G_TRUNC %2(s32)
- %3:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %3(s32)
- %4:_(s8) = G_ROTR %0, %1
- %5:_(s32) = G_ANYEXT %4(s8)
- RETURN %5(s32), implicit-def $arguments
+ %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i8) = G_TRUNC %2(i32)
+ %3:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %3(i32)
+ %4:_(i8) = G_ROTR %0, %1
+ %5:_(i32) = G_ANYEXT %4(i8)
+ RETURN %5(i32), implicit-def $arguments
...
---
@@ -80,12 +80,12 @@ body: |
; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[CONST_I32_2]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHR_U_I32_]], [[SHL_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %2:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s16) = G_TRUNC %2(s32)
- %1:_(s16) = G_CONSTANT i16 13
- %3:_(s16) = G_ROTR %0, %1
- %4:_(s32) = G_ANYEXT %3(s16)
- RETURN %4(s32), implicit-def $arguments
+ %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i16) = G_TRUNC %2(i32)
+ %1:_(i16) = G_CONSTANT i16 13
+ %3:_(i16) = G_ROTR %0, %1
+ %4:_(i32) = G_ANYEXT %3(i16)
+ RETURN %4(i32), implicit-def $arguments
...
---
@@ -111,13 +111,13 @@ body: |
; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[AND_I32_2]], implicit-def dead $arguments
; CHECK-NEXT: [[OR_I32_:%[0-9]+]]:i32 = disjoint OR_I32 [[SHR_U_I32_]], [[SHL_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[OR_I32_]], implicit-def $arguments
- %2:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %0:_(s16) = G_TRUNC %2(s32)
- %3:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s16) = G_TRUNC %3(s32)
- %4:_(s16) = G_ROTR %0, %1
- %5:_(s32) = G_ANYEXT %4(s16)
- RETURN %5(s32), implicit-def $arguments
+ %2:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %0:_(i16) = G_TRUNC %2(i32)
+ %3:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i16) = G_TRUNC %3(i32)
+ %4:_(i16) = G_ROTR %0, %1
+ %5:_(i32) = G_ANYEXT %4(i16)
+ RETURN %5(i32), implicit-def $arguments
...
---
@@ -134,10 +134,10 @@ body: |
; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments
; CHECK-NEXT: [[ROTR_I32_:%[0-9]+]]:i32 = ROTR_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTR_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s32) = G_CONSTANT i32 21
- %2:_(s32) = G_ROTR %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i32) = G_CONSTANT i32 21
+ %2:_(i32) = G_ROTR %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
@@ -154,10 +154,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments
; CHECK-NEXT: [[ROTR_I32_:%[0-9]+]]:i32 = ROTR_I32 [[ARGUMENT_i32_]], [[ARGUMENT_i32_1]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTR_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %2:_(s32) = G_ROTR %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %2:_(i32) = G_ROTR %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
@@ -174,10 +174,10 @@ body: |
; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments
; CHECK-NEXT: [[ROTR_I32_:%[0-9]+]]:i32 = ROTR_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTR_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 21
- %2:_(s32) = G_ROTR %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 21
+ %2:_(i32) = G_ROTR %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
@@ -196,11 +196,11 @@ body: |
; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: [[ROTR_I32_:%[0-9]+]]:i32 = ROTR_I32 [[ARGUMENT_i32_]], [[AND_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTR_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = G_ROTR %0, %1
- RETURN %3(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i32) = G_ROTR %0, %1
+ RETURN %3(i32), implicit-def $arguments
...
---
@@ -217,10 +217,10 @@ body: |
; CHECK-NEXT: [[CONST_I64_:%[0-9]+]]:i64 = CONST_I64 37, implicit-def dead $arguments
; CHECK-NEXT: [[ROTR_I64_:%[0-9]+]]:i64 = ROTR_I64 [[ARGUMENT_i64_]], [[CONST_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTR_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s64) = G_CONSTANT i64 37
- %2:_(s64) = G_ROTR %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i64) = G_CONSTANT i64 37
+ %2:_(i64) = G_ROTR %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
@@ -237,10 +237,10 @@ body: |
; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64 = ARGUMENT_i64 1, implicit $arguments
; CHECK-NEXT: [[ROTR_I64_:%[0-9]+]]:i64 = ROTR_I64 [[ARGUMENT_i64_]], [[ARGUMENT_i64_1]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTR_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- %2:_(s64) = G_ROTR %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ %2:_(i64) = G_ROTR %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
@@ -259,10 +259,10 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[CONST_I64_]], [[CONST_I64_1]], implicit-def dead $arguments
; CHECK-NEXT: [[ROTR_I64_:%[0-9]+]]:i64 = ROTR_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTR_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 37
- %2:_(s64) = G_ROTR %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 37
+ %2:_(i64) = G_ROTR %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
@@ -282,10 +282,10 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[I64_EXTEND_U_I32_]], [[CONST_I64_]], implicit-def dead $arguments
; CHECK-NEXT: [[ROTR_I64_:%[0-9]+]]:i64 = ROTR_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[ROTR_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s64) = G_ROTR %0, %1
- RETURN %3(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i64) = G_ROTR %0, %1
+ RETURN %3(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir
index 742528db46b11..756bf4769dea7 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir
@@ -15,10 +15,10 @@ body: |
; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments
; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHL_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 21
- %2:_(s32) = G_SHL %0, %1
- RETURN %2(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 21
+ %2:_(i32) = G_SHL %0, %1
+ RETURN %2(i32), implicit-def $arguments
...
---
name: shlv_i32_i8
@@ -36,11 +36,11 @@ body: |
; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_]], implicit-def dead $arguments
; CHECK-NEXT: [[SHL_I32_:%[0-9]+]]:i32 = SHL_I32 [[ARGUMENT_i32_]], [[AND_I32_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHL_I32_]], implicit-def $arguments
- %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = G_SHL %0, %1
- RETURN %3(s32), implicit-def $arguments
+ %0:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i32) = G_SHL %0, %1
+ RETURN %3(i32), implicit-def $arguments
...
---
@@ -59,10 +59,10 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[CONST_I64_]], [[CONST_I64_1]], implicit-def dead $arguments
; CHECK-NEXT: [[SHL_I64_:%[0-9]+]]:i64 = SHL_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHL_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %1:_(s8) = G_CONSTANT i8 37
- %2:_(s64) = G_SHL %0, %1
- RETURN %2(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %1:_(i8) = G_CONSTANT i8 37
+ %2:_(i64) = G_SHL %0, %1
+ RETURN %2(i64), implicit-def $arguments
...
---
name: shlv_i64_i8
@@ -81,9 +81,9 @@ body: |
; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[I64_EXTEND_U_I32_]], [[CONST_I64_]], implicit-def dead $arguments
; CHECK-NEXT: [[SHL_I64_:%[0-9]+]]:i64 = SHL_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
; CHECK-NEXT: RETURN [[SHL_I64_]], implicit-def $arguments
- %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- %1:_(s8) = G_TRUNC %2(s32)
- %3:_(s64) = G_SHL %0, %1
- RETURN %3(s64), implicit-def $arguments
+ %0:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ %2:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ %1:_(i8) = G_TRUNC %2(i32)
+ %3:_(i64) = G_SHL %0, %1
+ RETURN %3(i64), implicit-def $arguments
...
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
index af2b6ff6c6812..772558ebfe111 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
@@ -8,31 +8,31 @@ define void @test_v16i8_arg(<16 x i8> %arg) {
; NO-SIMD: bb.1 (%ir-block.0):
; NO-SIMD-NEXT: liveins: $arguments
; NO-SIMD-NEXT: {{ $}}
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(s32) = ARGUMENT_i32 5, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(s32) = ARGUMENT_i32 6, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(s32) = ARGUMENT_i32 7, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_8:%[0-9]+]]:i32(s32) = ARGUMENT_i32 8, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_9:%[0-9]+]]:i32(s32) = ARGUMENT_i32 9, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_10:%[0-9]+]]:i32(s32) = ARGUMENT_i32 10, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_11:%[0-9]+]]:i32(s32) = ARGUMENT_i32 11, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_12:%[0-9]+]]:i32(s32) = ARGUMENT_i32 12, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_13:%[0-9]+]]:i32(s32) = ARGUMENT_i32 13, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_14:%[0-9]+]]:i32(s32) = ARGUMENT_i32 14, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_15:%[0-9]+]]:i32(s32) = ARGUMENT_i32 15, implicit $arguments
- ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](s32), [[ARGUMENT_i32_1]](s32), [[ARGUMENT_i32_2]](s32), [[ARGUMENT_i32_3]](s32), [[ARGUMENT_i32_4]](s32), [[ARGUMENT_i32_5]](s32), [[ARGUMENT_i32_6]](s32), [[ARGUMENT_i32_7]](s32), [[ARGUMENT_i32_8]](s32), [[ARGUMENT_i32_9]](s32), [[ARGUMENT_i32_10]](s32), [[ARGUMENT_i32_11]](s32), [[ARGUMENT_i32_12]](s32), [[ARGUMENT_i32_13]](s32), [[ARGUMENT_i32_14]](s32), [[ARGUMENT_i32_15]](s32)
- ; NO-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(<16 x s8>) = G_TRUNC [[BUILD_VECTOR]](<16 x s32>)
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(i32) = ARGUMENT_i32 5, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(i32) = ARGUMENT_i32 6, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(i32) = ARGUMENT_i32 7, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_8:%[0-9]+]]:i32(i32) = ARGUMENT_i32 8, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_9:%[0-9]+]]:i32(i32) = ARGUMENT_i32 9, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_10:%[0-9]+]]:i32(i32) = ARGUMENT_i32 10, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_11:%[0-9]+]]:i32(i32) = ARGUMENT_i32 11, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_12:%[0-9]+]]:i32(i32) = ARGUMENT_i32 12, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_13:%[0-9]+]]:i32(i32) = ARGUMENT_i32 13, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_14:%[0-9]+]]:i32(i32) = ARGUMENT_i32 14, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_15:%[0-9]+]]:i32(i32) = ARGUMENT_i32 15, implicit $arguments
+ ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x i32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](i32), [[ARGUMENT_i32_1]](i32), [[ARGUMENT_i32_2]](i32), [[ARGUMENT_i32_3]](i32), [[ARGUMENT_i32_4]](i32), [[ARGUMENT_i32_5]](i32), [[ARGUMENT_i32_6]](i32), [[ARGUMENT_i32_7]](i32), [[ARGUMENT_i32_8]](i32), [[ARGUMENT_i32_9]](i32), [[ARGUMENT_i32_10]](i32), [[ARGUMENT_i32_11]](i32), [[ARGUMENT_i32_12]](i32), [[ARGUMENT_i32_13]](i32), [[ARGUMENT_i32_14]](i32), [[ARGUMENT_i32_15]](i32)
+ ; NO-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(<16 x i8>) = G_TRUNC [[BUILD_VECTOR]](<16 x i32>)
; NO-SIMD-NEXT: RETURN implicit-def $arguments
;
; SIMD-LABEL: name: test_v16i8_arg
; SIMD: bb.1 (%ir-block.0):
; SIMD-NEXT: liveins: $arguments
; SIMD-NEXT: {{ $}}
- ; SIMD-NEXT: [[ARGUMENT_v16i8_:%[0-9]+]]:v128(<16 x s8>) = ARGUMENT_v16i8 0, implicit $arguments
+ ; SIMD-NEXT: [[ARGUMENT_v16i8_:%[0-9]+]]:v128(<16 x i8>) = ARGUMENT_v16i8 0, implicit $arguments
; SIMD-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -42,23 +42,23 @@ define void @test_v8i16_arg(<8 x i16> %arg) {
; NO-SIMD: bb.1 (%ir-block.0):
; NO-SIMD-NEXT: liveins: $arguments
; NO-SIMD-NEXT: {{ $}}
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(s32) = ARGUMENT_i32 5, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(s32) = ARGUMENT_i32 6, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(s32) = ARGUMENT_i32 7, implicit $arguments
- ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](s32), [[ARGUMENT_i32_1]](s32), [[ARGUMENT_i32_2]](s32), [[ARGUMENT_i32_3]](s32), [[ARGUMENT_i32_4]](s32), [[ARGUMENT_i32_5]](s32), [[ARGUMENT_i32_6]](s32), [[ARGUMENT_i32_7]](s32)
- ; NO-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x s16>) = G_TRUNC [[BUILD_VECTOR]](<8 x s32>)
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(i32) = ARGUMENT_i32 5, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(i32) = ARGUMENT_i32 6, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(i32) = ARGUMENT_i32 7, implicit $arguments
+ ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x i32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](i32), [[ARGUMENT_i32_1]](i32), [[ARGUMENT_i32_2]](i32), [[ARGUMENT_i32_3]](i32), [[ARGUMENT_i32_4]](i32), [[ARGUMENT_i32_5]](i32), [[ARGUMENT_i32_6]](i32), [[ARGUMENT_i32_7]](i32)
+ ; NO-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x i16>) = G_TRUNC [[BUILD_VECTOR]](<8 x i32>)
; NO-SIMD-NEXT: RETURN implicit-def $arguments
;
; SIMD-LABEL: name: test_v8i16_arg
; SIMD: bb.1 (%ir-block.0):
; SIMD-NEXT: liveins: $arguments
; SIMD-NEXT: {{ $}}
- ; SIMD-NEXT: [[ARGUMENT_v8i16_:%[0-9]+]]:v128(<8 x s16>) = ARGUMENT_v8i16 0, implicit $arguments
+ ; SIMD-NEXT: [[ARGUMENT_v8i16_:%[0-9]+]]:v128(<8 x i16>) = ARGUMENT_v8i16 0, implicit $arguments
; SIMD-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -68,18 +68,18 @@ define void @test_v4i32_arg(<4 x i32> %arg) {
; NO-SIMD: bb.1 (%ir-block.0):
; NO-SIMD-NEXT: liveins: $arguments
; NO-SIMD-NEXT: {{ $}}
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](s32), [[ARGUMENT_i32_1]](s32), [[ARGUMENT_i32_2]](s32), [[ARGUMENT_i32_3]](s32)
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](i32), [[ARGUMENT_i32_1]](i32), [[ARGUMENT_i32_2]](i32), [[ARGUMENT_i32_3]](i32)
; NO-SIMD-NEXT: RETURN implicit-def $arguments
;
; SIMD-LABEL: name: test_v4i32_arg
; SIMD: bb.1 (%ir-block.0):
; SIMD-NEXT: liveins: $arguments
; SIMD-NEXT: {{ $}}
- ; SIMD-NEXT: [[ARGUMENT_v4i32_:%[0-9]+]]:v128(<4 x s32>) = ARGUMENT_v4i32 0, implicit $arguments
+ ; SIMD-NEXT: [[ARGUMENT_v4i32_:%[0-9]+]]:v128(<4 x i32>) = ARGUMENT_v4i32 0, implicit $arguments
; SIMD-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -89,16 +89,16 @@ define void @test_v2i64_arg(<2 x i64> %arg) {
; NO-SIMD: bb.1 (%ir-block.0):
; NO-SIMD-NEXT: liveins: $arguments
; NO-SIMD-NEXT: {{ $}}
- ; NO-SIMD-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ARGUMENT_i64_]](s64), [[ARGUMENT_i64_1]](s64)
+ ; NO-SIMD-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i64>) = G_BUILD_VECTOR [[ARGUMENT_i64_]](i64), [[ARGUMENT_i64_1]](i64)
; NO-SIMD-NEXT: RETURN implicit-def $arguments
;
; SIMD-LABEL: name: test_v2i64_arg
; SIMD: bb.1 (%ir-block.0):
; SIMD-NEXT: liveins: $arguments
; SIMD-NEXT: {{ $}}
- ; SIMD-NEXT: [[ARGUMENT_v2i64_:%[0-9]+]]:v128(<2 x s64>) = ARGUMENT_v2i64 0, implicit $arguments
+ ; SIMD-NEXT: [[ARGUMENT_v2i64_:%[0-9]+]]:v128(<2 x i64>) = ARGUMENT_v2i64 0, implicit $arguments
; SIMD-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -108,39 +108,39 @@ define void @test_v8f16_arg(<8 x half> %arg) {
; NO-SIMD: bb.1 (%ir-block.0):
; NO-SIMD-NEXT: liveins: $arguments
; NO-SIMD-NEXT: {{ $}}
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(s32) = ARGUMENT_i32 5, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(s32) = ARGUMENT_i32 6, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(s32) = ARGUMENT_i32 7, implicit $arguments
- ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](s32), [[ARGUMENT_i32_1]](s32), [[ARGUMENT_i32_2]](s32), [[ARGUMENT_i32_3]](s32), [[ARGUMENT_i32_4]](s32), [[ARGUMENT_i32_5]](s32), [[ARGUMENT_i32_6]](s32), [[ARGUMENT_i32_7]](s32)
- ; NO-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x s16>) = G_TRUNC [[BUILD_VECTOR]](<8 x s32>)
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(i32) = ARGUMENT_i32 5, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(i32) = ARGUMENT_i32 6, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(i32) = ARGUMENT_i32 7, implicit $arguments
+ ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x i32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](i32), [[ARGUMENT_i32_1]](i32), [[ARGUMENT_i32_2]](i32), [[ARGUMENT_i32_3]](i32), [[ARGUMENT_i32_4]](i32), [[ARGUMENT_i32_5]](i32), [[ARGUMENT_i32_6]](i32), [[ARGUMENT_i32_7]](i32)
+ ; NO-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x f16>) = G_TRUNC [[BUILD_VECTOR]](<8 x i32>)
; NO-SIMD-NEXT: RETURN implicit-def $arguments
;
; SIMD-NO-F16-LABEL: name: test_v8f16_arg
; SIMD-NO-F16: bb.1 (%ir-block.0):
; SIMD-NO-F16-NEXT: liveins: $arguments
; SIMD-NO-F16-NEXT: {{ $}}
- ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(s32) = ARGUMENT_i32 5, implicit $arguments
- ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(s32) = ARGUMENT_i32 6, implicit $arguments
- ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(s32) = ARGUMENT_i32 7, implicit $arguments
- ; SIMD-NO-F16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](s32), [[ARGUMENT_i32_1]](s32), [[ARGUMENT_i32_2]](s32), [[ARGUMENT_i32_3]](s32), [[ARGUMENT_i32_4]](s32), [[ARGUMENT_i32_5]](s32), [[ARGUMENT_i32_6]](s32), [[ARGUMENT_i32_7]](s32)
- ; SIMD-NO-F16-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x s16>) = G_TRUNC [[BUILD_VECTOR]](<8 x s32>)
+ ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(i32) = ARGUMENT_i32 5, implicit $arguments
+ ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(i32) = ARGUMENT_i32 6, implicit $arguments
+ ; SIMD-NO-F16-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(i32) = ARGUMENT_i32 7, implicit $arguments
+ ; SIMD-NO-F16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x i32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](i32), [[ARGUMENT_i32_1]](i32), [[ARGUMENT_i32_2]](i32), [[ARGUMENT_i32_3]](i32), [[ARGUMENT_i32_4]](i32), [[ARGUMENT_i32_5]](i32), [[ARGUMENT_i32_6]](i32), [[ARGUMENT_i32_7]](i32)
+ ; SIMD-NO-F16-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x f16>) = G_TRUNC [[BUILD_VECTOR]](<8 x i32>)
; SIMD-NO-F16-NEXT: RETURN implicit-def $arguments
;
; SIMD-F16-LABEL: name: test_v8f16_arg
; SIMD-F16: bb.1 (%ir-block.0):
; SIMD-F16-NEXT: liveins: $arguments
; SIMD-F16-NEXT: {{ $}}
- ; SIMD-F16-NEXT: [[ARGUMENT_v8f16_:%[0-9]+]]:v128(<8 x s16>) = ARGUMENT_v8f16 0, implicit $arguments
+ ; SIMD-F16-NEXT: [[ARGUMENT_v8f16_:%[0-9]+]]:v128(<8 x f16>) = ARGUMENT_v8f16 0, implicit $arguments
; SIMD-F16-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -150,18 +150,18 @@ define void @test_v4f32_arg(<4 x float> %arg) {
; NO-SIMD: bb.1 (%ir-block.0):
; NO-SIMD-NEXT: liveins: $arguments
; NO-SIMD-NEXT: {{ $}}
- ; NO-SIMD-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 0, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_f32_1:%[0-9]+]]:f32(s32) = ARGUMENT_f32 1, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_f32_2:%[0-9]+]]:f32(s32) = ARGUMENT_f32 2, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_f32_3:%[0-9]+]]:f32(s32) = ARGUMENT_f32 3, implicit $arguments
- ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[ARGUMENT_f32_]](s32), [[ARGUMENT_f32_1]](s32), [[ARGUMENT_f32_2]](s32), [[ARGUMENT_f32_3]](s32)
+ ; NO-SIMD-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 0, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_f32_1:%[0-9]+]]:f32(f32) = ARGUMENT_f32 1, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_f32_2:%[0-9]+]]:f32(f32) = ARGUMENT_f32 2, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_f32_3:%[0-9]+]]:f32(f32) = ARGUMENT_f32 3, implicit $arguments
+ ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x f32>) = G_BUILD_VECTOR [[ARGUMENT_f32_]](f32), [[ARGUMENT_f32_1]](f32), [[ARGUMENT_f32_2]](f32), [[ARGUMENT_f32_3]](f32)
; NO-SIMD-NEXT: RETURN implicit-def $arguments
;
; SIMD-LABEL: name: test_v4f32_arg
; SIMD: bb.1 (%ir-block.0):
; SIMD-NEXT: liveins: $arguments
; SIMD-NEXT: {{ $}}
- ; SIMD-NEXT: [[ARGUMENT_v4f32_:%[0-9]+]]:v128(<4 x s32>) = ARGUMENT_v4f32 0, implicit $arguments
+ ; SIMD-NEXT: [[ARGUMENT_v4f32_:%[0-9]+]]:v128(<4 x f32>) = ARGUMENT_v4f32 0, implicit $arguments
; SIMD-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -171,16 +171,16 @@ define void @test_v2f64_arg(<2 x double> %arg) {
; NO-SIMD: bb.1 (%ir-block.0):
; NO-SIMD-NEXT: liveins: $arguments
; NO-SIMD-NEXT: {{ $}}
- ; NO-SIMD-NEXT: [[ARGUMENT_f64_:%[0-9]+]]:f64(s64) = ARGUMENT_f64 0, implicit $arguments
- ; NO-SIMD-NEXT: [[ARGUMENT_f64_1:%[0-9]+]]:f64(s64) = ARGUMENT_f64 1, implicit $arguments
- ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ARGUMENT_f64_]](s64), [[ARGUMENT_f64_1]](s64)
+ ; NO-SIMD-NEXT: [[ARGUMENT_f64_:%[0-9]+]]:f64(f64) = ARGUMENT_f64 0, implicit $arguments
+ ; NO-SIMD-NEXT: [[ARGUMENT_f64_1:%[0-9]+]]:f64(f64) = ARGUMENT_f64 1, implicit $arguments
+ ; NO-SIMD-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x f64>) = G_BUILD_VECTOR [[ARGUMENT_f64_]](f64), [[ARGUMENT_f64_1]](f64)
; NO-SIMD-NEXT: RETURN implicit-def $arguments
;
; SIMD-LABEL: name: test_v2f64_arg
; SIMD: bb.1 (%ir-block.0):
; SIMD-NEXT: liveins: $arguments
; SIMD-NEXT: {{ $}}
- ; SIMD-NEXT: [[ARGUMENT_v2f64_:%[0-9]+]]:v128(<2 x s64>) = ARGUMENT_v2f64 0, implicit $arguments
+ ; SIMD-NEXT: [[ARGUMENT_v2f64_:%[0-9]+]]:v128(<2 x f64>) = ARGUMENT_v2f64 0, implicit $arguments
; SIMD-NEXT: RETURN implicit-def $arguments
ret void
}
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
index d167b84011b00..a2d1f01508a96 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
@@ -1,77 +1,83 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=wasm32 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s | FileCheck %s -check-prefixes=CHECK,WASM32
; RUN: llc -mtriple=wasm64 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s | FileCheck %s -check-prefixes=CHECK,WASM64
define swiftcc void @test_implicit_self_and_error(float %arg) {
- ; CHECK-LABEL: name: test_implicit_self_and_error
- ; CHECK: machineFunctionInfo:
- ; WASM32-NEXT: params: [ f32, i32, i32 ]
- ; WASM64-NEXT: params: [ f32, i64, i64 ]
- ; CHECK-NEXT: results: [ ]
+ ; CHECK-LABEL: name: test_implicit_self_and_error
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 0, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 0, implicit $arguments
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
define swiftcc void @test_explicit_self_and_implicit_error(ptr swiftself %self, float %arg) {
- ; CHECK-LABEL: name: test_explicit_self_and_implicit_error
- ; CHECK: machineFunctionInfo:
- ; WASM32-NEXT: params: [ i32, f32, i32 ]
- ; WASM64-NEXT: params: [ i64, f32, i64 ]
- ; CHECK-NEXT: results: [ ]
- ; CHECK: bb.1 (%ir-block.0):
- ; CHECK-NEXT: liveins: $arguments
- ; CHECK-NEXT: {{ $}}
+ ; WASM32-LABEL: name: test_explicit_self_and_implicit_error
+ ; WASM32: bb.1 (%ir-block.0):
+ ; WASM32-NEXT: liveins: $arguments
+ ; WASM32-NEXT: {{ $}}
; WASM32-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
+ ; WASM32-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 1, implicit $arguments
+ ; WASM32-NEXT: RETURN implicit-def $arguments
+ ;
+ ; WASM64-LABEL: name: test_explicit_self_and_implicit_error
+ ; WASM64: bb.1 (%ir-block.0):
+ ; WASM64-NEXT: liveins: $arguments
+ ; WASM64-NEXT: {{ $}}
; WASM64-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 1, implicit $arguments
- ; CHECK-NEXT: RETURN implicit-def $arguments
+ ; WASM64-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 1, implicit $arguments
+ ; WASM64-NEXT: RETURN implicit-def $arguments
ret void
}
define swiftcc void @test_implicit_self_and_explicit_error(ptr swifterror %error, float %arg) {
- ; CHECK-LABEL: name: test_implicit_self_and_explicit_error
- ; CHECK: machineFunctionInfo:
- ; WASM32-NEXT: params: [ i32, f32, i32 ]
- ; WASM64-NEXT: params: [ i64, f32, i64 ]
- ; CHECK-NEXT: results: [ ]
- ; CHECK: bb.1 (%ir-block.0):
- ; CHECK-NEXT: liveins: $arguments
- ; CHECK-NEXT: {{ $}}
+ ; WASM32-LABEL: name: test_implicit_self_and_explicit_error
+ ; WASM32: bb.1 (%ir-block.0):
+ ; WASM32-NEXT: liveins: $arguments
+ ; WASM32-NEXT: {{ $}}
; WASM32-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
+ ; WASM32-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 1, implicit $arguments
+ ; WASM32-NEXT: RETURN implicit-def $arguments
+ ;
+ ; WASM64-LABEL: name: test_implicit_self_and_explicit_error
+ ; WASM64: bb.1 (%ir-block.0):
+ ; WASM64-NEXT: liveins: $arguments
+ ; WASM64-NEXT: {{ $}}
; WASM64-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 1, implicit $arguments
- ; CHECK-NEXT: RETURN implicit-def $arguments
+ ; WASM64-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 1, implicit $arguments
+ ; WASM64-NEXT: RETURN implicit-def $arguments
ret void
}
define swiftcc void @test_explicit_self_and_error(ptr swiftself %self, ptr swifterror %error, float %arg) {
- ; CHECK-LABEL: name: test_explicit_self_and_error
- ; CHECK: machineFunctionInfo:
- ; WASM32-NEXT: params: [ i32, i32, f32 ]
- ; WASM64-NEXT: params: [ i64, i64, f32 ]
- ; CHECK-NEXT: results: [ ]
- ; CHECK: bb.1 (%ir-block.0):
- ; CHECK-NEXT: liveins: $arguments
- ; CHECK-NEXT: {{ $}}
+ ; WASM32-LABEL: name: test_explicit_self_and_error
+ ; WASM32: bb.1 (%ir-block.0):
+ ; WASM32-NEXT: liveins: $arguments
+ ; WASM32-NEXT: {{ $}}
; WASM32-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
; WASM32-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(p0) = ARGUMENT_i32 1, implicit $arguments
+ ; WASM32-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 2, implicit $arguments
+ ; WASM32-NEXT: RETURN implicit-def $arguments
+ ;
+ ; WASM64-LABEL: name: test_explicit_self_and_error
+ ; WASM64: bb.1 (%ir-block.0):
+ ; WASM64-NEXT: liveins: $arguments
+ ; WASM64-NEXT: {{ $}}
; WASM64-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
; WASM64-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(p0) = ARGUMENT_i64 1, implicit $arguments
- ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 2, implicit $arguments
- ; CHECK-NEXT: RETURN implicit-def $arguments
+ ; WASM64-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 2, implicit $arguments
+ ; WASM64-NEXT: RETURN implicit-def $arguments
ret void
}
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
index c5d54cc05f411..f694ca625205a 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
@@ -7,8 +7,8 @@ define void @test_i8_arg(i8 %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[ARGUMENT_i32_]](s32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[ARGUMENT_i32_]](i32)
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -18,9 +18,9 @@ define void @test_i8_zeroext_arg(i8 zeroext %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s32) = G_ASSERT_ZEXT [[ARGUMENT_i32_]], 8
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[ASSERT_ZEXT]](s32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(i32) = G_ASSERT_ZEXT [[ARGUMENT_i32_]], 8
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[ASSERT_ZEXT]](i32)
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -30,9 +30,9 @@ define void @test_i8_signext_arg(i8 signext %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s32) = G_ASSERT_SEXT [[ARGUMENT_i32_]], 8
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[ASSERT_SEXT]](s32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(i32) = G_ASSERT_SEXT [[ARGUMENT_i32_]], 8
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[ASSERT_SEXT]](i32)
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -42,8 +42,8 @@ define void @test_i16_arg(i16 %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_]](s32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[ARGUMENT_i32_]](i32)
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -54,7 +54,7 @@ define void @test_i32_arg(i32 %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -65,7 +65,7 @@ define void @test_i64_arg(i64 %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(s64) = ARGUMENT_i64 0, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(i64) = ARGUMENT_i64 0, implicit $arguments
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -92,9 +92,9 @@ define void @test_i128_arg(i128 %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- ; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[ARGUMENT_i64_]](s64), [[ARGUMENT_i64_1]](s64)
+ ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ ; CHECK-NEXT: [[MV:%[0-9]+]]:_(i128) = G_MERGE_VALUES [[ARGUMENT_i64_]](i64), [[ARGUMENT_i64_1]](i64)
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -104,8 +104,8 @@ define void @test_f16_arg(half %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_]](s32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(f16) = G_TRUNC [[ARGUMENT_i32_]](i32)
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -116,7 +116,7 @@ define void @test_f32_arg(float %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 0, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 0, implicit $arguments
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -127,7 +127,7 @@ define void @test_f64_arg(double %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_f64_:%[0-9]+]]:f64(s64) = ARGUMENT_f64 0, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_f64_:%[0-9]+]]:f64(f64) = ARGUMENT_f64 0, implicit $arguments
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -137,9 +137,9 @@ define void @test_f128_arg(fp128 %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- ; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[ARGUMENT_i64_]](s64), [[ARGUMENT_i64_1]](s64)
+ ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ ; CHECK-NEXT: [[MV:%[0-9]+]]:_(f128) = G_MERGE_VALUES [[ARGUMENT_i64_]](i64), [[ARGUMENT_i64_1]](i64)
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -172,9 +172,9 @@ define void @test_multiple_args(ptr %arg1, float %arg2, i1 %arg3) {
; WASM32-NEXT: liveins: $arguments
; WASM32-NEXT: {{ $}}
; WASM32-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
- ; WASM32-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 1, implicit $arguments
- ; WASM32-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; WASM32-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ARGUMENT_i32_1]](s32)
+ ; WASM32-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 1, implicit $arguments
+ ; WASM32-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; WASM32-NEXT: [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ARGUMENT_i32_1]](i32)
; WASM32-NEXT: RETURN implicit-def $arguments
;
; WASM64-LABEL: name: test_multiple_args
@@ -182,9 +182,9 @@ define void @test_multiple_args(ptr %arg1, float %arg2, i1 %arg3) {
; WASM64-NEXT: liveins: $arguments
; WASM64-NEXT: {{ $}}
; WASM64-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; WASM64-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 1, implicit $arguments
- ; WASM64-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; WASM64-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ARGUMENT_i32_]](s32)
+ ; WASM64-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 1, implicit $arguments
+ ; WASM64-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; WASM64-NEXT: [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ARGUMENT_i32_]](i32)
; WASM64-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -194,16 +194,16 @@ define void @test_array_arg([5 x i16] %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_]](s32)
- ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_1]](s32)
- ; CHECK-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_2]](s32)
- ; CHECK-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; CHECK-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_3]](s32)
- ; CHECK-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; CHECK-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_4]](s32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[ARGUMENT_i32_]](i32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i16) = G_TRUNC [[ARGUMENT_i32_1]](i32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(i16) = G_TRUNC [[ARGUMENT_i32_2]](i32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC3:%[0-9]+]]:_(i16) = G_TRUNC [[ARGUMENT_i32_3]](i32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC4:%[0-9]+]]:_(i16) = G_TRUNC [[ARGUMENT_i32_4]](i32)
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
@@ -215,14 +215,14 @@ define void @test_struct_arg(%StructTy %arg) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[ARGUMENT_i32_]](s32)
- ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_1]](s32)
- ; CHECK-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[ARGUMENT_i32_2]](s32)
- ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 4, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[ARGUMENT_i32_]](i32)
+ ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i16) = G_TRUNC [[ARGUMENT_i32_1]](i32)
+ ; CHECK-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(i1) = G_TRUNC [[ARGUMENT_i32_2]](i32)
+ ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 4, implicit $arguments
; CHECK-NEXT: RETURN implicit-def $arguments
ret void
}
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
index ee31b7bf8c180..8acbf587192e4 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
@@ -26,8 +26,8 @@ define i32 @call_ret_i32_args_none() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: CALL @ret_i32_args_none, def %0(s32), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; CHECK-NEXT: RETURN %0(s32), implicit-def $arguments
+ ; CHECK-NEXT: CALL @ret_i32_args_none, def %0(i32), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: RETURN %0(i32), implicit-def $arguments
%ret = call i32 @ret_i32_args_none()
ret i32 %ret
}
@@ -38,8 +38,8 @@ define i64 @call_ret_i64_args_none() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: CALL @ret_i64_args_none, def %0(s64), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; CHECK-NEXT: RETURN %0(s64), implicit-def $arguments
+ ; CHECK-NEXT: CALL @ret_i64_args_none, def %0(i64), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: RETURN %0(i64), implicit-def $arguments
%ret = call i64 @ret_i64_args_none()
ret i64 %ret
}
@@ -50,8 +50,8 @@ define float @call_ret_f32_args_none() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: CALL @ret_f32_args_none, def %0(s32), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; CHECK-NEXT: RETURN %0(s32), implicit-def $arguments
+ ; CHECK-NEXT: CALL @ret_f32_args_none, def %0(f32), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: RETURN %0(f32), implicit-def $arguments
%ret = call float @ret_f32_args_none()
ret float %ret
}
@@ -62,8 +62,8 @@ define double @call_ret_f64_args_none() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: CALL @ret_f64_args_none, def %0(s64), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; CHECK-NEXT: RETURN %0(s64), implicit-def $arguments
+ ; CHECK-NEXT: CALL @ret_f64_args_none, def %0(f64), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: RETURN %0(f64), implicit-def $arguments
%ret = call double @ret_f64_args_none()
ret double %ret
}
@@ -113,8 +113,8 @@ define i128 @call_ret_i128_args_none() {
; WASM32-BASIC-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
; WASM32-BASIC-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; WASM32-BASIC-NEXT: CALL @ret_i128_args_none, [[FRAME_INDEX]](p0), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; WASM32-BASIC-NEXT: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s128) from %stack.0)
- ; WASM32-BASIC-NEXT: G_STORE [[LOAD]](s128), [[ARGUMENT_i32_]](p0) :: (store (s128))
+ ; WASM32-BASIC-NEXT: [[LOAD:%[0-9]+]]:_(i128) = G_LOAD [[FRAME_INDEX]](p0) :: (load (i128) from %stack.0)
+ ; WASM32-BASIC-NEXT: G_STORE [[LOAD]](i128), [[ARGUMENT_i32_]](p0) :: (store (i128))
; WASM32-BASIC-NEXT: RETURN implicit-def $arguments
;
; WASM64-BASIC-LABEL: name: call_ret_i128_args_none
@@ -124,18 +124,18 @@ define i128 @call_ret_i128_args_none() {
; WASM64-BASIC-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
; WASM64-BASIC-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; WASM64-BASIC-NEXT: CALL @ret_i128_args_none, [[FRAME_INDEX]](p0), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; WASM64-BASIC-NEXT: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s128) from %stack.0)
- ; WASM64-BASIC-NEXT: G_STORE [[LOAD]](s128), [[ARGUMENT_i64_]](p0) :: (store (s128))
+ ; WASM64-BASIC-NEXT: [[LOAD:%[0-9]+]]:_(i128) = G_LOAD [[FRAME_INDEX]](p0) :: (load (i128) from %stack.0)
+ ; WASM64-BASIC-NEXT: G_STORE [[LOAD]](i128), [[ARGUMENT_i64_]](p0) :: (store (i128))
; WASM64-BASIC-NEXT: RETURN implicit-def $arguments
;
; MULTIVAL-SIMD-LABEL: name: call_ret_i128_args_none
; MULTIVAL-SIMD: bb.1 (%ir-block.0):
; MULTIVAL-SIMD-NEXT: liveins: $arguments
; MULTIVAL-SIMD-NEXT: {{ $}}
- ; MULTIVAL-SIMD-NEXT: CALL @ret_i128_args_none, def %1(s64), def %2(s64), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; MULTIVAL-SIMD-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES %1(s64), %2(s64)
- ; MULTIVAL-SIMD-NEXT: [[UV:%[0-9]+]]:i64(s64), [[UV1:%[0-9]+]]:i64(s64) = G_UNMERGE_VALUES [[MV]](s128)
- ; MULTIVAL-SIMD-NEXT: RETURN [[UV]](s64), [[UV1]](s64), implicit-def $arguments
+ ; MULTIVAL-SIMD-NEXT: CALL @ret_i128_args_none, def %1(i64), def %2(i64), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; MULTIVAL-SIMD-NEXT: [[MV:%[0-9]+]]:_(i128) = G_MERGE_VALUES %1(i64), %2(i64)
+ ; MULTIVAL-SIMD-NEXT: [[UV:%[0-9]+]]:i64(i64), [[UV1:%[0-9]+]]:i64(i64) = G_UNMERGE_VALUES [[MV]](i128)
+ ; MULTIVAL-SIMD-NEXT: RETURN [[UV]](i64), [[UV1]](i64), implicit-def $arguments
%ret = call i128 @ret_i128_args_none()
ret i128 %ret
}
@@ -146,10 +146,10 @@ define half @call_ret_f16_args_none() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: CALL @ret_f16_args_none, def %1(s32), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC %1(s32)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[TRUNC]](s16)
- ; CHECK-NEXT: RETURN [[ANYEXT]](s32), implicit-def $arguments
+ ; CHECK-NEXT: CALL @ret_f16_args_none, def %1(i32), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(f16) = G_TRUNC %1(i32)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[TRUNC]](f16)
+ ; CHECK-NEXT: RETURN [[ANYEXT]](i32), implicit-def $arguments
%ret = call half @ret_f16_args_none()
ret half %ret
}
@@ -160,8 +160,8 @@ define void @call_ret_void_args_i32(i32 %a) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: CALL @ret_void_args_i32, [[ARGUMENT_i32_]](s32), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: CALL @ret_void_args_i32, [[ARGUMENT_i32_]](i32), implicit-def $arguments, implicit $sp32, implicit $sp64
; CHECK-NEXT: RETURN implicit-def $arguments
call void @ret_void_args_i32(i32 %a)
ret void
@@ -173,8 +173,8 @@ define void @call_ret_void_args_i64(i64 %a) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- ; CHECK-NEXT: CALL @ret_void_args_i64, [[ARGUMENT_i64_]](s64), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ ; CHECK-NEXT: CALL @ret_void_args_i64, [[ARGUMENT_i64_]](i64), implicit-def $arguments, implicit $sp32, implicit $sp64
; CHECK-NEXT: RETURN implicit-def $arguments
call void @ret_void_args_i64(i64 %a)
ret void
@@ -186,8 +186,8 @@ define void @call_ret_void_args_f32(float %a) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(s32) = ARGUMENT_f32 0, implicit $arguments
- ; CHECK-NEXT: CALL @ret_void_args_f32, [[ARGUMENT_f32_]](s32), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: [[ARGUMENT_f32_:%[0-9]+]]:f32(f32) = ARGUMENT_f32 0, implicit $arguments
+ ; CHECK-NEXT: CALL @ret_void_args_f32, [[ARGUMENT_f32_]](f32), implicit-def $arguments, implicit $sp32, implicit $sp64
; CHECK-NEXT: RETURN implicit-def $arguments
call void @ret_void_args_f32(float %a)
ret void
@@ -199,8 +199,8 @@ define void @call_ret_void_args_f64(double %a) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_f64_:%[0-9]+]]:f64(s64) = ARGUMENT_f64 0, implicit $arguments
- ; CHECK-NEXT: CALL @ret_void_args_f64, [[ARGUMENT_f64_]](s64), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: [[ARGUMENT_f64_:%[0-9]+]]:f64(f64) = ARGUMENT_f64 0, implicit $arguments
+ ; CHECK-NEXT: CALL @ret_void_args_f64, [[ARGUMENT_f64_]](f64), implicit-def $arguments, implicit $sp32, implicit $sp64
; CHECK-NEXT: RETURN implicit-def $arguments
call void @ret_void_args_f64(double %a)
ret void
@@ -259,11 +259,11 @@ define void @call_ret_void_args_i128(i128 %a) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(s64) = ARGUMENT_i64 0, implicit $arguments
- ; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(s64) = ARGUMENT_i64 1, implicit $arguments
- ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[ARGUMENT_i64_]](s64), [[ARGUMENT_i64_1]](s64)
- ; CHECK-NEXT: [[UV:%[0-9]+]]:i64(s64), [[UV1:%[0-9]+]]:i64(s64) = G_UNMERGE_VALUES [[MV]](s128)
- ; CHECK-NEXT: CALL @ret_void_args_i128, [[UV]](s64), [[UV1]](s64), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(i64) = ARGUMENT_i64 0, implicit $arguments
+ ; CHECK-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(i64) = ARGUMENT_i64 1, implicit $arguments
+ ; CHECK-NEXT: [[MV:%[0-9]+]]:_(i128) = G_MERGE_VALUES [[ARGUMENT_i64_]](i64), [[ARGUMENT_i64_1]](i64)
+ ; CHECK-NEXT: [[UV:%[0-9]+]]:i64(i64), [[UV1:%[0-9]+]]:i64(i64) = G_UNMERGE_VALUES [[MV]](i128)
+ ; CHECK-NEXT: CALL @ret_void_args_i128, [[UV]](i64), [[UV1]](i64), implicit-def $arguments, implicit $sp32, implicit $sp64
; CHECK-NEXT: RETURN implicit-def $arguments
call void @ret_void_args_i128(i128 %a)
ret void
@@ -275,10 +275,10 @@ define void @call_ret_void_args_f16(half %a) {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 0, implicit $arguments
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[ARGUMENT_i32_]](s32)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[TRUNC]](s16)
- ; CHECK-NEXT: CALL @ret_void_args_f16, [[ANYEXT]](s32), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 0, implicit $arguments
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(f16) = G_TRUNC [[ARGUMENT_i32_]](i32)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[TRUNC]](f16)
+ ; CHECK-NEXT: CALL @ret_void_args_f16, [[ANYEXT]](i32), implicit-def $arguments, implicit $sp32, implicit $sp64
; CHECK-NEXT: RETURN implicit-def $arguments
call void @ret_void_args_f16(half %a)
ret void
@@ -292,47 +292,47 @@ define %complexret @call_complex(<8 x i16> %a, [3 x ptr] %b, i1 %c) {
; WASM32-BASIC-NEXT: liveins: $arguments
; WASM32-BASIC-NEXT: {{ $}}
; WASM32-BASIC-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(s32) = ARGUMENT_i32 5, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(s32) = ARGUMENT_i32 6, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(s32) = ARGUMENT_i32 7, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_8:%[0-9]+]]:i32(s32) = ARGUMENT_i32 8, implicit $arguments
- ; WASM32-BASIC-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[ARGUMENT_i32_1]](s32), [[ARGUMENT_i32_2]](s32), [[ARGUMENT_i32_3]](s32), [[ARGUMENT_i32_4]](s32), [[ARGUMENT_i32_5]](s32), [[ARGUMENT_i32_6]](s32), [[ARGUMENT_i32_7]](s32), [[ARGUMENT_i32_8]](s32)
- ; WASM32-BASIC-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x s16>) = G_TRUNC [[BUILD_VECTOR]](<8 x s32>)
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(i32) = ARGUMENT_i32 5, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(i32) = ARGUMENT_i32 6, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(i32) = ARGUMENT_i32 7, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_8:%[0-9]+]]:i32(i32) = ARGUMENT_i32 8, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x i32>) = G_BUILD_VECTOR [[ARGUMENT_i32_1]](i32), [[ARGUMENT_i32_2]](i32), [[ARGUMENT_i32_3]](i32), [[ARGUMENT_i32_4]](i32), [[ARGUMENT_i32_5]](i32), [[ARGUMENT_i32_6]](i32), [[ARGUMENT_i32_7]](i32), [[ARGUMENT_i32_8]](i32)
+ ; WASM32-BASIC-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x i16>) = G_TRUNC [[BUILD_VECTOR]](<8 x i32>)
; WASM32-BASIC-NEXT: [[ARGUMENT_i32_9:%[0-9]+]]:i32(p0) = ARGUMENT_i32 9, implicit $arguments
; WASM32-BASIC-NEXT: [[ARGUMENT_i32_10:%[0-9]+]]:i32(p0) = ARGUMENT_i32 10, implicit $arguments
; WASM32-BASIC-NEXT: [[ARGUMENT_i32_11:%[0-9]+]]:i32(p0) = ARGUMENT_i32 11, implicit $arguments
- ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_12:%[0-9]+]]:i32(s32) = ARGUMENT_i32 12, implicit $arguments
- ; WASM32-BASIC-NEXT: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ARGUMENT_i32_12]](s32)
+ ; WASM32-BASIC-NEXT: [[ARGUMENT_i32_12:%[0-9]+]]:i32(i32) = ARGUMENT_i32 12, implicit $arguments
+ ; WASM32-BASIC-NEXT: [[TRUNC1:%[0-9]+]]:_(i1) = G_TRUNC [[ARGUMENT_i32_12]](i32)
; WASM32-BASIC-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
- ; WASM32-BASIC-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[TRUNC]](<8 x s16>)
- ; WASM32-BASIC-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV]](s16)
- ; WASM32-BASIC-NEXT: [[ANYEXT1:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV1]](s16)
- ; WASM32-BASIC-NEXT: [[ANYEXT2:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV2]](s16)
- ; WASM32-BASIC-NEXT: [[ANYEXT3:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV3]](s16)
- ; WASM32-BASIC-NEXT: [[ANYEXT4:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV4]](s16)
- ; WASM32-BASIC-NEXT: [[ANYEXT5:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV5]](s16)
- ; WASM32-BASIC-NEXT: [[ANYEXT6:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV6]](s16)
- ; WASM32-BASIC-NEXT: [[ANYEXT7:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV7]](s16)
- ; WASM32-BASIC-NEXT: [[ANYEXT8:%[0-9]+]]:i32(s32) = G_ANYEXT [[TRUNC1]](s1)
- ; WASM32-BASIC-NEXT: CALL @complex, [[FRAME_INDEX]](p0), [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32), [[ANYEXT3]](s32), [[ANYEXT4]](s32), [[ANYEXT5]](s32), [[ANYEXT6]](s32), [[ANYEXT7]](s32), [[ARGUMENT_i32_9]](p0), [[ARGUMENT_i32_10]](p0), [[ARGUMENT_i32_11]](p0), [[ANYEXT8]](s32), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; WASM32-BASIC-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.0, align 16)
- ; WASM32-BASIC-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; WASM32-BASIC-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)
+ ; WASM32-BASIC-NEXT: [[UV:%[0-9]+]]:_(i16), [[UV1:%[0-9]+]]:_(i16), [[UV2:%[0-9]+]]:_(i16), [[UV3:%[0-9]+]]:_(i16), [[UV4:%[0-9]+]]:_(i16), [[UV5:%[0-9]+]]:_(i16), [[UV6:%[0-9]+]]:_(i16), [[UV7:%[0-9]+]]:_(i16) = G_UNMERGE_VALUES [[TRUNC]](<8 x i16>)
+ ; WASM32-BASIC-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV]](i16)
+ ; WASM32-BASIC-NEXT: [[ANYEXT1:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV1]](i16)
+ ; WASM32-BASIC-NEXT: [[ANYEXT2:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV2]](i16)
+ ; WASM32-BASIC-NEXT: [[ANYEXT3:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV3]](i16)
+ ; WASM32-BASIC-NEXT: [[ANYEXT4:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV4]](i16)
+ ; WASM32-BASIC-NEXT: [[ANYEXT5:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV5]](i16)
+ ; WASM32-BASIC-NEXT: [[ANYEXT6:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV6]](i16)
+ ; WASM32-BASIC-NEXT: [[ANYEXT7:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV7]](i16)
+ ; WASM32-BASIC-NEXT: [[ANYEXT8:%[0-9]+]]:i32(i32) = G_ANYEXT [[TRUNC1]](i1)
+ ; WASM32-BASIC-NEXT: CALL @complex, [[FRAME_INDEX]](p0), [[ANYEXT]](i32), [[ANYEXT1]](i32), [[ANYEXT2]](i32), [[ANYEXT3]](i32), [[ANYEXT4]](i32), [[ANYEXT5]](i32), [[ANYEXT6]](i32), [[ANYEXT7]](i32), [[ARGUMENT_i32_9]](p0), [[ARGUMENT_i32_10]](p0), [[ARGUMENT_i32_11]](p0), [[ANYEXT8]](i32), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; WASM32-BASIC-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (i32) from %stack.0, align 16)
+ ; WASM32-BASIC-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
+ ; WASM32-BASIC-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](i32)
; WASM32-BASIC-NEXT: [[LOAD1:%[0-9]+]]:_(p0) = G_LOAD [[PTR_ADD]](p0) :: (load (p0) from %stack.0)
- ; WASM32-BASIC-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
- ; WASM32-BASIC-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](s32)
- ; WASM32-BASIC-NEXT: [[LOAD2:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[PTR_ADD1]](p0) :: (load (<4 x s32>) from %stack.0)
- ; WASM32-BASIC-NEXT: G_STORE [[LOAD]](s32), [[ARGUMENT_i32_]](p0) :: (store (s32), align 16)
- ; WASM32-BASIC-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; WASM32-BASIC-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C2]](s32)
+ ; WASM32-BASIC-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 16
+ ; WASM32-BASIC-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](i32)
+ ; WASM32-BASIC-NEXT: [[LOAD2:%[0-9]+]]:_(<4 x f32>) = G_LOAD [[PTR_ADD1]](p0) :: (load (<4 x f32>) from %stack.0)
+ ; WASM32-BASIC-NEXT: G_STORE [[LOAD]](i32), [[ARGUMENT_i32_]](p0) :: (store (i32), align 16)
+ ; WASM32-BASIC-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
+ ; WASM32-BASIC-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C2]](i32)
; WASM32-BASIC-NEXT: G_STORE [[LOAD1]](p0), [[PTR_ADD2]](p0) :: (store (p0))
- ; WASM32-BASIC-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
- ; WASM32-BASIC-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C3]](s32)
- ; WASM32-BASIC-NEXT: G_STORE [[LOAD2]](<4 x s32>), [[PTR_ADD3]](p0) :: (store (<4 x s32>))
+ ; WASM32-BASIC-NEXT: [[C3:%[0-9]+]]:_(i32) = G_CONSTANT i32 16
+ ; WASM32-BASIC-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C3]](i32)
+ ; WASM32-BASIC-NEXT: G_STORE [[LOAD2]](<4 x f32>), [[PTR_ADD3]](p0) :: (store (<4 x f32>))
; WASM32-BASIC-NEXT: RETURN implicit-def $arguments
;
; WASM64-BASIC-LABEL: name: call_complex
@@ -340,76 +340,76 @@ define %complexret @call_complex(<8 x i16> %a, [3 x ptr] %b, i1 %c) {
; WASM64-BASIC-NEXT: liveins: $arguments
; WASM64-BASIC-NEXT: {{ $}}
; WASM64-BASIC-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 1, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(s32) = ARGUMENT_i32 2, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(s32) = ARGUMENT_i32 3, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(s32) = ARGUMENT_i32 5, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(s32) = ARGUMENT_i32 6, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(s32) = ARGUMENT_i32 7, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(s32) = ARGUMENT_i32 8, implicit $arguments
- ; WASM64-BASIC-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](s32), [[ARGUMENT_i32_1]](s32), [[ARGUMENT_i32_2]](s32), [[ARGUMENT_i32_3]](s32), [[ARGUMENT_i32_4]](s32), [[ARGUMENT_i32_5]](s32), [[ARGUMENT_i32_6]](s32), [[ARGUMENT_i32_7]](s32)
- ; WASM64-BASIC-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x s16>) = G_TRUNC [[BUILD_VECTOR]](<8 x s32>)
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 1, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(i32) = ARGUMENT_i32 2, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(i32) = ARGUMENT_i32 3, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_4:%[0-9]+]]:i32(i32) = ARGUMENT_i32 5, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_5:%[0-9]+]]:i32(i32) = ARGUMENT_i32 6, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_6:%[0-9]+]]:i32(i32) = ARGUMENT_i32 7, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_7:%[0-9]+]]:i32(i32) = ARGUMENT_i32 8, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x i32>) = G_BUILD_VECTOR [[ARGUMENT_i32_]](i32), [[ARGUMENT_i32_1]](i32), [[ARGUMENT_i32_2]](i32), [[ARGUMENT_i32_3]](i32), [[ARGUMENT_i32_4]](i32), [[ARGUMENT_i32_5]](i32), [[ARGUMENT_i32_6]](i32), [[ARGUMENT_i32_7]](i32)
+ ; WASM64-BASIC-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x i16>) = G_TRUNC [[BUILD_VECTOR]](<8 x i32>)
; WASM64-BASIC-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(p0) = ARGUMENT_i64 9, implicit $arguments
; WASM64-BASIC-NEXT: [[ARGUMENT_i64_2:%[0-9]+]]:i64(p0) = ARGUMENT_i64 10, implicit $arguments
; WASM64-BASIC-NEXT: [[ARGUMENT_i64_3:%[0-9]+]]:i64(p0) = ARGUMENT_i64 11, implicit $arguments
- ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_8:%[0-9]+]]:i32(s32) = ARGUMENT_i32 12, implicit $arguments
- ; WASM64-BASIC-NEXT: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ARGUMENT_i32_8]](s32)
+ ; WASM64-BASIC-NEXT: [[ARGUMENT_i32_8:%[0-9]+]]:i32(i32) = ARGUMENT_i32 12, implicit $arguments
+ ; WASM64-BASIC-NEXT: [[TRUNC1:%[0-9]+]]:_(i1) = G_TRUNC [[ARGUMENT_i32_8]](i32)
; WASM64-BASIC-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
- ; WASM64-BASIC-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[TRUNC]](<8 x s16>)
- ; WASM64-BASIC-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV]](s16)
- ; WASM64-BASIC-NEXT: [[ANYEXT1:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV1]](s16)
- ; WASM64-BASIC-NEXT: [[ANYEXT2:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV2]](s16)
- ; WASM64-BASIC-NEXT: [[ANYEXT3:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV3]](s16)
- ; WASM64-BASIC-NEXT: [[ANYEXT4:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV4]](s16)
- ; WASM64-BASIC-NEXT: [[ANYEXT5:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV5]](s16)
- ; WASM64-BASIC-NEXT: [[ANYEXT6:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV6]](s16)
- ; WASM64-BASIC-NEXT: [[ANYEXT7:%[0-9]+]]:i32(s32) = G_ANYEXT [[UV7]](s16)
- ; WASM64-BASIC-NEXT: [[ANYEXT8:%[0-9]+]]:i32(s32) = G_ANYEXT [[TRUNC1]](s1)
- ; WASM64-BASIC-NEXT: CALL @complex, [[FRAME_INDEX]](p0), [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32), [[ANYEXT3]](s32), [[ANYEXT4]](s32), [[ANYEXT5]](s32), [[ANYEXT6]](s32), [[ANYEXT7]](s32), [[ARGUMENT_i64_1]](p0), [[ARGUMENT_i64_2]](p0), [[ARGUMENT_i64_3]](p0), [[ANYEXT8]](s32), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; WASM64-BASIC-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.0, align 16)
- ; WASM64-BASIC-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
- ; WASM64-BASIC-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](s64)
+ ; WASM64-BASIC-NEXT: [[UV:%[0-9]+]]:_(i16), [[UV1:%[0-9]+]]:_(i16), [[UV2:%[0-9]+]]:_(i16), [[UV3:%[0-9]+]]:_(i16), [[UV4:%[0-9]+]]:_(i16), [[UV5:%[0-9]+]]:_(i16), [[UV6:%[0-9]+]]:_(i16), [[UV7:%[0-9]+]]:_(i16) = G_UNMERGE_VALUES [[TRUNC]](<8 x i16>)
+ ; WASM64-BASIC-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV]](i16)
+ ; WASM64-BASIC-NEXT: [[ANYEXT1:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV1]](i16)
+ ; WASM64-BASIC-NEXT: [[ANYEXT2:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV2]](i16)
+ ; WASM64-BASIC-NEXT: [[ANYEXT3:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV3]](i16)
+ ; WASM64-BASIC-NEXT: [[ANYEXT4:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV4]](i16)
+ ; WASM64-BASIC-NEXT: [[ANYEXT5:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV5]](i16)
+ ; WASM64-BASIC-NEXT: [[ANYEXT6:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV6]](i16)
+ ; WASM64-BASIC-NEXT: [[ANYEXT7:%[0-9]+]]:i32(i32) = G_ANYEXT [[UV7]](i16)
+ ; WASM64-BASIC-NEXT: [[ANYEXT8:%[0-9]+]]:i32(i32) = G_ANYEXT [[TRUNC1]](i1)
+ ; WASM64-BASIC-NEXT: CALL @complex, [[FRAME_INDEX]](p0), [[ANYEXT]](i32), [[ANYEXT1]](i32), [[ANYEXT2]](i32), [[ANYEXT3]](i32), [[ANYEXT4]](i32), [[ANYEXT5]](i32), [[ANYEXT6]](i32), [[ANYEXT7]](i32), [[ARGUMENT_i64_1]](p0), [[ARGUMENT_i64_2]](p0), [[ARGUMENT_i64_3]](p0), [[ANYEXT8]](i32), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; WASM64-BASIC-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (i32) from %stack.0, align 16)
+ ; WASM64-BASIC-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
+ ; WASM64-BASIC-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](i64)
; WASM64-BASIC-NEXT: [[LOAD1:%[0-9]+]]:_(p0) = G_LOAD [[PTR_ADD]](p0) :: (load (p0) from %stack.0)
- ; WASM64-BASIC-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
- ; WASM64-BASIC-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](s64)
- ; WASM64-BASIC-NEXT: [[LOAD2:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[PTR_ADD1]](p0) :: (load (<4 x s32>) from %stack.0)
- ; WASM64-BASIC-NEXT: G_STORE [[LOAD]](s32), [[ARGUMENT_i64_]](p0) :: (store (s32), align 16)
- ; WASM64-BASIC-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
- ; WASM64-BASIC-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C2]](s64)
+ ; WASM64-BASIC-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
+ ; WASM64-BASIC-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](i64)
+ ; WASM64-BASIC-NEXT: [[LOAD2:%[0-9]+]]:_(<4 x f32>) = G_LOAD [[PTR_ADD1]](p0) :: (load (<4 x f32>) from %stack.0)
+ ; WASM64-BASIC-NEXT: G_STORE [[LOAD]](i32), [[ARGUMENT_i64_]](p0) :: (store (i32), align 16)
+ ; WASM64-BASIC-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
+ ; WASM64-BASIC-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C2]](i64)
; WASM64-BASIC-NEXT: G_STORE [[LOAD1]](p0), [[PTR_ADD2]](p0) :: (store (p0))
- ; WASM64-BASIC-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
- ; WASM64-BASIC-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C3]](s64)
- ; WASM64-BASIC-NEXT: G_STORE [[LOAD2]](<4 x s32>), [[PTR_ADD3]](p0) :: (store (<4 x s32>))
+ ; WASM64-BASIC-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
+ ; WASM64-BASIC-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C3]](i64)
+ ; WASM64-BASIC-NEXT: G_STORE [[LOAD2]](<4 x f32>), [[PTR_ADD3]](p0) :: (store (<4 x f32>))
; WASM64-BASIC-NEXT: RETURN implicit-def $arguments
;
; WASM32-MULTIVAL-SIMD-LABEL: name: call_complex
; WASM32-MULTIVAL-SIMD: bb.1 (%ir-block.0):
; WASM32-MULTIVAL-SIMD-NEXT: liveins: $arguments
; WASM32-MULTIVAL-SIMD-NEXT: {{ $}}
- ; WASM32-MULTIVAL-SIMD-NEXT: [[ARGUMENT_v8i16_:%[0-9]+]]:v128(<8 x s16>) = ARGUMENT_v8i16 0, implicit $arguments
+ ; WASM32-MULTIVAL-SIMD-NEXT: [[ARGUMENT_v8i16_:%[0-9]+]]:v128(<8 x i16>) = ARGUMENT_v8i16 0, implicit $arguments
; WASM32-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 1, implicit $arguments
; WASM32-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32(p0) = ARGUMENT_i32 2, implicit $arguments
; WASM32-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i32_2:%[0-9]+]]:i32(p0) = ARGUMENT_i32 3, implicit $arguments
- ; WASM32-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; WASM32-MULTIVAL-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ARGUMENT_i32_3]](s32)
- ; WASM32-MULTIVAL-SIMD-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[TRUNC]](s1)
- ; WASM32-MULTIVAL-SIMD-NEXT: CALL @complex, [[ARGUMENT_v8i16_]](<8 x s16>), [[ARGUMENT_i32_]](p0), [[ARGUMENT_i32_1]](p0), [[ARGUMENT_i32_2]](p0), [[ANYEXT]](s32), def %6(s32), def %7(p0), def %8(<4 x s32>), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; WASM32-MULTIVAL-SIMD-NEXT: RETURN %6(s32), %7(p0), %8(<4 x s32>), implicit-def $arguments
+ ; WASM32-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i32_3:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; WASM32-MULTIVAL-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ARGUMENT_i32_3]](i32)
+ ; WASM32-MULTIVAL-SIMD-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[TRUNC]](i1)
+ ; WASM32-MULTIVAL-SIMD-NEXT: CALL @complex, [[ARGUMENT_v8i16_]](<8 x i16>), [[ARGUMENT_i32_]](p0), [[ARGUMENT_i32_1]](p0), [[ARGUMENT_i32_2]](p0), [[ANYEXT]](i32), def %6(i32), def %7(p0), def %8(<4 x f32>), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; WASM32-MULTIVAL-SIMD-NEXT: RETURN %6(i32), %7(p0), %8(<4 x f32>), implicit-def $arguments
;
; WASM64-MULTIVAL-SIMD-LABEL: name: call_complex
; WASM64-MULTIVAL-SIMD: bb.1 (%ir-block.0):
; WASM64-MULTIVAL-SIMD-NEXT: liveins: $arguments
; WASM64-MULTIVAL-SIMD-NEXT: {{ $}}
- ; WASM64-MULTIVAL-SIMD-NEXT: [[ARGUMENT_v8i16_:%[0-9]+]]:v128(<8 x s16>) = ARGUMENT_v8i16 0, implicit $arguments
+ ; WASM64-MULTIVAL-SIMD-NEXT: [[ARGUMENT_v8i16_:%[0-9]+]]:v128(<8 x i16>) = ARGUMENT_v8i16 0, implicit $arguments
; WASM64-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 1, implicit $arguments
; WASM64-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i64_1:%[0-9]+]]:i64(p0) = ARGUMENT_i64 2, implicit $arguments
; WASM64-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i64_2:%[0-9]+]]:i64(p0) = ARGUMENT_i64 3, implicit $arguments
- ; WASM64-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(s32) = ARGUMENT_i32 4, implicit $arguments
- ; WASM64-MULTIVAL-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ARGUMENT_i32_]](s32)
- ; WASM64-MULTIVAL-SIMD-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[TRUNC]](s1)
- ; WASM64-MULTIVAL-SIMD-NEXT: CALL @complex, [[ARGUMENT_v8i16_]](<8 x s16>), [[ARGUMENT_i64_]](p0), [[ARGUMENT_i64_1]](p0), [[ARGUMENT_i64_2]](p0), [[ANYEXT]](s32), def %6(s32), def %7(p0), def %8(<4 x s32>), implicit-def $arguments, implicit $sp32, implicit $sp64
- ; WASM64-MULTIVAL-SIMD-NEXT: RETURN %6(s32), %7(p0), %8(<4 x s32>), implicit-def $arguments
+ ; WASM64-MULTIVAL-SIMD-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(i32) = ARGUMENT_i32 4, implicit $arguments
+ ; WASM64-MULTIVAL-SIMD-NEXT: [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ARGUMENT_i32_]](i32)
+ ; WASM64-MULTIVAL-SIMD-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[TRUNC]](i1)
+ ; WASM64-MULTIVAL-SIMD-NEXT: CALL @complex, [[ARGUMENT_v8i16_]](<8 x i16>), [[ARGUMENT_i64_]](p0), [[ARGUMENT_i64_1]](p0), [[ARGUMENT_i64_2]](p0), [[ANYEXT]](i32), def %6(i32), def %7(p0), def %8(<4 x f32>), implicit-def $arguments, implicit $sp32, implicit $sp64
+ ; WASM64-MULTIVAL-SIMD-NEXT: RETURN %6(i32), %7(p0), %8(<4 x f32>), implicit-def $arguments
%ret = call %complexret @complex(<8 x i16> %a, [3 x ptr] %b, i1 %c)
ret %complexret %ret
}
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
index 02c72cf9f157d..97c2512a93d85 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
@@ -10,8 +10,8 @@ define i128 @test_ret_i128() {
; WASM32-NOMULTIVAL-NEXT: liveins: $arguments
; WASM32-NOMULTIVAL-NEXT: {{ $}}
; WASM32-NOMULTIVAL-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
- ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 0
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](s128), [[ARGUMENT_i32_]](p0) :: (store (s128))
+ ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(i128) = G_CONSTANT i128 0
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](i128), [[ARGUMENT_i32_]](p0) :: (store (i128))
; WASM32-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; WASM64-NOMULTIVAL-LABEL: name: test_ret_i128
@@ -19,17 +19,17 @@ define i128 @test_ret_i128() {
; WASM64-NOMULTIVAL-NEXT: liveins: $arguments
; WASM64-NOMULTIVAL-NEXT: {{ $}}
; WASM64-NOMULTIVAL-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 0
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](s128), [[ARGUMENT_i64_]](p0) :: (store (s128))
+ ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(i128) = G_CONSTANT i128 0
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](i128), [[ARGUMENT_i64_]](p0) :: (store (i128))
; WASM64-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; MULTIVAL-LABEL: name: test_ret_i128
; MULTIVAL: bb.1 (%ir-block.0):
; MULTIVAL-NEXT: liveins: $arguments
; MULTIVAL-NEXT: {{ $}}
- ; MULTIVAL-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 0
- ; MULTIVAL-NEXT: [[UV:%[0-9]+]]:i64(s64), [[UV1:%[0-9]+]]:i64(s64) = G_UNMERGE_VALUES [[C]](s128)
- ; MULTIVAL-NEXT: RETURN [[UV]](s64), [[UV1]](s64), implicit-def $arguments
+ ; MULTIVAL-NEXT: [[C:%[0-9]+]]:_(i128) = G_CONSTANT i128 0
+ ; MULTIVAL-NEXT: [[UV:%[0-9]+]]:i64(i64), [[UV1:%[0-9]+]]:i64(i64) = G_UNMERGE_VALUES [[C]](i128)
+ ; MULTIVAL-NEXT: RETURN [[UV]](i64), [[UV1]](i64), implicit-def $arguments
ret i128 0
}
@@ -39,8 +39,8 @@ define fp128 @test_ret_f128() {
; WASM32-NOMULTIVAL-NEXT: liveins: $arguments
; WASM32-NOMULTIVAL-NEXT: {{ $}}
; WASM32-NOMULTIVAL-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
- ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000000000000000000000
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](s128), [[ARGUMENT_i32_]](p0) :: (store (s128))
+ ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(f128) = G_FCONSTANT fp128 0xL00000000000000000000000000000000
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](f128), [[ARGUMENT_i32_]](p0) :: (store (f128))
; WASM32-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; WASM64-NOMULTIVAL-LABEL: name: test_ret_f128
@@ -48,17 +48,17 @@ define fp128 @test_ret_f128() {
; WASM64-NOMULTIVAL-NEXT: liveins: $arguments
; WASM64-NOMULTIVAL-NEXT: {{ $}}
; WASM64-NOMULTIVAL-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000000000000000000000
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](s128), [[ARGUMENT_i64_]](p0) :: (store (s128))
+ ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(f128) = G_FCONSTANT fp128 0xL00000000000000000000000000000000
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](f128), [[ARGUMENT_i64_]](p0) :: (store (f128))
; WASM64-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; MULTIVAL-LABEL: name: test_ret_f128
; MULTIVAL: bb.1 (%ir-block.0):
; MULTIVAL-NEXT: liveins: $arguments
; MULTIVAL-NEXT: {{ $}}
- ; MULTIVAL-NEXT: [[C:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000000000000000000000
- ; MULTIVAL-NEXT: [[UV:%[0-9]+]]:i64(s64), [[UV1:%[0-9]+]]:i64(s64) = G_UNMERGE_VALUES [[C]](s128)
- ; MULTIVAL-NEXT: RETURN [[UV]](s64), [[UV1]](s64), implicit-def $arguments
+ ; MULTIVAL-NEXT: [[C:%[0-9]+]]:_(f128) = G_FCONSTANT fp128 0xL00000000000000000000000000000000
+ ; MULTIVAL-NEXT: [[UV:%[0-9]+]]:i64(i64), [[UV1:%[0-9]+]]:i64(i64) = G_UNMERGE_VALUES [[C]](f128)
+ ; MULTIVAL-NEXT: RETURN [[UV]](i64), [[UV1]](i64), implicit-def $arguments
ret fp128 zeroinitializer
}
@@ -68,9 +68,9 @@ define <4 x i32> @test_ret_v4i32() {
; WASM32-NOMULTIVAL-NEXT: liveins: $arguments
; WASM32-NOMULTIVAL-NEXT: {{ $}}
; WASM32-NOMULTIVAL-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
- ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; WASM32-NOMULTIVAL-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[BUILD_VECTOR]](<4 x s32>), [[ARGUMENT_i32_]](p0) :: (store (<4 x s32>))
+ ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; WASM32-NOMULTIVAL-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i32>) = G_BUILD_VECTOR [[C]](i32), [[C]](i32), [[C]](i32), [[C]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[BUILD_VECTOR]](<4 x i32>), [[ARGUMENT_i32_]](p0) :: (store (<4 x i32>))
; WASM32-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; WASM64-NOMULTIVAL-LABEL: name: test_ret_v4i32
@@ -78,19 +78,19 @@ define <4 x i32> @test_ret_v4i32() {
; WASM64-NOMULTIVAL-NEXT: liveins: $arguments
; WASM64-NOMULTIVAL-NEXT: {{ $}}
; WASM64-NOMULTIVAL-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; WASM64-NOMULTIVAL-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[BUILD_VECTOR]](<4 x s32>), [[ARGUMENT_i64_]](p0) :: (store (<4 x s32>))
+ ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; WASM64-NOMULTIVAL-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i32>) = G_BUILD_VECTOR [[C]](i32), [[C]](i32), [[C]](i32), [[C]](i32)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[BUILD_VECTOR]](<4 x i32>), [[ARGUMENT_i64_]](p0) :: (store (<4 x i32>))
; WASM64-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; MULTIVAL-LABEL: name: test_ret_v4i32
; MULTIVAL: bb.1 (%ir-block.0):
; MULTIVAL-NEXT: liveins: $arguments
; MULTIVAL-NEXT: {{ $}}
- ; MULTIVAL-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; MULTIVAL-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
- ; MULTIVAL-NEXT: [[UV:%[0-9]+]]:i32(s32), [[UV1:%[0-9]+]]:i32(s32), [[UV2:%[0-9]+]]:i32(s32), [[UV3:%[0-9]+]]:i32(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<4 x s32>)
- ; MULTIVAL-NEXT: RETURN [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[UV3]](s32), implicit-def $arguments
+ ; MULTIVAL-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; MULTIVAL-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i32>) = G_BUILD_VECTOR [[C]](i32), [[C]](i32), [[C]](i32), [[C]](i32)
+ ; MULTIVAL-NEXT: [[UV:%[0-9]+]]:i32(i32), [[UV1:%[0-9]+]]:i32(i32), [[UV2:%[0-9]+]]:i32(i32), [[UV3:%[0-9]+]]:i32(i32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<4 x i32>)
+ ; MULTIVAL-NEXT: RETURN [[UV]](i32), [[UV1]](i32), [[UV2]](i32), [[UV3]](i32), implicit-def $arguments
ret <4 x i32> zeroinitializer
}
@@ -100,20 +100,20 @@ define [5 x i16] @test_array_arg() {
; WASM32-NOMULTIVAL-NEXT: liveins: $arguments
; WASM32-NOMULTIVAL-NEXT: {{ $}}
; WASM32-NOMULTIVAL-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
- ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[ARGUMENT_i32_]](p0) :: (store (s16))
- ; WASM32-NOMULTIVAL-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C1]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[PTR_ADD]](p0) :: (store (s16))
- ; WASM32-NOMULTIVAL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C2]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[PTR_ADD1]](p0) :: (store (s16))
- ; WASM32-NOMULTIVAL-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C3]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[PTR_ADD2]](p0) :: (store (s16))
- ; WASM32-NOMULTIVAL-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C4]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[PTR_ADD3]](p0) :: (store (s16))
+ ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[ARGUMENT_i32_]](p0) :: (store (i16))
+ ; WASM32-NOMULTIVAL-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C1]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[PTR_ADD]](p0) :: (store (i16))
+ ; WASM32-NOMULTIVAL-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C2]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[PTR_ADD1]](p0) :: (store (i16))
+ ; WASM32-NOMULTIVAL-NEXT: [[C3:%[0-9]+]]:_(i32) = G_CONSTANT i32 6
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C3]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[PTR_ADD2]](p0) :: (store (i16))
+ ; WASM32-NOMULTIVAL-NEXT: [[C4:%[0-9]+]]:_(i32) = G_CONSTANT i32 8
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C4]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[PTR_ADD3]](p0) :: (store (i16))
; WASM32-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; WASM64-NOMULTIVAL-LABEL: name: test_array_arg
@@ -121,33 +121,33 @@ define [5 x i16] @test_array_arg() {
; WASM64-NOMULTIVAL-NEXT: liveins: $arguments
; WASM64-NOMULTIVAL-NEXT: {{ $}}
; WASM64-NOMULTIVAL-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[ARGUMENT_i64_]](p0) :: (store (s16))
- ; WASM64-NOMULTIVAL-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C1]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[PTR_ADD]](p0) :: (store (s16))
- ; WASM64-NOMULTIVAL-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C2]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[PTR_ADD1]](p0) :: (store (s16))
- ; WASM64-NOMULTIVAL-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 6
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C3]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[PTR_ADD2]](p0) :: (store (s16))
- ; WASM64-NOMULTIVAL-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C4]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](s16), [[PTR_ADD3]](p0) :: (store (s16))
+ ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[ARGUMENT_i64_]](p0) :: (store (i16))
+ ; WASM64-NOMULTIVAL-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 2
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C1]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[PTR_ADD]](p0) :: (store (i16))
+ ; WASM64-NOMULTIVAL-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C2]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[PTR_ADD1]](p0) :: (store (i16))
+ ; WASM64-NOMULTIVAL-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 6
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C3]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[PTR_ADD2]](p0) :: (store (i16))
+ ; WASM64-NOMULTIVAL-NEXT: [[C4:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C4]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](i16), [[PTR_ADD3]](p0) :: (store (i16))
; WASM64-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; MULTIVAL-LABEL: name: test_array_arg
; MULTIVAL: bb.1 (%ir-block.0):
; MULTIVAL-NEXT: liveins: $arguments
; MULTIVAL-NEXT: {{ $}}
- ; MULTIVAL-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; MULTIVAL-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s16)
- ; MULTIVAL-NEXT: [[ANYEXT1:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s16)
- ; MULTIVAL-NEXT: [[ANYEXT2:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s16)
- ; MULTIVAL-NEXT: [[ANYEXT3:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s16)
- ; MULTIVAL-NEXT: [[ANYEXT4:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s16)
- ; MULTIVAL-NEXT: RETURN [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32), [[ANYEXT3]](s32), [[ANYEXT4]](s32), implicit-def $arguments
+ ; MULTIVAL-NEXT: [[C:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; MULTIVAL-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i16)
+ ; MULTIVAL-NEXT: [[ANYEXT1:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i16)
+ ; MULTIVAL-NEXT: [[ANYEXT2:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i16)
+ ; MULTIVAL-NEXT: [[ANYEXT3:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i16)
+ ; MULTIVAL-NEXT: [[ANYEXT4:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i16)
+ ; MULTIVAL-NEXT: RETURN [[ANYEXT]](i32), [[ANYEXT1]](i32), [[ANYEXT2]](i32), [[ANYEXT3]](i32), [[ANYEXT4]](i32), implicit-def $arguments
ret [5 x i16] zeroinitializer
}
@@ -159,36 +159,36 @@ define %StructTy @test_ret_struct() {
; WASM32-NOMULTIVAL-NEXT: liveins: $arguments
; WASM32-NOMULTIVAL-NEXT: {{ $}}
; WASM32-NOMULTIVAL-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
- ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
- ; WASM32-NOMULTIVAL-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; WASM32-NOMULTIVAL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; WASM32-NOMULTIVAL-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; WASM32-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 0
+ ; WASM32-NOMULTIVAL-NEXT: [[C1:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; WASM32-NOMULTIVAL-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; WASM32-NOMULTIVAL-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
; WASM32-NOMULTIVAL-NEXT: [[C4:%[0-9]+]]:_(p0) = G_CONSTANT i32 0
- ; WASM32-NOMULTIVAL-NEXT: [[C5:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; WASM32-NOMULTIVAL-NEXT: [[C6:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; WASM32-NOMULTIVAL-NEXT: [[C7:%[0-9]+]]:_(s128) = G_CONSTANT i128 0
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](s8), [[ARGUMENT_i32_]](p0) :: (store (s8), align 16)
- ; WASM32-NOMULTIVAL-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C8]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C1]](s16), [[PTR_ADD]](p0) :: (store (s16))
- ; WASM32-NOMULTIVAL-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C9]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C2]](s32), [[PTR_ADD1]](p0) :: (store (s32))
- ; WASM32-NOMULTIVAL-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C10]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C3]](s64), [[PTR_ADD2]](p0) :: (store (s64))
- ; WASM32-NOMULTIVAL-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C11]](s32)
+ ; WASM32-NOMULTIVAL-NEXT: [[C5:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; WASM32-NOMULTIVAL-NEXT: [[C6:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; WASM32-NOMULTIVAL-NEXT: [[C7:%[0-9]+]]:_(i128) = G_CONSTANT i128 0
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C]](i8), [[ARGUMENT_i32_]](p0) :: (store (i8), align 16)
+ ; WASM32-NOMULTIVAL-NEXT: [[C8:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C8]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C1]](i16), [[PTR_ADD]](p0) :: (store (i16))
+ ; WASM32-NOMULTIVAL-NEXT: [[C9:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C9]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C2]](i32), [[PTR_ADD1]](p0) :: (store (i32))
+ ; WASM32-NOMULTIVAL-NEXT: [[C10:%[0-9]+]]:_(i32) = G_CONSTANT i32 8
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C10]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C3]](i64), [[PTR_ADD2]](p0) :: (store (i64))
+ ; WASM32-NOMULTIVAL-NEXT: [[C11:%[0-9]+]]:_(i32) = G_CONSTANT i32 16
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C11]](i32)
; WASM32-NOMULTIVAL-NEXT: G_STORE [[C4]](p0), [[PTR_ADD3]](p0) :: (store (p0), align 16)
- ; WASM32-NOMULTIVAL-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C12]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C5]](s32), [[PTR_ADD4]](p0) :: (store (s32))
- ; WASM32-NOMULTIVAL-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C13]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C6]](s64), [[PTR_ADD5]](p0) :: (store (s64))
- ; WASM32-NOMULTIVAL-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C14]](s32)
- ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C7]](s128), [[PTR_ADD6]](p0) :: (store (s128))
+ ; WASM32-NOMULTIVAL-NEXT: [[C12:%[0-9]+]]:_(i32) = G_CONSTANT i32 20
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C12]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C5]](f32), [[PTR_ADD4]](p0) :: (store (f32))
+ ; WASM32-NOMULTIVAL-NEXT: [[C13:%[0-9]+]]:_(i32) = G_CONSTANT i32 24
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C13]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C6]](f64), [[PTR_ADD5]](p0) :: (store (f64))
+ ; WASM32-NOMULTIVAL-NEXT: [[C14:%[0-9]+]]:_(i32) = G_CONSTANT i32 32
+ ; WASM32-NOMULTIVAL-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i32_]], [[C14]](i32)
+ ; WASM32-NOMULTIVAL-NEXT: G_STORE [[C7]](i128), [[PTR_ADD6]](p0) :: (store (i128))
; WASM32-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; WASM64-NOMULTIVAL-LABEL: name: test_ret_struct
@@ -196,70 +196,70 @@ define %StructTy @test_ret_struct() {
; WASM64-NOMULTIVAL-NEXT: liveins: $arguments
; WASM64-NOMULTIVAL-NEXT: {{ $}}
; WASM64-NOMULTIVAL-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64(p0) = ARGUMENT_i64 0, implicit $arguments
- ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
- ; WASM64-NOMULTIVAL-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; WASM64-NOMULTIVAL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; WASM64-NOMULTIVAL-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; WASM64-NOMULTIVAL-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 0
+ ; WASM64-NOMULTIVAL-NEXT: [[C1:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; WASM64-NOMULTIVAL-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; WASM64-NOMULTIVAL-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
; WASM64-NOMULTIVAL-NEXT: [[C4:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
- ; WASM64-NOMULTIVAL-NEXT: [[C5:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; WASM64-NOMULTIVAL-NEXT: [[C6:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; WASM64-NOMULTIVAL-NEXT: [[C7:%[0-9]+]]:_(s128) = G_CONSTANT i128 0
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](s8), [[ARGUMENT_i64_]](p0) :: (store (s8), align 16)
- ; WASM64-NOMULTIVAL-NEXT: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C8]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C1]](s16), [[PTR_ADD]](p0) :: (store (s16))
- ; WASM64-NOMULTIVAL-NEXT: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C9]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C2]](s32), [[PTR_ADD1]](p0) :: (store (s32))
- ; WASM64-NOMULTIVAL-NEXT: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C10]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C3]](s64), [[PTR_ADD2]](p0) :: (store (s64))
- ; WASM64-NOMULTIVAL-NEXT: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C11]](s64)
+ ; WASM64-NOMULTIVAL-NEXT: [[C5:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; WASM64-NOMULTIVAL-NEXT: [[C6:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; WASM64-NOMULTIVAL-NEXT: [[C7:%[0-9]+]]:_(i128) = G_CONSTANT i128 0
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C]](i8), [[ARGUMENT_i64_]](p0) :: (store (i8), align 16)
+ ; WASM64-NOMULTIVAL-NEXT: [[C8:%[0-9]+]]:_(i64) = G_CONSTANT i64 2
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C8]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C1]](i16), [[PTR_ADD]](p0) :: (store (i16))
+ ; WASM64-NOMULTIVAL-NEXT: [[C9:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C9]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C2]](i32), [[PTR_ADD1]](p0) :: (store (i32))
+ ; WASM64-NOMULTIVAL-NEXT: [[C10:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C10]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C3]](i64), [[PTR_ADD2]](p0) :: (store (i64))
+ ; WASM64-NOMULTIVAL-NEXT: [[C11:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C11]](i64)
; WASM64-NOMULTIVAL-NEXT: G_STORE [[C4]](p0), [[PTR_ADD3]](p0) :: (store (p0), align 16)
- ; WASM64-NOMULTIVAL-NEXT: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C12]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C5]](s32), [[PTR_ADD4]](p0) :: (store (s32), align 8)
- ; WASM64-NOMULTIVAL-NEXT: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C13]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C6]](s64), [[PTR_ADD5]](p0) :: (store (s64), align 16)
- ; WASM64-NOMULTIVAL-NEXT: [[C14:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
- ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C14]](s64)
- ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C7]](s128), [[PTR_ADD6]](p0) :: (store (s128))
+ ; WASM64-NOMULTIVAL-NEXT: [[C12:%[0-9]+]]:_(i64) = G_CONSTANT i64 24
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C12]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C5]](f32), [[PTR_ADD4]](p0) :: (store (f32), align 8)
+ ; WASM64-NOMULTIVAL-NEXT: [[C13:%[0-9]+]]:_(i64) = G_CONSTANT i64 32
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C13]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C6]](f64), [[PTR_ADD5]](p0) :: (store (f64), align 16)
+ ; WASM64-NOMULTIVAL-NEXT: [[C14:%[0-9]+]]:_(i64) = G_CONSTANT i64 48
+ ; WASM64-NOMULTIVAL-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[ARGUMENT_i64_]], [[C14]](i64)
+ ; WASM64-NOMULTIVAL-NEXT: G_STORE [[C7]](i128), [[PTR_ADD6]](p0) :: (store (i128))
; WASM64-NOMULTIVAL-NEXT: RETURN implicit-def $arguments
;
; WASM32-MULTIVAL-LABEL: name: test_ret_struct
; WASM32-MULTIVAL: bb.1 (%ir-block.0):
; WASM32-MULTIVAL-NEXT: liveins: $arguments
; WASM32-MULTIVAL-NEXT: {{ $}}
- ; WASM32-MULTIVAL-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
- ; WASM32-MULTIVAL-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; WASM32-MULTIVAL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; WASM32-MULTIVAL-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; WASM32-MULTIVAL-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 0
+ ; WASM32-MULTIVAL-NEXT: [[C1:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; WASM32-MULTIVAL-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; WASM32-MULTIVAL-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
; WASM32-MULTIVAL-NEXT: [[C4:%[0-9]+]]:_(p0) = G_CONSTANT i32 0
- ; WASM32-MULTIVAL-NEXT: [[C5:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; WASM32-MULTIVAL-NEXT: [[C6:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; WASM32-MULTIVAL-NEXT: [[C7:%[0-9]+]]:_(s128) = G_CONSTANT i128 0
- ; WASM32-MULTIVAL-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s8)
- ; WASM32-MULTIVAL-NEXT: [[ANYEXT1:%[0-9]+]]:i32(s32) = G_ANYEXT [[C1]](s16)
- ; WASM32-MULTIVAL-NEXT: [[UV:%[0-9]+]]:i64(s64), [[UV1:%[0-9]+]]:i64(s64) = G_UNMERGE_VALUES [[C7]](s128)
- ; WASM32-MULTIVAL-NEXT: RETURN [[ANYEXT]](s32), [[ANYEXT1]](s32), [[C2]](s32), [[C3]](s64), [[C4]](p0), [[C5]](s32), [[C6]](s64), [[UV]](s64), [[UV1]](s64), implicit-def $arguments
+ ; WASM32-MULTIVAL-NEXT: [[C5:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; WASM32-MULTIVAL-NEXT: [[C6:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; WASM32-MULTIVAL-NEXT: [[C7:%[0-9]+]]:_(i128) = G_CONSTANT i128 0
+ ; WASM32-MULTIVAL-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i8)
+ ; WASM32-MULTIVAL-NEXT: [[ANYEXT1:%[0-9]+]]:i32(i32) = G_ANYEXT [[C1]](i16)
+ ; WASM32-MULTIVAL-NEXT: [[UV:%[0-9]+]]:i64(i64), [[UV1:%[0-9]+]]:i64(i64) = G_UNMERGE_VALUES [[C7]](i128)
+ ; WASM32-MULTIVAL-NEXT: RETURN [[ANYEXT]](i32), [[ANYEXT1]](i32), [[C2]](i32), [[C3]](i64), [[C4]](p0), [[C5]](f32), [[C6]](f64), [[UV]](i64), [[UV1]](i64), implicit-def $arguments
;
; WASM64-MULTIVAL-LABEL: name: test_ret_struct
; WASM64-MULTIVAL: bb.1 (%ir-block.0):
; WASM64-MULTIVAL-NEXT: liveins: $arguments
; WASM64-MULTIVAL-NEXT: {{ $}}
- ; WASM64-MULTIVAL-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
- ; WASM64-MULTIVAL-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; WASM64-MULTIVAL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; WASM64-MULTIVAL-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; WASM64-MULTIVAL-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 0
+ ; WASM64-MULTIVAL-NEXT: [[C1:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; WASM64-MULTIVAL-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; WASM64-MULTIVAL-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
; WASM64-MULTIVAL-NEXT: [[C4:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
- ; WASM64-MULTIVAL-NEXT: [[C5:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; WASM64-MULTIVAL-NEXT: [[C6:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; WASM64-MULTIVAL-NEXT: [[C7:%[0-9]+]]:_(s128) = G_CONSTANT i128 0
- ; WASM64-MULTIVAL-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s8)
- ; WASM64-MULTIVAL-NEXT: [[ANYEXT1:%[0-9]+]]:i32(s32) = G_ANYEXT [[C1]](s16)
- ; WASM64-MULTIVAL-NEXT: [[UV:%[0-9]+]]:i64(s64), [[UV1:%[0-9]+]]:i64(s64) = G_UNMERGE_VALUES [[C7]](s128)
- ; WASM64-MULTIVAL-NEXT: RETURN [[ANYEXT]](s32), [[ANYEXT1]](s32), [[C2]](s32), [[C3]](s64), [[C4]](p0), [[C5]](s32), [[C6]](s64), [[UV]](s64), [[UV1]](s64), implicit-def $arguments
+ ; WASM64-MULTIVAL-NEXT: [[C5:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; WASM64-MULTIVAL-NEXT: [[C6:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; WASM64-MULTIVAL-NEXT: [[C7:%[0-9]+]]:_(i128) = G_CONSTANT i128 0
+ ; WASM64-MULTIVAL-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i8)
+ ; WASM64-MULTIVAL-NEXT: [[ANYEXT1:%[0-9]+]]:i32(i32) = G_ANYEXT [[C1]](i16)
+ ; WASM64-MULTIVAL-NEXT: [[UV:%[0-9]+]]:i64(i64), [[UV1:%[0-9]+]]:i64(i64) = G_UNMERGE_VALUES [[C7]](i128)
+ ; WASM64-MULTIVAL-NEXT: RETURN [[ANYEXT]](i32), [[ANYEXT1]](i32), [[C2]](i32), [[C3]](i64), [[C4]](p0), [[C5]](f32), [[C6]](f64), [[UV]](i64), [[UV1]](i64), implicit-def $arguments
ret %StructTy zeroinitializer
}
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
index 5c7af1f28a874..35153b5cfbd2b 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
@@ -16,9 +16,9 @@ define i8 @test_ret_i8() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s8)
- ; CHECK-NEXT: RETURN [[ANYEXT]](s32), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 0
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i8)
+ ; CHECK-NEXT: RETURN [[ANYEXT]](i32), implicit-def $arguments
ret i8 0
}
@@ -27,9 +27,9 @@ define zeroext i8 @test_ret_i8_zeroext() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 -1
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:i32(s32) = G_ZEXT [[C]](s8)
- ; CHECK-NEXT: RETURN [[ZEXT]](s32), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 -1
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:i32(i32) = G_ZEXT [[C]](i8)
+ ; CHECK-NEXT: RETURN [[ZEXT]](i32), implicit-def $arguments
ret i8 -1
}
@@ -38,9 +38,9 @@ define signext i8 @test_ret_i8_signext() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 -1
- ; CHECK-NEXT: [[SEXT:%[0-9]+]]:i32(s32) = G_SEXT [[C]](s8)
- ; CHECK-NEXT: RETURN [[SEXT]](s32), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 -1
+ ; CHECK-NEXT: [[SEXT:%[0-9]+]]:i32(i32) = G_SEXT [[C]](i8)
+ ; CHECK-NEXT: RETURN [[SEXT]](i32), implicit-def $arguments
ret i8 -1
}
@@ -50,9 +50,9 @@ define i16 @test_ret_i16() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s16)
- ; CHECK-NEXT: RETURN [[ANYEXT]](s32), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](i16)
+ ; CHECK-NEXT: RETURN [[ANYEXT]](i32), implicit-def $arguments
ret i16 0
}
@@ -61,8 +61,8 @@ define i32 @test_ret_i32() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: RETURN [[C]](s32), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: RETURN [[C]](i32), implicit-def $arguments
ret i32 0
}
@@ -71,8 +71,8 @@ define i64 @test_ret_i64() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: RETURN [[C]](s64), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: RETURN [[C]](i64), implicit-def $arguments
ret i64 0
}
@@ -98,9 +98,9 @@ define half @test_ret_f16() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(s32) = G_ANYEXT [[C]](s16)
- ; CHECK-NEXT: RETURN [[ANYEXT]](s32), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f16) = G_FCONSTANT half 0xH0000
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:i32(i32) = G_ANYEXT [[C]](f16)
+ ; CHECK-NEXT: RETURN [[ANYEXT]](i32), implicit-def $arguments
ret half 0.0
}
@@ -109,8 +109,8 @@ define float @test_ret_f32() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; CHECK-NEXT: RETURN [[C]](s32), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; CHECK-NEXT: RETURN [[C]](f32), implicit-def $arguments
ret float 0.0
}
@@ -119,8 +119,8 @@ define double @test_ret_f64() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; CHECK-NEXT: RETURN [[C]](s64), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; CHECK-NEXT: RETURN [[C]](f64), implicit-def $arguments
ret double 0.0
}
diff --git a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
index 1c1462ff976f8..898b28aa90295 100644
--- a/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
+++ b/llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
@@ -7,9 +7,9 @@ define <16 x i8> @test_ret_v16i8() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8)
- ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<16 x s8>), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 0
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x i8>) = G_BUILD_VECTOR [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8), [[C]](i8)
+ ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<16 x i8>), implicit-def $arguments
ret <16 x i8> zeroinitializer
}
@@ -18,9 +18,9 @@ define <8 x i16> @test_ret_v8i16() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16)
- ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<8 x s16>), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x i16>) = G_BUILD_VECTOR [[C]](i16), [[C]](i16), [[C]](i16), [[C]](i16), [[C]](i16), [[C]](i16), [[C]](i16), [[C]](i16)
+ ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<8 x i16>), implicit-def $arguments
ret <8 x i16> zeroinitializer
}
@@ -29,9 +29,9 @@ define <4 x i32> @test_ret_v4i32() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
- ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<4 x s32>), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i32>) = G_BUILD_VECTOR [[C]](i32), [[C]](i32), [[C]](i32), [[C]](i32)
+ ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<4 x i32>), implicit-def $arguments
ret <4 x i32> zeroinitializer
}
@@ -40,9 +40,9 @@ define <2 x i64> @test_ret_v2i64() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
- ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<2 x s64>), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i64>) = G_BUILD_VECTOR [[C]](i64), [[C]](i64)
+ ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<2 x i64>), implicit-def $arguments
ret <2 x i64> zeroinitializer
}
@@ -52,18 +52,18 @@ define <8 x half> @test_ret_v8f16() {
; NO-FP16-NEXT: liveins: $arguments
; NO-FP16-NEXT: {{ $}}
; NO-FP16-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32(p0) = ARGUMENT_i32 0, implicit $arguments
- ; NO-FP16-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
- ; NO-FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16)
- ; NO-FP16-NEXT: G_STORE [[BUILD_VECTOR]](<8 x s16>), [[ARGUMENT_i32_]](p0) :: (store (<8 x s16>))
+ ; NO-FP16-NEXT: [[C:%[0-9]+]]:_(f16) = G_FCONSTANT half 0xH0000
+ ; NO-FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x f16>) = G_BUILD_VECTOR [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16)
+ ; NO-FP16-NEXT: G_STORE [[BUILD_VECTOR]](<8 x f16>), [[ARGUMENT_i32_]](p0) :: (store (<8 x f16>))
; NO-FP16-NEXT: RETURN implicit-def $arguments
;
; FP16-LABEL: name: test_ret_v8f16
; FP16: bb.1 (%ir-block.0):
; FP16-NEXT: liveins: $arguments
; FP16-NEXT: {{ $}}
- ; FP16-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
- ; FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16)
- ; FP16-NEXT: RETURN [[BUILD_VECTOR]](<8 x s16>), implicit-def $arguments
+ ; FP16-NEXT: [[C:%[0-9]+]]:_(f16) = G_FCONSTANT half 0xH0000
+ ; FP16-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x f16>) = G_BUILD_VECTOR [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16)
+ ; FP16-NEXT: RETURN [[BUILD_VECTOR]](<8 x f16>), implicit-def $arguments
ret <8 x half> zeroinitializer
}
@@ -72,9 +72,9 @@ define <4 x float> @test_ret_v4f32() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
- ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<4 x s32>), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x f32>) = G_BUILD_VECTOR [[C]](f32), [[C]](f32), [[C]](f32), [[C]](f32)
+ ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<4 x f32>), implicit-def $arguments
ret <4 x float> zeroinitializer
}
@@ -83,8 +83,8 @@ define <2 x double> @test_ret_v2f64() {
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $arguments
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
- ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<2 x s64>), implicit-def $arguments
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x f64>) = G_BUILD_VECTOR [[C]](f64), [[C]](f64)
+ ; CHECK-NEXT: RETURN [[BUILD_VECTOR]](<2 x f64>), implicit-def $arguments
ret <2 x double> zeroinitializer
}
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