[llvm] 4e030ae - [SLP][NFC]Cache MightBeIgnored result in gather-shuffle analysis

[via llvm-commits]

Author: Alexey Bataev
Date: 2026-04-28T09:32:15-04:00
New Revision: 4e030aeec015d33e68197755923c11dc5f62e968

URL: https://github.com/llvm/llvm-project/commit/4e030aeec015d33e68197755923c11dc5f62e968
DIFF: https://github.com/llvm/llvm-project/commit/4e030aeec015d33e68197755923c11dc5f62e968.diff

LOG: [SLP][NFC]Cache MightBeIgnored result in gather-shuffle analysis

Each V in VL is queried up to 3 times for MightBeIgnored (direct +
NeighborMightBeIgnored from both neighbors), and the underlying
areAllUsersVectorized walks the instruction's user list. Memoize per
Value pointer to avoid the redundant walks.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/194619

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 
    


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diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 7826076edf435..c6f388ec1e0f5 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -20072,11 +20072,20 @@ BoUpSLP::isGatherShuffledSingleRegisterEntry(
   // We suppose it is better to ignore instruction, which do not form splats,
   // are not vectorized/not extractelements (these instructions will be handled
   // by extractelements processing) or may form vector node in future.
-  auto MightBeIgnored = [=](Value *V) {
+  // Cache results - each V in VL is queried up to 3 times (direct +
+  // NeighborMightBeIgnored from both neighbors), and areAllUsersVectorized
+  // walks each instruction's user list.
+  SmallDenseMap<Value *, bool> MightBeIgnoredCache;
+  auto MightBeIgnored = [=, &MightBeIgnoredCache](Value *V) {
+    auto [It, Inserted] = MightBeIgnoredCache.try_emplace(V);
+    if (!Inserted)
+      return It->second;
     auto *I = dyn_cast<Instruction>(V);
-    return I && !IsSplatOrUndefs && !isVectorized(I) &&
-           !isVectorLikeInstWithConstOps(I) &&
-           !areAllUsersVectorized(I, UserIgnoreList) && isSimple(I);
+    bool Res = I && !IsSplatOrUndefs && !isVectorized(I) &&
+               !isVectorLikeInstWithConstOps(I) &&
+               !areAllUsersVectorized(I, UserIgnoreList) && isSimple(I);
+    It->second = Res;
+    return Res;
   };
   // Check that the neighbor instruction may form a full vector node with the
   // current instruction V. It is possible, if they have same/alternate opcode