[llvm] [WIP][X86] Replace custom minmax reduction pattern matching with ISD::VEC_REDUCE_*MIN/MAX support (PR #194473)

[Simon Pilgrim via llvm-commits]

RKSimon wrote:

> This looks like a straightforward solution, as long as middle end handles all the patterns.

Cheers - other targets have improved ISD::VEC_REDUCE nodes handling a lot in the past few years, so we're playing catchup, and its always nice to rely less on the DAG.

https://github.com/llvm/llvm-project/pull/194473