[llvm] [NFC][PowerPC] aix-complex.ll - regenerate test checks (PR #194576)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 28 02:31:08 PDT 2026
https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/194576
Makes it easier to show the diffs in the topological dag work
>From 6c1d62a4cdc4e9bfbb096ffcb1690d112bca183d Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Tue, 28 Apr 2026 10:29:40 +0100
Subject: [PATCH] [PowerPC] aix-complex.ll - regenerate test checks
Makes it easier to show the diffs in the topological dag work
---
llvm/test/CodeGen/PowerPC/aix-complex.ll | 248 ++++++++++++++++++-----
1 file changed, 199 insertions(+), 49 deletions(-)
diff --git a/llvm/test/CodeGen/PowerPC/aix-complex.ll b/llvm/test/CodeGen/PowerPC/aix-complex.ll
index f2114540a57e4..8a259f8c419c7 100644
--- a/llvm/test/CodeGen/PowerPC/aix-complex.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-complex.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefixes=CHECK,32BIT %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | \
@@ -10,6 +11,32 @@
declare void @anchor(...)
define dso_local { double, double } @dblCmplxRetCallee() {
+; 32BIT-LABEL: dblCmplxRetCallee:
+; 32BIT: # %bb.0: # %entry
+; 32BIT-NEXT: lwz 4, L..C0(2) # %const.0
+; 32BIT-NEXT: lis 3, 16368
+; 32BIT-NEXT: stw 3, -16(1)
+; 32BIT-NEXT: li 3, 0
+; 32BIT-NEXT: lfs 1, 0(4)
+; 32BIT-NEXT: lwz 4, L..C1(2) # %const.1
+; 32BIT-NEXT: lfs 2, 0(4)
+; 32BIT-NEXT: stw 3, -12(1)
+; 32BIT-NEXT: stw 3, -4(1)
+; 32BIT-NEXT: stw 3, -8(1)
+; 32BIT-NEXT: blr
+;
+; 64BIT-LABEL: dblCmplxRetCallee:
+; 64BIT: # %bb.0: # %entry
+; 64BIT-NEXT: ld 3, L..C0(2) # %const.0
+; 64BIT-NEXT: lfs 1, 0(3)
+; 64BIT-NEXT: ld 3, L..C1(2) # %const.1
+; 64BIT-NEXT: lfs 2, 0(3)
+; 64BIT-NEXT: li 3, 1023
+; 64BIT-NEXT: rldic 3, 3, 52, 2
+; 64BIT-NEXT: std 3, -16(1)
+; 64BIT-NEXT: li 3, 0
+; 64BIT-NEXT: std 3, -8(1)
+; 64BIT-NEXT: blr
entry:
%retval = alloca { double, double }, align 8
%retval.realp = getelementptr inbounds { double, double }, ptr %retval, i32 0, i32 0
@@ -20,13 +47,38 @@ entry:
ret { double, double } %0
}
-; CHECK-LABEL: .dblCmplxRetCallee:
-
-; CHECK-DAG: lfs 1,
-; CHECK-DAG: lfs 2,
-; CHECK: blr
-
define dso_local void @dblCmplxRetCaller() {
+; 32BIT-LABEL: dblCmplxRetCaller:
+; 32BIT: # %bb.0: # %entry
+; 32BIT-NEXT: mflr 0
+; 32BIT-NEXT: stwu 1, -64(1)
+; 32BIT-NEXT: stw 0, 72(1)
+; 32BIT-NEXT: bl .dblCmplxRetCallee
+; 32BIT-NEXT: lwz 3, L..C2(2) # @gcd
+; 32BIT-NEXT: stfd 1, 0(3)
+; 32BIT-NEXT: stfd 2, 8(3)
+; 32BIT-NEXT: bl .anchor[PR]
+; 32BIT-NEXT: nop
+; 32BIT-NEXT: addi 1, 1, 64
+; 32BIT-NEXT: lwz 0, 8(1)
+; 32BIT-NEXT: mtlr 0
+; 32BIT-NEXT: blr
+;
+; 64BIT-LABEL: dblCmplxRetCaller:
+; 64BIT: # %bb.0: # %entry
+; 64BIT-NEXT: mflr 0
+; 64BIT-NEXT: stdu 1, -112(1)
+; 64BIT-NEXT: std 0, 128(1)
+; 64BIT-NEXT: bl .dblCmplxRetCallee
+; 64BIT-NEXT: ld 3, L..C2(2) # @gcd
+; 64BIT-NEXT: stfd 1, 0(3)
+; 64BIT-NEXT: stfd 2, 8(3)
+; 64BIT-NEXT: bl .anchor[PR]
+; 64BIT-NEXT: nop
+; 64BIT-NEXT: addi 1, 1, 112
+; 64BIT-NEXT: ld 0, 16(1)
+; 64BIT-NEXT: mtlr 0
+; 64BIT-NEXT: blr
entry:
%call = call { double, double } @dblCmplxRetCallee()
%0 = extractvalue { double, double } %call, 0
@@ -37,16 +89,29 @@ entry:
ret void
}
-; CHECK-LABEL: .dblCmplxRetCaller:
-
-; CHECK: bl .dblCmplxRetCallee
-; 32BIT-NEXT: lwz [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
-; 64BIT-NEXT: ld [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
-; CHECK-DAG: stfd 1, 0([[REG]])
-; CHECK-DAG: stfd 2, 8([[REG]])
-; CHECK-NEXT: bl .anchor
-
define dso_local { float, float } @fltCmplxRetCallee() {
+; 32BIT-LABEL: fltCmplxRetCallee:
+; 32BIT: # %bb.0: # %entry
+; 32BIT-NEXT: lwz 3, L..C3(2) # %const.0
+; 32BIT-NEXT: lfs 1, 0(3)
+; 32BIT-NEXT: lwz 3, L..C4(2) # %const.1
+; 32BIT-NEXT: lfs 2, 0(3)
+; 32BIT-NEXT: lis 3, 16256
+; 32BIT-NEXT: stw 3, -8(1)
+; 32BIT-NEXT: li 3, 0
+; 32BIT-NEXT: stw 3, -4(1)
+; 32BIT-NEXT: blr
+;
+; 64BIT-LABEL: fltCmplxRetCallee:
+; 64BIT: # %bb.0: # %entry
+; 64BIT-NEXT: ld 3, L..C3(2) # %const.0
+; 64BIT-NEXT: lfs 1, 0(3)
+; 64BIT-NEXT: ld 3, L..C4(2) # %const.1
+; 64BIT-NEXT: lfs 2, 0(3)
+; 64BIT-NEXT: li 3, 127
+; 64BIT-NEXT: rldic 3, 3, 55, 2
+; 64BIT-NEXT: std 3, -8(1)
+; 64BIT-NEXT: blr
entry:
%retval = alloca { float, float }, align 4
%retval.realp = getelementptr inbounds { float, float }, ptr %retval, i32 0, i32 0
@@ -57,13 +122,38 @@ entry:
ret { float, float } %0
}
-; CHECK-LABEL: .fltCmplxRetCallee:
-
-; CHECK-DAG: lfs 1,
-; CHECK-DAG: lfs 2,
-; CHECK: blr
-
define dso_local void @fltCmplxRetCaller() {
+; 32BIT-LABEL: fltCmplxRetCaller:
+; 32BIT: # %bb.0: # %entry
+; 32BIT-NEXT: mflr 0
+; 32BIT-NEXT: stwu 1, -64(1)
+; 32BIT-NEXT: stw 0, 72(1)
+; 32BIT-NEXT: bl .fltCmplxRetCallee
+; 32BIT-NEXT: lwz 3, L..C5(2) # @gcf
+; 32BIT-NEXT: stfs 1, 0(3)
+; 32BIT-NEXT: stfs 2, 4(3)
+; 32BIT-NEXT: bl .anchor[PR]
+; 32BIT-NEXT: nop
+; 32BIT-NEXT: addi 1, 1, 64
+; 32BIT-NEXT: lwz 0, 8(1)
+; 32BIT-NEXT: mtlr 0
+; 32BIT-NEXT: blr
+;
+; 64BIT-LABEL: fltCmplxRetCaller:
+; 64BIT: # %bb.0: # %entry
+; 64BIT-NEXT: mflr 0
+; 64BIT-NEXT: stdu 1, -112(1)
+; 64BIT-NEXT: std 0, 128(1)
+; 64BIT-NEXT: bl .fltCmplxRetCallee
+; 64BIT-NEXT: ld 3, L..C5(2) # @gcf
+; 64BIT-NEXT: stfs 1, 0(3)
+; 64BIT-NEXT: stfs 2, 4(3)
+; 64BIT-NEXT: bl .anchor[PR]
+; 64BIT-NEXT: nop
+; 64BIT-NEXT: addi 1, 1, 112
+; 64BIT-NEXT: ld 0, 16(1)
+; 64BIT-NEXT: mtlr 0
+; 64BIT-NEXT: blr
entry:
%call = call { float, float } @fltCmplxRetCallee()
%0 = extractvalue { float, float } %call, 0
@@ -74,16 +164,58 @@ entry:
ret void
}
-; CHECK-LABEL: .fltCmplxRetCaller:
-
-; CHECK: bl .fltCmplxRetCallee
-; 32BIT-NEXT: lwz [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
-; 64BIT-NEXT: ld [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
-; CHECK-DAG: stfs 1, 0([[REG]])
-; CHECK-DAG: stfs 2, 4([[REG]])
-; CHECK-NEXT: bl .anchor
-
define dso_local { ppc_fp128, ppc_fp128 } @fp128CmplxRetCallee() {
+; 32BIT-LABEL: fp128CmplxRetCallee:
+; 32BIT: # %bb.0: # %entry
+; 32BIT-NEXT: lis 5, 32766
+; 32BIT-NEXT: lis 6, 16382
+; 32BIT-NEXT: li 3, -1
+; 32BIT-NEXT: li 4, -2
+; 32BIT-NEXT: stw 3, -44(1)
+; 32BIT-NEXT: ori 5, 5, 65535
+; 32BIT-NEXT: ori 6, 6, 65535
+; 32BIT-NEXT: stw 3, -48(1)
+; 32BIT-NEXT: stw 4, -52(1)
+; 32BIT-NEXT: stw 3, -56(1)
+; 32BIT-NEXT: stw 3, -36(1)
+; 32BIT-NEXT: stw 5, -40(1)
+; 32BIT-NEXT: stw 3, -60(1)
+; 32BIT-NEXT: stw 6, -64(1)
+; 32BIT-NEXT: lfd 2, -48(1)
+; 32BIT-NEXT: lfd 4, -56(1)
+; 32BIT-NEXT: lfd 1, -40(1)
+; 32BIT-NEXT: lfd 3, -64(1)
+; 32BIT-NEXT: stw 3, -28(1)
+; 32BIT-NEXT: stw 3, -20(1)
+; 32BIT-NEXT: stw 3, -24(1)
+; 32BIT-NEXT: stw 3, -12(1)
+; 32BIT-NEXT: stw 4, -4(1)
+; 32BIT-NEXT: stw 3, -8(1)
+; 32BIT-NEXT: stw 5, -32(1)
+; 32BIT-NEXT: stw 6, -16(1)
+; 32BIT-NEXT: blr
+;
+; 64BIT-LABEL: fp128CmplxRetCallee:
+; 64BIT: # %bb.0: # %entry
+; 64BIT-NEXT: li 3, -1
+; 64BIT-NEXT: std 3, -24(1)
+; 64BIT-NEXT: li 3, -3
+; 64BIT-NEXT: rldicl 3, 3, 47, 1
+; 64BIT-NEXT: std 3, -32(1)
+; 64BIT-NEXT: ld 3, L..C6(2) # %const.0
+; 64BIT-NEXT: lfd 1, 0(3)
+; 64BIT-NEXT: ld 3, L..C7(2) # %const.1
+; 64BIT-NEXT: lfd 2, 0(3)
+; 64BIT-NEXT: ld 3, L..C8(2) # %const.2
+; 64BIT-NEXT: lfd 3, 0(3)
+; 64BIT-NEXT: ld 3, L..C9(2) # %const.3
+; 64BIT-NEXT: lfd 4, 0(3)
+; 64BIT-NEXT: li 3, -2
+; 64BIT-NEXT: std 3, -8(1)
+; 64BIT-NEXT: li 3, -5
+; 64BIT-NEXT: rldicl 3, 3, 46, 2
+; 64BIT-NEXT: std 3, -16(1)
+; 64BIT-NEXT: blr
entry:
%retval = alloca { ppc_fp128, ppc_fp128 }, align 16
%retval.realp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, ptr %retval, i32 0, i32 0
@@ -94,15 +226,42 @@ entry:
ret { ppc_fp128, ppc_fp128 } %0
}
-; CHECK-LABEL: .fp128CmplxRetCallee:
-
-; CHECK-DAG: lfd 1,
-; CHECK-DAG: lfd 2,
-; CHECK-DAG: lfd 3,
-; CHECK-DAG: lfd 4,
-; CHECK: blr
-
define dso_local void @fp128CmplxRetCaller() {
+; 32BIT-LABEL: fp128CmplxRetCaller:
+; 32BIT: # %bb.0: # %entry
+; 32BIT-NEXT: mflr 0
+; 32BIT-NEXT: stwu 1, -64(1)
+; 32BIT-NEXT: stw 0, 72(1)
+; 32BIT-NEXT: bl .fp128CmplxRetCallee
+; 32BIT-NEXT: lwz 3, L..C6(2) # @gcfp128
+; 32BIT-NEXT: stfd 2, 8(3)
+; 32BIT-NEXT: stfd 1, 0(3)
+; 32BIT-NEXT: stfd 4, 24(3)
+; 32BIT-NEXT: stfd 3, 16(3)
+; 32BIT-NEXT: bl .anchor[PR]
+; 32BIT-NEXT: nop
+; 32BIT-NEXT: addi 1, 1, 64
+; 32BIT-NEXT: lwz 0, 8(1)
+; 32BIT-NEXT: mtlr 0
+; 32BIT-NEXT: blr
+;
+; 64BIT-LABEL: fp128CmplxRetCaller:
+; 64BIT: # %bb.0: # %entry
+; 64BIT-NEXT: mflr 0
+; 64BIT-NEXT: stdu 1, -112(1)
+; 64BIT-NEXT: std 0, 128(1)
+; 64BIT-NEXT: bl .fp128CmplxRetCallee
+; 64BIT-NEXT: ld 3, L..C10(2) # @gcfp128
+; 64BIT-NEXT: stfd 2, 8(3)
+; 64BIT-NEXT: stfd 1, 0(3)
+; 64BIT-NEXT: stfd 4, 24(3)
+; 64BIT-NEXT: stfd 3, 16(3)
+; 64BIT-NEXT: bl .anchor[PR]
+; 64BIT-NEXT: nop
+; 64BIT-NEXT: addi 1, 1, 112
+; 64BIT-NEXT: ld 0, 16(1)
+; 64BIT-NEXT: mtlr 0
+; 64BIT-NEXT: blr
entry:
%call = call { ppc_fp128, ppc_fp128 } @fp128CmplxRetCallee()
%0 = extractvalue { ppc_fp128, ppc_fp128 } %call, 0
@@ -112,14 +271,5 @@ entry:
call void @anchor()
ret void
}
-
-; CHECK-LABEL: .fp128CmplxRetCaller:
-
-; CHECK: bl .fp128CmplxRetCallee
-; 32BIT-NEXT: lwz [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
-; 64BIT-NEXT: ld [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
-; CHECK-DAG: stfd 1, 0([[REG]])
-; CHECK-DAG: stfd 2, 8([[REG]])
-; CHECK-DAG: stfd 3, 16([[REG]])
-; CHECK-DAG: stfd 4, 24([[REG]])
-; CHECK-NEXT: bl .anchor
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
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