[llvm] [VPlan] Strip scalar/first-lane guard in removeRedundantCanIVs (PR #194338)

Ramkumar Ramachandra via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 28 02:30:30 PDT 2026


artagnon wrote:

> > The guard is unnecessary, and stripping it leads to optimization benefit.
> 
> But it can also lead to regressions, as the transformation increase register pressure (one more vector register live across the loop, so in same cases it will cause extra spills which will likely be worse than an additional broadcast , e.g. in `llvm/test/Transforms/LoopVectorize/X86/widen-canonical-iv-register-pressure.ll`?
> 
> On some platforms, the broadcast may also be fold-able in to vector adds and effectively free (e.g. on RISCV https://llvm.godbolt.org/z/TfPqhTeq9)
> 
> Hence the motivation to make this driven by cost/register pressure checks.

Ah, I see. Thanks for the explanation -- let's continue reviewing the other patch then.

https://github.com/llvm/llvm-project/pull/194338


More information about the llvm-commits mailing list