[llvm] [MIR] Introduce split-from VRM state and lr-split instr flag (PR #194494)

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Mon Apr 27 16:47:46 PDT 2026


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git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/include/llvm/CodeGen/MIRPrinter.h llvm/include/llvm/CodeGen/MIRYamlMapping.h llvm/include/llvm/CodeGen/MachineFunction.h llvm/lib/CodeGen/MIRParser/MILexer.cpp llvm/lib/CodeGen/MIRParser/MILexer.h llvm/lib/CodeGen/MIRParser/MIParser.cpp llvm/lib/CodeGen/MIRParser/MIRParser.cpp llvm/lib/CodeGen/MIRPrinter.cpp llvm/lib/CodeGen/MIRPrintingPass.cpp llvm/lib/CodeGen/MachineInstr.cpp llvm/lib/CodeGen/VirtRegMap.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/include/llvm/CodeGen/MIRYamlMapping.h b/llvm/include/llvm/CodeGen/MIRYamlMapping.h
index 777e20899..2485d2db4 100644
--- a/llvm/include/llvm/CodeGen/MIRYamlMapping.h
+++ b/llvm/include/llvm/CodeGen/MIRYamlMapping.h
@@ -215,8 +215,7 @@ struct VirtualRegisterDefinition {
   bool operator==(const VirtualRegisterDefinition &Other) const {
     return ID == Other.ID && Class == Other.Class &&
            PreferredRegister == Other.PreferredRegister &&
-           SplitFrom == Other.SplitFrom &&
-           AssignedPhys == Other.AssignedPhys;
+           SplitFrom == Other.SplitFrom && AssignedPhys == Other.AssignedPhys;
   }
 };
 
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
index c638d9669..e315700c4 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -139,8 +139,8 @@ struct LLVM_ABI MachineFunctionInfo {
   // for the experimental scope (transient parser state).
   struct PendingVRegMapping {
     Register VReg;
-    Register SplitFrom;       // empty if absent
-    MCRegister AssignedPhys;  // empty if absent
+    Register SplitFrom;      // empty if absent
+    MCRegister AssignedPhys; // empty if absent
   };
   SmallVector<PendingVRegMapping, 0> PendingVRegMappings;
 };
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index fb3452bec..001d2541d 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -821,10 +821,9 @@ bool MIRParserImpl::parseRegisterInfo(PerFunctionMIParsingState &PFS,
 
     auto *MFI = MF.getInfo<MachineFunctionInfo>();
     if (!MFI)
-      return error(VReg.SplitFrom.Value.empty() ? VReg.AssignedPhys.SourceRange
-                                                       .Start
-                                                : VReg.SplitFrom.SourceRange
-                                                       .Start,
+      return error(VReg.SplitFrom.Value.empty()
+                       ? VReg.AssignedPhys.SourceRange.Start
+                       : VReg.SplitFrom.SourceRange.Start,
                    "'split-from' / 'assigned-phys' require the target to "
                    "implement TargetMachine::createMachineFunctionInfo");
 
@@ -852,9 +851,10 @@ bool MIRParserImpl::parseRegisterInfo(PerFunctionMIParsingState &PFS,
       if (parseRegisterReference(PFS, Phys, VReg.AssignedPhys.Value, Error))
         return error(Error, VReg.AssignedPhys.SourceRange);
       if (!Phys.isPhysical())
-        return error(VReg.AssignedPhys.SourceRange.Start,
-                     Twine("'assigned-phys' must be a physical register, got '") +
-                         VReg.AssignedPhys.Value + "'");
+        return error(
+            VReg.AssignedPhys.SourceRange.Start,
+            Twine("'assigned-phys' must be a physical register, got '") +
+                VReg.AssignedPhys.Value + "'");
       Pending.AssignedPhys = Phys.asMCReg();
     }
     MFI->PendingVRegMappings.push_back(Pending);
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index ae3dab092..7b61a7da0 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -149,8 +149,7 @@ static void printMBB(raw_ostream &OS, MFPrintState &State,
                      const MachineBasicBlock &MBB);
 static void convertMRI(yaml::MachineFunction &YamlMF, const MachineFunction &MF,
                        const MachineRegisterInfo &RegInfo,
-                       const TargetRegisterInfo *TRI,
-                       const VirtRegMap *VRM);
+                       const TargetRegisterInfo *TRI, const VirtRegMap *VRM);
 static void convertMCP(yaml::MachineFunction &MF,
                        const MachineConstantPool &ConstantPool);
 static void convertMJTI(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
@@ -181,8 +180,8 @@ static void convertCalledGlobals(yaml::MachineFunction &YMF,
 static void convertPrefetchTargets(yaml::MachineFunction &YMF,
                                    const MachineFunction &MF);
 
-static void printMF(raw_ostream &OS, MFGetterFnT Fn,
-                    const MachineFunction &MF, const VirtRegMap *VRM) {
+static void printMF(raw_ostream &OS, MFGetterFnT Fn, const MachineFunction &MF,
+                    const VirtRegMap *VRM) {
   MFPrintState State(std::move(Fn), MF);
 
   State.RegisterMaskIds = initRegisterMaskIds(MF);
@@ -314,8 +313,7 @@ static void printRegFlags(Register Reg,
 
 static void convertMRI(yaml::MachineFunction &YamlMF, const MachineFunction &MF,
                        const MachineRegisterInfo &RegInfo,
-                       const TargetRegisterInfo *TRI,
-                       const VirtRegMap *VRM) {
+                       const TargetRegisterInfo *TRI, const VirtRegMap *VRM) {
   YamlMF.TracksRegLiveness = RegInfo.tracksLiveness();
 
   // Print the virtual register definitions.

``````````

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https://github.com/llvm/llvm-project/pull/194494


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