[llvm] AMDGPU: Fix instruction size for madmk/madak (PR #194361)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 27 05:40:59 PDT 2026
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/194361
This caused the revert of #191461
>From 07292111626470dbae2f0705443c27e7ddb65ae2 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Mon, 27 Apr 2026 11:05:13 +0100
Subject: [PATCH] AMDGPU: Fix instruction size for madmk/madak
This caused the revert of #191461
---
llvm/lib/Target/AMDGPU/VOP2Instructions.td | 8 ++---
.../AMDGPU/madmk-madak-encoding-size.ll | 34 +++++++++++++++++++
2 files changed, 38 insertions(+), 4 deletions(-)
create mode 100644 llvm/test/CodeGen/AMDGPU/madmk-madak-encoding-size.ll
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index deb531ae180d2..d02af2addab16 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -865,7 +865,7 @@ defm V_CNDMASK_B16_t16 : VOP2eInst <"v_cndmask_b16_t16", VOP2e_I16_I16_I16_I1_tr
let SubtargetPredicate = isGFX11Plus, True16Predicate = UseFakeTrue16Insts in
defm V_CNDMASK_B16_fake16 : VOP2eInst <"v_cndmask_b16_fake16", VOP2e_I16_I16_I16_I1_fake16>;
defm V_CNDMASK_B32 : VOP2eInst_VOPD <"v_cndmask_b32", VOP2e_I32_I32_I32_I1, 0x9, "v_cndmask_b32">;
-let SubtargetPredicate = HasMadMacF32Insts, isReMaterializable = 1 in
+let SubtargetPredicate = HasMadMacF32Insts, isReMaterializable = 1, FixedSize = 1 in
def V_MADMK_F32 : VOP2_Pseudo <"v_madmk_f32", VOP_MADMK_F32, []>;
let isCommutable = 1 in {
@@ -904,7 +904,7 @@ defm V_MAC_LEGACY_F32 : VOP2Inst <"v_mac_legacy_f32", VOP_MAC_LEGACY_F32>;
} // End Constraints = "$vdst = $src2",
// isConvertibleToThreeAddress = 1
-let isReMaterializable = 1 in
+let isReMaterializable = 1, FixedSize = 1 in
def V_MADAK_F32 : VOP2_Pseudo <"v_madak_f32", VOP_MADAK_F32, []>;
} // End OtherPredicates = [HasMadMacF32Insts]
} // End mayRaiseFPException = 0
@@ -1202,11 +1202,11 @@ let True16Predicate = UseFakeTrue16Insts in {
let SubtargetPredicate = Has16BitInsts in {
let isReMaterializable = 1 in {
-let FPDPRounding = 1 in {
+let FPDPRounding = 1, FixedSize = 1 in {
def V_MADMK_F16 : VOP2_Pseudo <"v_madmk_f16", VOP_MADMK_F16, [], "">;
} // End FPDPRounding = 1
let isCommutable = 1 in {
-let mayRaiseFPException = 0 in {
+let mayRaiseFPException = 0, FixedSize = 1 in {
def V_MADAK_F16 : VOP2_Pseudo <"v_madak_f16", VOP_MADAK_F16, [], "">;
}
let SubtargetPredicate = isGFX8GFX9 in {
diff --git a/llvm/test/CodeGen/AMDGPU/madmk-madak-encoding-size.ll b/llvm/test/CodeGen/AMDGPU/madmk-madak-encoding-size.ll
new file mode 100644
index 0000000000000..620afd2df4d1b
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/madmk-madak-encoding-size.ll
@@ -0,0 +1,34 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -filetype=obj < %s | llvm-objdump --triple=amdgcn-amd-amdhsa --mcpu=gfx803 --disassemble - | FileCheck %s
+
+; Make sure computed instruction sizes for madak/madmk are correct and
+; pass the instruction size verifier.
+
+; CHECK: v_madak_f32 v0, v0, v1, 0x41200000 // 000000000004: 30000300 41200000
+define float @v_madak_f32(float %a, float %b) #0 {
+ %mul = fmul float %a, %b
+ %madmk = fadd float %mul, 10.0
+ ret float %madmk
+}
+
+; CHECK: v_madmk_f32 v0, v0, 0x41200000, v1 // 000000000044: 2E000300 41200000
+define float @v_madmk_f32(float %a, float %b) #0 {
+ %mul = fmul float %a, 10.0
+ %madmk = fadd float %mul, %b
+ ret float %madmk
+}
+
+; CHECK: v_madak_f16 v0, v0, v1, 0x4900 // 000000000084: 4A000300 00004900
+define half @v_madak_f16(half %a, half %b) #0 {
+ %mul = fmul half %a, %b
+ %madmk = fadd half %mul, 10.0
+ ret half %madmk
+}
+
+; CHECK: v_madmk_f16 v0, v0, 0x4900, v1 // 0000000000C4: 48000300 00004900
+define half @v_madmk_f16(half %a, half %b) #0 {
+ %mul = fmul half %a, 10.0
+ %madmk = fadd half %mul, %b
+ ret half %madmk
+}
+
+attributes #0 = { nounwind denormal_fpenv(preservesign) }
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