[llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)
Steffen Larsen via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 27 03:44:22 PDT 2026
https://github.com/steffenlarsen updated https://github.com/llvm/llvm-project/pull/193270
>From 7f09750e4ae91156ab29f5405ba19bf2a0ee7c53 Mon Sep 17 00:00:00 2001
From: Steffen Holst Larsen <sholstla at amd.com>
Date: Wed, 15 Apr 2026 05:13:39 -0500
Subject: [PATCH 1/4] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies
This commit adds a new pass, SIMergeVGPRCopies, which merges
consecutive, even-aligned 32-bit VGPR copies into 64-bit copies (either
v_pk_mov_b32 or v_mov_b64_e32) when possible.
h3. Examples of cases where merging is possible
Perfectly aligned copies:
```
v_mov_b32 v0, v2
v_mov_b32 v1, v3
=>
{ v_mov_b64_e32 v[0,1], v[2,3]
| v_pk_mov_b32 v[0,1], v[2,3], v[2,3] op_sel:[0,1] }
```
Perfectly aligned copies in reverse order:
```
v_mov_b32 v1, v3
v_mov_b32 v0, v2
=>
{ v_mov_b64_e32 v[0,1], v[2,3]
| v_pk_mov_b32 v[0,1], v[2,3], v[2,3] op_sel:[0,1] }
```
Copies with inversed source pairs (requires v_pk_mov_b32):
```
v_mov_b32 v0, v3
v_mov_b32 v1, v2
=>
v_pk_mov_b32 v[0,1], v[2,3], v[2,3] op_sel:[1,0]
```
Perfectly aligned copies with SGPR operands (requires v_mov_b64_e32):
```
v_mov_b32 v1, s2
v_mov_b32 v0, s3
=>
v_mov_b64_e32 v[0,1], s[2,3]
```
h3. Examples of cases where merging is not possible
Unaligned destinations in copies:
```
v_mov_b32 v1, v4
v_mov_b32 v2, v5
```
Unaligned sources in copies:
```
v_mov_b32 v0, v3
v_mov_b32 v1, v4
```
Copies with inversed SGPR source pairs:
```
v_mov_b32 v0, s3
v_mov_b32 v1, s2
```
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
---
llvm/lib/Target/AMDGPU/AMDGPU.h | 3 +
llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def | 1 +
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 10 +-
llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 +
llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp | 197 +
llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.h | 22 +
llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll | 9 +-
.../AMDGPU/GlobalISel/strict_fma.f16.ll | 3 +-
.../AMDGPU/GlobalISel/strict_fma.f32.ll | 3 +-
.../test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll | 90 +-
.../AMDGPU/agpr-copy-no-free-registers.ll | 6 +-
...tor-flatscratchinit-undefined-behavior2.ll | 6 +-
llvm/test/CodeGen/AMDGPU/bf16.ll | 60 +-
.../buffer-fat-pointer-atomicrmw-fadd.ll | 9 +-
.../buffer-fat-pointer-atomicrmw-fmax.ll | 6 +-
.../buffer-fat-pointer-atomicrmw-fmin.ll | 6 +-
llvm/test/CodeGen/AMDGPU/build_vector.ll | 3 +-
.../CodeGen/AMDGPU/combine-vload-extract.ll | 8 +-
llvm/test/CodeGen/AMDGPU/dagcombine-select.ll | 12 +-
.../CodeGen/AMDGPU/fix-crash-valu-hazard.ll | 3 +-
.../CodeGen/AMDGPU/flat-atomicrmw-fadd.ll | 6 +-
.../CodeGen/AMDGPU/flat-atomicrmw-fmax.ll | 18 +-
.../CodeGen/AMDGPU/flat-atomicrmw-fmin.ll | 18 +-
.../CodeGen/AMDGPU/flat-atomicrmw-fsub.ll | 6 +-
.../test/CodeGen/AMDGPU/flat-saddr-atomics.ll | 116 +-
llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll | 6 +-
.../CodeGen/AMDGPU/global-atomicrmw-fmax.ll | 3 +-
.../CodeGen/AMDGPU/global-atomicrmw-fmin.ll | 3 +-
.../CodeGen/AMDGPU/global-atomicrmw-fsub.ll | 18 +-
.../issue153808-extract-subvector-legalize.ll | 12 +-
llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll | 2 +
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 4 +
.../llvm.amdgcn.cvt.scalef32.pk.gfx950.ll | 216 +-
.../AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll | 432 +--
.../AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll | 192 +-
.../AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll | 12 +-
.../CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll | 114 +-
.../CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll | 174 +-
.../CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll | 160 +-
.../AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll | 240 +-
.../CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll | 1078 ++----
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll | 426 +--
....amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll | 219 +-
...m.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll | 3107 ++++++----------
.../AMDGPU/llvm.amdgcn.permlane16.swap.ll | 3 +-
.../AMDGPU/llvm.amdgcn.permlane32.swap.ll | 3 +-
.../AMDGPU/llvm.amdgcn.smfmac.gfx950.ll | 3228 ++++++-----------
llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll | 3 +-
llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll | 3 +-
llvm/test/CodeGen/AMDGPU/mad_64_32.ll | 3 +-
...-legalizer-single-wave-workgroup-memops.ll | 9 +-
llvm/test/CodeGen/AMDGPU/memset-pattern.ll | 6 +-
.../AMDGPU/mfma-no-register-aliasing.ll | 309 +-
llvm/test/CodeGen/AMDGPU/packed-fp32.ll | 36 +-
.../AMDGPU/preload-implicit-kernargs.ll | 3 +-
llvm/test/CodeGen/AMDGPU/preload-kernargs.ll | 45 +-
.../AMDGPU/ptradd-sdag-optimizations.ll | 24 +-
.../AMDGPU/rewrite-vgpr-mfma-to-agpr.ll | 45 +-
.../AMDGPU/shufflevector-physreg-copy.ll | 30 +-
.../AMDGPU/shufflevector.v2i64.v2i64.ll | 42 +-
.../AMDGPU/shufflevector.v2i64.v3i64.ll | 132 +-
.../AMDGPU/shufflevector.v2i64.v4i64.ll | 270 +-
.../AMDGPU/shufflevector.v2i64.v8i64.ll | 1302 +++----
.../CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll | 42 +-
.../CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll | 132 +-
.../CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll | 270 +-
.../AMDGPU/shufflevector.v3f32.v2f32.ll | 36 +-
.../AMDGPU/shufflevector.v3f32.v3f32.ll | 12 +-
.../AMDGPU/shufflevector.v3f32.v4f32.ll | 72 +-
.../AMDGPU/shufflevector.v3i32.v2i32.ll | 36 +-
.../AMDGPU/shufflevector.v3i32.v3i32.ll | 12 +-
.../AMDGPU/shufflevector.v3i32.v4i32.ll | 72 +-
.../AMDGPU/shufflevector.v3i64.v2i64.ll | 96 +-
.../AMDGPU/shufflevector.v3i64.v3i64.ll | 258 +-
.../AMDGPU/shufflevector.v3i64.v4i64.ll | 498 +--
.../CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll | 96 +-
.../CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll | 258 +-
.../CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll | 498 +--
.../CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll | 36 +-
.../CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll | 12 +-
.../CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll | 72 +-
.../AMDGPU/shufflevector.v4f32.v2f32.ll | 6 +-
.../AMDGPU/shufflevector.v4f32.v3f32.ll | 6 +-
.../AMDGPU/shufflevector.v4f32.v4f32.ll | 6 +-
.../AMDGPU/shufflevector.v4i32.v2i32.ll | 6 +-
.../AMDGPU/shufflevector.v4i32.v3i32.ll | 6 +-
.../AMDGPU/shufflevector.v4i32.v4i32.ll | 6 +-
.../AMDGPU/shufflevector.v4i64.v2i64.ll | 438 +--
.../AMDGPU/shufflevector.v4i64.v3i64.ll | 1062 ++----
.../AMDGPU/shufflevector.v4i64.v4i64.ll | 1950 ++++------
.../CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll | 438 +--
.../CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll | 1062 ++----
.../CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll | 1950 ++++------
.../CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll | 6 +-
.../CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll | 6 +-
.../CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll | 6 +-
llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll | 6 +-
llvm/test/CodeGen/AMDGPU/swdev373493.ll | 15 +-
llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll | 3 +-
.../CodeGen/AMDGPU/vector_shuffle.packed.ll | 627 ++--
.../test/CodeGen/AMDGPU/vni8-across-blocks.ll | 54 +-
101 files changed, 7961 insertions(+), 14742 deletions(-)
create mode 100644 llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
create mode 100644 llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.h
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 5c7259b7600a9..9763d798e5bf3 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -201,6 +201,9 @@ extern char &AMDGPUNextUseAnalysisLegacyID;
void initializeAMDGPUNextUseAnalysisPrinterLegacyPassPass(PassRegistry &);
extern char &AMDGPUNextUseAnalysisPrinterLegacyID;
+void initializeSIMergeVGPRCopiesLegacyPass(PassRegistry &);
+extern char &SIMergeVGPRCopiesID;
+
void initializeSILowerWWMCopiesLegacyPass(PassRegistry &);
extern char &SILowerWWMCopiesLegacyID;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
index 2a6560b309e62..e5ee4e4f59205 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
@@ -132,6 +132,7 @@ MACHINE_FUNCTION_PASS("gcn-dpp-combine", GCNDPPCombinePass())
MACHINE_FUNCTION_PASS("print<amdgpu-next-use-analysis>", AMDGPUNextUseAnalysisPrinterPass(errs()))
MACHINE_FUNCTION_PASS("si-fix-sgpr-copies", SIFixSGPRCopiesPass())
MACHINE_FUNCTION_PASS("si-fix-vgpr-copies", SIFixVGPRCopiesPass())
+MACHINE_FUNCTION_PASS("si-merge-vgpr-copies", SIMergeVGPRCopiesPass())
MACHINE_FUNCTION_PASS("si-fold-operands", SIFoldOperandsPass());
MACHINE_FUNCTION_PASS("si-form-memory-clauses", SIFormMemoryClausesPass())
MACHINE_FUNCTION_PASS("si-i1-copies", SILowerI1CopiesPass())
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index d7e2264e51fd6..ab843bcfaaf8c 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -59,6 +59,7 @@
#include "SILowerWWMCopies.h"
#include "SIMachineFunctionInfo.h"
#include "SIMachineScheduler.h"
+#include "SIMergeVGPRCopies.h"
#include "SIOptimizeExecMasking.h"
#include "SIOptimizeExecMaskingPreRA.h"
#include "SIOptimizeVGPRLiveRange.h"
@@ -673,6 +674,7 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
initializeSILowerSGPRSpillsLegacyPass(*PR);
initializeSIFixSGPRCopiesLegacyPass(*PR);
initializeSIFixVGPRCopiesLegacyPass(*PR);
+ initializeSIMergeVGPRCopiesLegacyPass(*PR);
initializeSIFoldOperandsLegacyPass(*PR);
initializeSIPeepholeSDWALegacyPass(*PR);
initializeSIShrinkInstructionsLegacyPass(*PR);
@@ -1884,8 +1886,10 @@ bool GCNPassConfig::addRegAssignAndRewriteOptimized() {
void GCNPassConfig::addPostRegAlloc() {
addPass(&SIFixVGPRCopiesID);
- if (getOptLevel() > CodeGenOptLevel::None)
+ if (getOptLevel() > CodeGenOptLevel::None) {
+ addPass(&SIMergeVGPRCopiesID);
addPass(&SIOptimizeExecMaskingLegacyID);
+ }
TargetPassConfig::addPostRegAlloc();
}
@@ -2586,8 +2590,10 @@ Error AMDGPUCodeGenPassBuilder::addRegAssignmentOptimized(
void AMDGPUCodeGenPassBuilder::addPostRegAlloc(PassManagerWrapper &PMW) const {
addMachineFunctionPass(SIFixVGPRCopiesPass(), PMW);
- if (TM.getOptLevel() > CodeGenOptLevel::None)
+ if (TM.getOptLevel() > CodeGenOptLevel::None) {
+ addMachineFunctionPass(SIMergeVGPRCopiesPass(), PMW);
addMachineFunctionPass(SIOptimizeExecMaskingPass(), PMW);
+ }
Base::addPostRegAlloc(PMW);
}
diff --git a/llvm/lib/Target/AMDGPU/CMakeLists.txt b/llvm/lib/Target/AMDGPU/CMakeLists.txt
index ae8f1c0fad5ba..f3af5d36d942d 100644
--- a/llvm/lib/Target/AMDGPU/CMakeLists.txt
+++ b/llvm/lib/Target/AMDGPU/CMakeLists.txt
@@ -160,6 +160,7 @@ add_llvm_target(AMDGPUCodeGen
SIAnnotateControlFlow.cpp
SIFixSGPRCopies.cpp
SIFixVGPRCopies.cpp
+ SIMergeVGPRCopies.cpp
SIFoldOperands.cpp
SIFormMemoryClauses.cpp
SIFrameLowering.cpp
diff --git a/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
new file mode 100644
index 0000000000000..1fb53fddeff2a
--- /dev/null
+++ b/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
@@ -0,0 +1,197 @@
+//===-- SIMergeVGPRCopies.cpp - Merge adjacent VGPR copies ----------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+/// \file
+/// Merge adjacent 32-bit copy-to-VGPR pairs into a single 64-bit copy
+/// (V_PK_MOV_B32 or V_MOV_B64).
+///
+/// Both sources and destinations must be consecutive and even-aligned, but the
+/// source and destination pairs can be in either order. The sources can be
+/// SGPRs if the target supports V_MOV_B64, but not if the merged copy needs to
+/// use V_PK_MOV_B32 (e.g. if the source pairs are inversed relative to the
+/// destinations).
+///
+/// This runs after register allocation, when all registers are physical and
+/// before ExpandPostRAPseudos lowers each copy individually.
+///
+//===----------------------------------------------------------------------===//
+
+#include "SIMergeVGPRCopies.h"
+#include "AMDGPU.h"
+#include "GCNSubtarget.h"
+#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "si-merge-vgpr-copies"
+
+namespace {
+
+class SIMergeVGPRCopiesLegacy : public MachineFunctionPass {
+public:
+ static char ID;
+
+ SIMergeVGPRCopiesLegacy() : MachineFunctionPass(ID) {}
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.setPreservesAll();
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+
+ bool runOnMachineFunction(MachineFunction &MF) override;
+
+ StringRef getPassName() const override { return "SI Merge VGPR copies"; }
+};
+
+class SIMergeVGPRCopies {
+public:
+ bool run(MachineFunction &MF);
+};
+
+} // End anonymous namespace.
+
+INITIALIZE_PASS(SIMergeVGPRCopiesLegacy, DEBUG_TYPE, "SI Merge VGPR copies",
+ false, false)
+
+char SIMergeVGPRCopiesLegacy::ID = 0;
+
+char &llvm::SIMergeVGPRCopiesID = SIMergeVGPRCopiesLegacy::ID;
+
+PreservedAnalyses SIMergeVGPRCopiesPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &) {
+ SIMergeVGPRCopies().run(MF);
+ return PreservedAnalyses::all();
+}
+
+bool SIMergeVGPRCopiesLegacy::runOnMachineFunction(MachineFunction &MF) {
+ return SIMergeVGPRCopies().run(MF);
+}
+
+static bool getBaseIfAlignedAndConsecutive(const Register &Reg1,
+ const Register &Reg2,
+ const SIRegisterInfo *TRI,
+ Register &Base) {
+ long Dist =
+ static_cast<long>(TRI->getHWRegIndex(Reg2)) - TRI->getHWRegIndex(Reg1);
+ if (std::abs(Dist) != 1)
+ return false;
+ Base = (Dist == 1) ? Reg1 : Reg2;
+ return TRI->getHWRegIndex(Base) % 2 == 0;
+}
+
+bool SIMergeVGPRCopies::run(MachineFunction &MF) {
+ const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
+ // Only merge when the target has a 64-bit move instruction. Skip targets
+ // with VOPD: GCNCreateVOPD runs later and can pair 32-bit moves with
+ // unrelated instructions, which is potentially better than v_mov_b64.
+ if ((!ST.hasPkMovB32() && !ST.hasMovB64()) || AMDGPU::hasVOPD(ST))
+ return false;
+
+ const SIRegisterInfo *TRI = ST.getRegisterInfo();
+ const SIInstrInfo *TII = ST.getInstrInfo();
+ const TargetRegisterClass *VGPR64RC = TRI->getVGPR64Class();
+ const TargetRegisterClass *SGPR64RC = &AMDGPU::SReg_64RegClass;
+ bool Changed = false;
+
+ for (MachineBasicBlock &MBB : MF) {
+ for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
+ MachineInstr &MI = *I;
+
+ I = next_nodbg(I, E);
+ if (I == E || I->getOpcode() != AMDGPU::COPY ||
+ MI.getOpcode() != AMDGPU::COPY)
+ continue;
+ MachineInstr &NextMI = *I;
+
+ {
+ // Both destinations must be VGPRs.
+ Register MIDstReg = MI.getOperand(0).getReg();
+ Register NextMIDstReg = NextMI.getOperand(0).getReg();
+ if (!AMDGPU::VGPR_32RegClass.contains(MIDstReg) ||
+ !AMDGPU::VGPR_32RegClass.contains(NextMIDstReg))
+ continue;
+ }
+
+ bool UsesSGPRSources = false;
+ {
+ // Sources may always be VGPRs, but can also be SGPRs if the target
+ // supports V_MOV_B64. Either way, the sources must be the same class.
+ Register MISrcReg = MI.getOperand(1).getReg();
+ Register NextMISrcReg = NextMI.getOperand(1).getReg();
+ UsesSGPRSources = ST.hasMovB64() &&
+ AMDGPU::SGPR_32RegClass.contains(MISrcReg) &&
+ AMDGPU::SGPR_32RegClass.contains(NextMISrcReg);
+ if (!UsesSGPRSources &&
+ !(AMDGPU::VGPR_32RegClass.contains(MISrcReg) &&
+ AMDGPU::VGPR_32RegClass.contains(NextMISrcReg)))
+ continue;
+ }
+
+ // Ensure the first copy is the one with the lower-numbered destination
+ // register. This simplifies checking for consecutive sources and ensures
+ // the merged copy reads the same registers as the original pair.
+ Register DstBase;
+ if (!getBaseIfAlignedAndConsecutive(MI.getOperand(0).getReg(),
+ NextMI.getOperand(0).getReg(), TRI,
+ DstBase))
+ continue;
+
+ Register SrcBase;
+ if (!getBaseIfAlignedAndConsecutive(MI.getOperand(1).getReg(),
+ NextMI.getOperand(1).getReg(), TRI,
+ SrcBase))
+ continue;
+
+ // The sources must also be consecutive and even-aligned, but they can be
+ // in either order. If they are inversed, the merged copy needs to use
+ // V_PK_MOV_B32 which in turn cannot use SGPR sources, otherwise it can
+ // use V_MOV_B64.
+ bool SrcIsInversed = (DstBase == NextMI.getOperand(0).getReg()) !=
+ (SrcBase == NextMI.getOperand(1).getReg());
+ if (SrcIsInversed && (UsesSGPRSources || !ST.hasPkMovB32()))
+ continue;
+
+ Register Dst64 =
+ TRI->getMatchingSuperReg(DstBase, AMDGPU::sub0, VGPR64RC);
+ Register Src64 = TRI->getMatchingSuperReg(
+ SrcBase, AMDGPU::sub0, UsesSGPRSources ? SGPR64RC : VGPR64RC);
+ if (!Dst64 || !Src64)
+ continue;
+
+ bool KillSrc = MI.getOperand(1).isKill() && NextMI.getOperand(1).isKill();
+ if (SrcIsInversed) {
+ BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(AMDGPU::V_PK_MOV_B32),
+ Dst64)
+ .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1)
+ .addReg(Src64)
+ .addImm(SISrcMods::OP_SEL_1)
+ .addReg(Src64)
+ .addImm(0) // op_sel_lo
+ .addImm(0) // op_sel_hi
+ .addImm(0) // neg_lo
+ .addImm(0) // neg_hi
+ .addImm(0) // clamp
+ .addReg(Src64, getKillRegState(KillSrc) | RegState::Implicit);
+ } else {
+ BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(AMDGPU::COPY), Dst64)
+ .addReg(Src64, getKillRegState(KillSrc))
+ .addReg(AMDGPU::EXEC, RegState::Implicit);
+ }
+
+ LLVM_DEBUG(dbgs() << "Merged VGPR32 copy pair into 64-bit copy from "
+ << MI << " and " << NextMI << '\n');
+ I = next_nodbg(I, E); // Advance past NextMI before erasing it.
+ MI.eraseFromParent();
+ NextMI.eraseFromParent();
+ Changed = true;
+ }
+ }
+
+ return Changed;
+}
diff --git a/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.h b/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.h
new file mode 100644
index 0000000000000..d5b6e4ea58c5a
--- /dev/null
+++ b/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.h
@@ -0,0 +1,22 @@
+//===- SIMergeVGPRCopies.h --------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_AMDGPU_SIMERGEVGPRCOPIES_H
+#define LLVM_LIB_TARGET_AMDGPU_SIMERGEVGPRCOPIES_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+class SIMergeVGPRCopiesPass : public PassInfoMixin<SIMergeVGPRCopiesPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+} // namespace llvm
+
+#endif // LLVM_LIB_TARGET_AMDGPU_SIMERGEVGPRCOPIES_H
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
index 24f3e0c85c519..cdaf82cafae94 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
@@ -848,8 +848,7 @@ define double @v_fma_f64(double %x, double %y, double %z) {
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: v_fmac_f64_e32 v[4:5], v[0:1], v[2:3]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f64:
@@ -957,10 +956,8 @@ define <2 x double> @v_fma_v2f64(<2 x double> %x, <2 x double> %y, <2 x double>
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: v_fmac_f64_e32 v[8:9], v[0:1], v[4:5]
; GFX90A-NEXT: v_fmac_f64_e32 v[10:11], v[2:3], v[6:7]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v8
-; GFX90A-NEXT: v_mov_b32_e32 v1, v9
-; GFX90A-NEXT: v_mov_b32_e32 v2, v10
-; GFX90A-NEXT: v_mov_b32_e32 v3, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v2f64:
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
index 92d87a0d74efb..f492c3e3ee8ae 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
@@ -499,8 +499,7 @@ define void @v_constained_fma_f16_fpexcept_strict_fneg_uni(half inreg %x, half i
; GFX942-LABEL: v_constained_fma_f16_fpexcept_strict_fneg_uni:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v2, s0
-; GFX942-NEXT: v_mov_b32_e32 v3, s1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
; GFX942-NEXT: v_fma_f16 v2, v2, v3, -s2
; GFX942-NEXT: global_store_short v[0:1], v2, off
; GFX942-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
index 07865f5b4f3c9..3ecf77398d9c6 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
@@ -566,8 +566,7 @@ define void @v_constained_fma_f32_fpexcept_strict_fneg_uni(float inreg %x, float
; GFX942-LABEL: v_constained_fma_f32_fpexcept_strict_fneg_uni:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v2, s0
-; GFX942-NEXT: v_mov_b32_e32 v3, s1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
; GFX942-NEXT: v_fma_f32 v2, v2, v3, -s2
; GFX942-NEXT: global_store_dword v[0:1], v2, off
; GFX942-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll b/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
index 3dac24ed89fa0..61835f42ea3cc 100644
--- a/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
+++ b/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
@@ -13137,8 +13137,7 @@ define void @flat_atomic_xchg_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_xchg_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13177,8 +13176,7 @@ define void @flat_atomic_xchg_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_xchg_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13216,8 +13214,7 @@ define void @flat_atomic_add_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_add_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13256,8 +13253,7 @@ define void @flat_atomic_add_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_add_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13295,8 +13291,7 @@ define void @flat_atomic_sub_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_sub_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13335,8 +13330,7 @@ define void @flat_atomic_sub_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_sub_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13374,8 +13368,7 @@ define void @flat_atomic_and_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_and_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13414,8 +13407,7 @@ define void @flat_atomic_and_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_and_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13587,8 +13579,7 @@ define void @flat_atomic_or_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_or_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13627,8 +13618,7 @@ define void @flat_atomic_or_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_or_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13666,8 +13656,7 @@ define void @flat_atomic_xor_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_xor_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13706,8 +13695,7 @@ define void @flat_atomic_xor_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_xor_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13745,8 +13733,7 @@ define void @flat_atomic_max_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_max_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13785,8 +13772,7 @@ define void @flat_atomic_max_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_max_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13824,8 +13810,7 @@ define void @flat_atomic_min_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_min_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13864,8 +13849,7 @@ define void @flat_atomic_min_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_min_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13903,8 +13887,7 @@ define void @flat_atomic_umax_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_umax_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -13943,8 +13926,7 @@ define void @flat_atomic_umax_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_umax_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -13982,8 +13964,7 @@ define void @flat_atomic_umin_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_umin_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -14022,8 +14003,7 @@ define void @flat_atomic_umin_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_umin_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -14061,8 +14041,7 @@ define void @flat_atomic_uinc_wrap_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_uinc_wrap_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -14101,8 +14080,7 @@ define void @flat_atomic_uinc_wrap_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_uinc_wrap_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -14140,8 +14118,7 @@ define void @flat_atomic_udec_wrap_i32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_udec_wrap_i32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -14180,8 +14157,7 @@ define void @flat_atomic_udec_wrap_i32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_udec_wrap_i32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -17499,8 +17475,7 @@ define void @flat_atomic_fadd_f32_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_fadd_f32_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -17577,8 +17552,7 @@ define void @flat_atomic_fadd_f32_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_fadd_f32_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -19675,8 +19649,7 @@ define void @flat_atomic_fadd_v2f16_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_fadd_v2f16_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -19728,8 +19701,7 @@ define void @flat_atomic_fadd_v2f16_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_fadd_v2f16_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
@@ -20510,8 +20482,7 @@ define void @flat_atomic_fadd_v2bf16_saddr_ret_a_a(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_fadd_v2bf16_saddr_ret_a_a:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def a0
; GFX950-NEXT: ;;#ASMEND
@@ -20581,8 +20552,7 @@ define void @flat_atomic_fadd_v2bf16_saddr_ret_av_av(ptr inreg %ptr) #0 {
; GFX950-LABEL: flat_atomic_fadd_v2bf16_saddr_ret_av_av:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: ;;#ASMSTART
; GFX950-NEXT: ; def v2
; GFX950-NEXT: ;;#ASMEND
diff --git a/llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll b/llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
index 4c10e4d459849..12089cd60fb47 100644
--- a/llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
+++ b/llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
@@ -157,8 +157,7 @@ define void @no_free_vgprs_at_agpr_to_agpr_copy(float %v0, float %v1) #0 {
; GFX90A-LABEL: no_free_vgprs_at_agpr_to_agpr_copy:
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v33, v0
-; GFX90A-NEXT: v_mov_b32_e32 v32, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[32:33], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:31] a[0:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -1054,8 +1053,7 @@ define void @no_free_vgprs_at_sgpr_to_agpr_copy(float %v0, float %v1) #0 {
; GFX90A-LABEL: no_free_vgprs_at_sgpr_to_agpr_copy:
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v33, v0
-; GFX90A-NEXT: v_mov_b32_e32 v32, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[32:33], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:31] s[0:15]
; GFX90A-NEXT: ;;#ASMEND
diff --git a/llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll b/llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
index 554f40b5bfdfa..6a4db04a7c844 100644
--- a/llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
+++ b/llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
@@ -171,8 +171,7 @@ define amdgpu_kernel void @with_private_to_flat_addrspacecast_cc_kernel(ptr addr
; GFX942-ARCH-FLAT-NEXT: s_cmp_lg_u32 s0, -1
; GFX942-ARCH-FLAT-NEXT: s_cselect_b32 s1, s1, 0
; GFX942-ARCH-FLAT-NEXT: s_cselect_b32 s0, s0, 0
-; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v0, s0
-; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v1, s1
+; GFX942-ARCH-FLAT-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX942-ARCH-FLAT-NEXT: flat_store_dword v[0:1], v2 sc0 sc1
; GFX942-ARCH-FLAT-NEXT: s_waitcnt vmcnt(0)
; GFX942-ARCH-FLAT-NEXT: s_endpgm
@@ -637,10 +636,9 @@ define amdgpu_kernel void @calls_intrin_ascast_cc_kernel(ptr addrspace(3) %ptr)
; GFX942-ARCH-FLAT: ; %bb.0:
; GFX942-ARCH-FLAT-NEXT: s_mov_b64 s[0:1], src_shared_base
; GFX942-ARCH-FLAT-NEXT: s_load_dword s0, s[4:5], 0x0
-; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v1, s1
; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v2, 7
; GFX942-ARCH-FLAT-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v0, s0
+; GFX942-ARCH-FLAT-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX942-ARCH-FLAT-NEXT: flat_store_dword v[0:1], v2 sc0 sc1
; GFX942-ARCH-FLAT-NEXT: s_waitcnt vmcnt(0)
; GFX942-ARCH-FLAT-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/bf16.ll b/llvm/test/CodeGen/AMDGPU/bf16.ll
index 8863244c1e91b..13a12dafd1d4b 100644
--- a/llvm/test/CodeGen/AMDGPU/bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/bf16.ll
@@ -461,10 +461,8 @@ define <16 x bfloat> @v_load_global_v16bf16(ptr addrspace(1) %ptr) {
; GFX950-NEXT: global_load_dwordx4 v[8:11], v[0:1], off
; GFX950-NEXT: global_load_dwordx4 v[4:7], v[0:1], off offset:16
; GFX950-NEXT: s_waitcnt vmcnt(1)
-; GFX950-NEXT: v_mov_b32_e32 v0, v8
-; GFX950-NEXT: v_mov_b32_e32 v1, v9
-; GFX950-NEXT: v_mov_b32_e32 v2, v10
-; GFX950-NEXT: v_mov_b32_e32 v3, v11
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
; GFX950-NEXT: s_waitcnt vmcnt(0)
; GFX950-NEXT: s_setpc_b64 s[30:31]
;
@@ -574,10 +572,8 @@ define <32 x bfloat> @v_load_global_v32bf16(ptr addrspace(1) %ptr) {
; GFX950-NEXT: global_load_dwordx4 v[8:11], v[0:1], off offset:32
; GFX950-NEXT: global_load_dwordx4 v[12:15], v[0:1], off offset:48
; GFX950-NEXT: s_waitcnt vmcnt(3)
-; GFX950-NEXT: v_mov_b32_e32 v0, v16
-; GFX950-NEXT: v_mov_b32_e32 v1, v17
-; GFX950-NEXT: v_mov_b32_e32 v2, v18
-; GFX950-NEXT: v_mov_b32_e32 v3, v19
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
; GFX950-NEXT: s_waitcnt vmcnt(0)
; GFX950-NEXT: s_setpc_b64 s[30:31]
;
@@ -725,10 +721,8 @@ define <64 x bfloat> @v_load_global_v64bf16(ptr addrspace(1) %ptr) {
; GFX950-NEXT: global_load_dwordx4 v[24:27], v[0:1], off offset:96
; GFX950-NEXT: global_load_dwordx4 v[28:31], v[0:1], off offset:112
; GFX950-NEXT: s_waitcnt vmcnt(7)
-; GFX950-NEXT: v_mov_b32_e32 v0, v32
-; GFX950-NEXT: v_mov_b32_e32 v1, v33
-; GFX950-NEXT: v_mov_b32_e32 v2, v34
-; GFX950-NEXT: v_mov_b32_e32 v3, v35
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], v[32:33]
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], v[34:35]
; GFX950-NEXT: s_waitcnt vmcnt(0)
; GFX950-NEXT: s_setpc_b64 s[30:31]
;
@@ -33756,20 +33750,34 @@ define <4 x i32> @v_fptosi_v4bf16_to_v4i32(<4 x bfloat> %x) {
; GFX8-NEXT: v_mov_b32_e32 v1, v5
; GFX8-NEXT: s_setpc_b64 s[30:31]
;
-; GFX9-LABEL: v_fptosi_v4bf16_to_v4i32:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v0
-; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX9-NEXT: v_cvt_i32_f32_e32 v5, v0
-; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v1
-; GFX9-NEXT: v_cvt_i32_f32_e32 v4, v2
-; GFX9-NEXT: v_cvt_i32_f32_e32 v2, v0
-; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v1
-; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v0
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GFX900-LABEL: v_fptosi_v4bf16_to_v4i32:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; GFX900-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; GFX900-NEXT: v_cvt_i32_f32_e32 v5, v0
+; GFX900-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX900-NEXT: v_cvt_i32_f32_e32 v4, v2
+; GFX900-NEXT: v_cvt_i32_f32_e32 v2, v0
+; GFX900-NEXT: v_and_b32_e32 v0, 0xffff0000, v1
+; GFX900-NEXT: v_cvt_i32_f32_e32 v3, v0
+; GFX900-NEXT: v_mov_b32_e32 v0, v4
+; GFX900-NEXT: v_mov_b32_e32 v1, v5
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_fptosi_v4bf16_to_v4i32:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_lshlrev_b32_e32 v2, 16, v0
+; GFX950-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; GFX950-NEXT: v_cvt_i32_f32_e32 v5, v0
+; GFX950-NEXT: v_lshlrev_b32_e32 v0, 16, v1
+; GFX950-NEXT: v_cvt_i32_f32_e32 v4, v2
+; GFX950-NEXT: v_cvt_i32_f32_e32 v2, v0
+; GFX950-NEXT: v_and_b32_e32 v0, 0xffff0000, v1
+; GFX950-NEXT: v_cvt_i32_f32_e32 v3, v0
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fptosi_v4bf16_to_v4i32:
; GFX10: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
index b5844049fd287..2229b230e066e 100644
--- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
@@ -2399,8 +2399,7 @@ define double @buffer_fat_ptr_agent_atomic_fadd_ret_f64__offset__waterfall__amdg
; GFX942-NEXT: ; %bb.2:
; GFX942-NEXT: s_mov_b64 exec, s[2:3]
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v6
-; GFX942-NEXT: v_mov_b32_e32 v1, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[6:7]
; GFX942-NEXT: buffer_inv sc1
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
@@ -2560,8 +2559,7 @@ define double @buffer_fat_ptr_agent_atomic_fadd_ret_f64__offset__waterfall__amdg
; GFX90A-NEXT: ; %bb.2:
; GFX90A-NEXT: s_mov_b64 exec, s[6:7]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v0, v6
-; GFX90A-NEXT: v_mov_b32_e32 v1, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: buffer_wbinvl1
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
@@ -2929,10 +2927,9 @@ define double @buffer_fat_ptr_agent_atomic_fadd_ret_f64__offset__amdgpu_no_remot
; GFX90A-LABEL: buffer_fat_ptr_agent_atomic_fadd_ret_f64__offset__amdgpu_no_remote_memory:
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: v_mov_b32_e32 v0, s20
; GFX90A-NEXT: buffer_load_dwordx2 v[8:9], v0, s[16:19], 0 offen offset:2048
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: v_mov_b32_e32 v10, s20
; GFX90A-NEXT: .LBB11_1: ; %atomicrmw.start
diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
index 3d85bf7019426..64c878fb6673b 100644
--- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
@@ -1631,8 +1631,7 @@ define double @buffer_fat_ptr_agent_atomic_fmax_ret_f64__offset__waterfall__amdg
; GFX942-NEXT: ; %bb.2:
; GFX942-NEXT: s_mov_b64 exec, s[2:3]
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v6
-; GFX942-NEXT: v_mov_b32_e32 v1, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[6:7]
; GFX942-NEXT: buffer_inv sc1
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
@@ -1758,8 +1757,7 @@ define double @buffer_fat_ptr_agent_atomic_fmax_ret_f64__offset__waterfall__amdg
; GFX90A-NEXT: ; %bb.2:
; GFX90A-NEXT: s_mov_b64 exec, s[6:7]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v0, v6
-; GFX90A-NEXT: v_mov_b32_e32 v1, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: buffer_wbinvl1
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
index 3f15d35320573..49b0c495caa0e 100644
--- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
@@ -1631,8 +1631,7 @@ define double @buffer_fat_ptr_agent_atomic_fmin_ret_f64__offset__waterfall__amdg
; GFX942-NEXT: ; %bb.2:
; GFX942-NEXT: s_mov_b64 exec, s[2:3]
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v6
-; GFX942-NEXT: v_mov_b32_e32 v1, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[6:7]
; GFX942-NEXT: buffer_inv sc1
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
@@ -1758,8 +1757,7 @@ define double @buffer_fat_ptr_agent_atomic_fmin_ret_f64__offset__waterfall__amdg
; GFX90A-NEXT: ; %bb.2:
; GFX90A-NEXT: s_mov_b64 exec, s[6:7]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v0, v6
-; GFX90A-NEXT: v_mov_b32_e32 v1, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: buffer_wbinvl1
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/build_vector.ll b/llvm/test/CodeGen/AMDGPU/build_vector.ll
index 37f4094806637..cd5fec45f4cfb 100644
--- a/llvm/test/CodeGen/AMDGPU/build_vector.ll
+++ b/llvm/test/CodeGen/AMDGPU/build_vector.ll
@@ -312,8 +312,7 @@ define amdgpu_kernel void @build_v2i32_from_v4i16_shuffle(ptr addrspace(1) %out,
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-NEXT: s_lshl_b32 s3, s3, 16
; GFX942-NEXT: s_lshl_b32 s2, s2, 16
-; GFX942-NEXT: v_mov_b32_e32 v2, s2
-; GFX942-NEXT: v_mov_b32_e32 v3, s3
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-NEXT: global_store_dwordx2 v0, v[2:3], s[0:1]
; GFX942-NEXT: s_endpgm
entry:
diff --git a/llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll b/llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
index 211174af632ee..249644ab3c253 100644
--- a/llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
+++ b/llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
@@ -127,10 +127,8 @@ define i64 @load_2xi32_noncombine(ptr addrspace(1) %p) #0 {
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: global_load_dword v2, v[0:1], off
; GCN-NEXT: global_load_dword v3, v[0:1], off offset:8
-; GCN-NEXT: s_waitcnt vmcnt(1)
-; GCN-NEXT: v_mov_b32_e32 v0, v2
; GCN-NEXT: s_waitcnt vmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v1, v3
+; GCN-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GCN-NEXT: s_setpc_b64 s[30:31]
%gep.p = getelementptr i32, ptr addrspace(1) %p, i32 2
%p.0 = load i32, ptr addrspace(1) %p, align 4
@@ -207,10 +205,8 @@ define i64 @load_3xi16_combine(ptr addrspace(1) %p) #0 {
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: global_load_dword v2, v[0:1], off
; GCN-NEXT: global_load_ushort v3, v[0:1], off offset:4
-; GCN-NEXT: s_waitcnt vmcnt(1)
-; GCN-NEXT: v_mov_b32_e32 v0, v2
; GCN-NEXT: s_waitcnt vmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v1, v3
+; GCN-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GCN-NEXT: s_setpc_b64 s[30:31]
%gep.p = getelementptr i16, ptr addrspace(1) %p, i32 1
%gep.2p = getelementptr i16, ptr addrspace(1) %p, i32 2
diff --git a/llvm/test/CodeGen/AMDGPU/dagcombine-select.ll b/llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
index 29a8ec57e3951..5815903474d1f 100644
--- a/llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
+++ b/llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
@@ -88,10 +88,8 @@ define amdgpu_kernel void @select_and_v4(ptr addrspace(1) %p, i32 %x, <4 x i32>
; GFX942-NEXT: s_cselect_b32 s2, s2, 0
; GFX942-NEXT: s_cselect_b32 s1, s1, 0
; GFX942-NEXT: s_cselect_b32 s0, s0, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, s0
-; GFX942-NEXT: v_mov_b32_e32 v3, s1
-; GFX942-NEXT: v_mov_b32_e32 v4, s2
-; GFX942-NEXT: v_mov_b32_e32 v5, s3
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[6:7]
; GFX942-NEXT: s_endpgm
%c = icmp slt i32 %x, 11
@@ -187,10 +185,8 @@ define amdgpu_kernel void @select_or_v4(ptr addrspace(1) %p, i32 %x, <4 x i32> %
; GFX942-NEXT: s_cselect_b32 s2, s2, -1
; GFX942-NEXT: s_cselect_b32 s1, s1, -1
; GFX942-NEXT: s_cselect_b32 s0, s0, -1
-; GFX942-NEXT: v_mov_b32_e32 v2, s0
-; GFX942-NEXT: v_mov_b32_e32 v3, s1
-; GFX942-NEXT: v_mov_b32_e32 v4, s2
-; GFX942-NEXT: v_mov_b32_e32 v5, s3
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[6:7]
; GFX942-NEXT: s_endpgm
%c = icmp slt i32 %x, 11
diff --git a/llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll b/llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
index a526b1ec16502..92ae2c338d5c1 100644
--- a/llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
+++ b/llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
@@ -21,8 +21,7 @@ define amdgpu_ps void @global_load_lds_dword_saddr(ptr addrspace(1) inreg nocapt
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-NEXT: s_mul_i32 s3, s3, 10
; GFX942-NEXT: s_mul_i32 s2, s2, 10
-; GFX942-NEXT: v_mov_b32_e32 v2, s2
-; GFX942-NEXT: v_mov_b32_e32 v3, s3
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-NEXT: global_store_dwordx2 v1, v[2:3], s[0:1]
; GFX942-NEXT: s_endpgm
;
diff --git a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
index f01879d98da41..f61af690eef73 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
@@ -5764,9 +5764,8 @@ define double @flat_agent_atomic_fadd_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX942-LABEL: flat_agent_atomic_fadd_ret_f64__amdgpu_no_fine_grained_memory:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: s_mov_b64 s[0:1], src_shared_base
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
; GFX942-NEXT: v_cmp_ne_u32_e32 vcc, s1, v5
; GFX942-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc
@@ -5922,9 +5921,8 @@ define double @flat_agent_atomic_fadd_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX90A-LABEL: flat_agent_atomic_fadd_ret_f64__amdgpu_no_fine_grained_memory:
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_mov_b64 s[4:5], src_shared_base
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
; GFX90A-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
; GFX90A-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX90A-NEXT: s_and_saveexec_b64 s[4:5], vcc
diff --git a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
index 6737e2ce3c72c..e15147a352825 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
@@ -2857,9 +2857,8 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX942-LABEL: flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: s_mov_b64 s[0:1], src_private_base
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
; GFX942-NEXT: v_cmp_ne_u32_e32 vcc, s1, v5
; GFX942-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc
@@ -2993,9 +2992,8 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX90A-LABEL: flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory:
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_mov_b64 s[4:5], src_private_base
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
; GFX90A-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
; GFX90A-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX90A-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -5269,9 +5267,8 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX942-LABEL: flat_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: s_mov_b64 s[0:1], src_private_base
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
; GFX942-NEXT: v_cmp_ne_u32_e32 vcc, s1, v5
; GFX942-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc
@@ -5457,8 +5454,7 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX90A-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen offset:4
; GFX90A-NEXT: .LBB24_6: ; %atomicrmw.phi
; GFX90A-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
@@ -5693,9 +5689,8 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX942-LABEL: flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: s_mov_b64 s[0:1], src_private_base
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
; GFX942-NEXT: v_cmp_ne_u32_e32 vcc, s1, v5
; GFX942-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc
@@ -5829,9 +5824,8 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX90A-LABEL: flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_mov_b64 s[4:5], src_private_base
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
; GFX90A-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
; GFX90A-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX90A-NEXT: s_and_saveexec_b64 s[4:5], vcc
diff --git a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
index 61dd7bedfaee1..ac153a7fdf44b 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
@@ -2857,9 +2857,8 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX942-LABEL: flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: s_mov_b64 s[0:1], src_private_base
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
; GFX942-NEXT: v_cmp_ne_u32_e32 vcc, s1, v5
; GFX942-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc
@@ -2993,9 +2992,8 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX90A-LABEL: flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory:
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_mov_b64 s[4:5], src_private_base
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
; GFX90A-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
; GFX90A-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX90A-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -5269,9 +5267,8 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX942-LABEL: flat_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: s_mov_b64 s[0:1], src_private_base
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
; GFX942-NEXT: v_cmp_ne_u32_e32 vcc, s1, v5
; GFX942-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc
@@ -5457,8 +5454,7 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX90A-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen offset:4
; GFX90A-NEXT: .LBB24_6: ; %atomicrmw.phi
; GFX90A-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
@@ -5693,9 +5689,8 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX942-LABEL: flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX942: ; %bb.0:
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: s_mov_b64 s[0:1], src_private_base
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
; GFX942-NEXT: v_cmp_ne_u32_e32 vcc, s1, v5
; GFX942-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc
@@ -5829,9 +5824,8 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX90A-LABEL: flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_mov_b64 s[4:5], src_private_base
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
; GFX90A-NEXT: v_cmp_ne_u32_e32 vcc, s5, v5
; GFX90A-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX90A-NEXT: s_and_saveexec_b64 s[4:5], vcc
diff --git a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
index 1924751427da0..22846afa596d8 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
@@ -3327,8 +3327,7 @@ define double @flat_agent_atomic_fsub_ret_f64(ptr %ptr, double %val) #0 {
; GFX942-NEXT: scratch_store_dwordx2 v6, v[0:1], off
; GFX942-NEXT: .LBB16_6: ; %atomicrmw.phi
; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
@@ -3472,8 +3471,7 @@ define double @flat_agent_atomic_fsub_ret_f64(ptr %ptr, double %val) #0 {
; GFX90A-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen offset:4
; GFX90A-NEXT: .LBB16_6: ; %atomicrmw.phi
; GFX90A-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll b/llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
index 9d0d43d900026..e8b94f39b821d 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
@@ -12046,8 +12046,7 @@ define double @flat_atomic_fadd_f64_saddr_rtn(ptr inreg %ptr, double %data) {
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: .LBB110_8: ; %atomicrmw.end
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, v3
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX950-GISEL-LABEL: flat_atomic_fadd_f64_saddr_rtn:
@@ -12096,8 +12095,7 @@ define double @flat_atomic_fadd_f64_saddr_rtn(ptr inreg %ptr, double %data) {
; GFX950-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-GISEL-NEXT: .LBB110_8: ; %atomicrmw.end
; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v0, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v1, v3
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
%gep.0 = getelementptr inbounds [512 x double], ptr %ptr, i64 0, i64 10
%result = atomicrmw fadd ptr %gep.0, double %data syncscope("workgroup") seq_cst, align 8, !amdgpu.no.fine.grained.memory !0
@@ -12417,8 +12415,7 @@ define double @flat_atomic_fmax_f64_saddr_rtn(ptr inreg %ptr, double %data) {
; GFX950-SDAG-NEXT: scratch_store_dwordx2 off, v[0:1], s0
; GFX950-SDAG-NEXT: .LBB112_4: ; %atomicrmw.end
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, v3
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX950-GISEL-LABEL: flat_atomic_fmax_f64_saddr_rtn:
@@ -12451,8 +12448,7 @@ define double @flat_atomic_fmax_f64_saddr_rtn(ptr inreg %ptr, double %data) {
; GFX950-GISEL-NEXT: scratch_store_dwordx2 off, v[0:1], s0
; GFX950-GISEL-NEXT: .LBB112_4: ; %atomicrmw.end
; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v0, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v1, v3
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
%gep.0 = getelementptr inbounds [512 x double], ptr %ptr, i64 0, i64 10
%result = atomicrmw fmax ptr %gep.0, double %data syncscope("workgroup") seq_cst, align 8, !amdgpu.no.fine.grained.memory !0
@@ -12710,8 +12706,7 @@ define double @flat_atomic_fmin_f64_saddr_rtn(ptr inreg %ptr, double %data) {
; GFX950-SDAG-NEXT: scratch_store_dwordx2 off, v[0:1], s0
; GFX950-SDAG-NEXT: .LBB114_4: ; %atomicrmw.end
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, v3
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX950-GISEL-LABEL: flat_atomic_fmin_f64_saddr_rtn:
@@ -12744,8 +12739,7 @@ define double @flat_atomic_fmin_f64_saddr_rtn(ptr inreg %ptr, double %data) {
; GFX950-GISEL-NEXT: scratch_store_dwordx2 off, v[0:1], s0
; GFX950-GISEL-NEXT: .LBB114_4: ; %atomicrmw.end
; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v0, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v1, v3
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
%gep.0 = getelementptr inbounds [512 x double], ptr %ptr, i64 0, i64 10
%result = atomicrmw fmin ptr %gep.0, double %data syncscope("workgroup") seq_cst, align 8, !amdgpu.no.fine.grained.memory !0
@@ -12908,22 +12902,13 @@ define float @flat_atomic_fadd_f32_saddr_rtn(ptr inreg %ptr, float %data) {
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
;
-; GFX950-SDAG-LABEL: flat_atomic_fadd_f32_saddr_rtn:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: flat_atomic_add_f32 v0, v[2:3], v0 offset:40 sc0
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: flat_atomic_fadd_f32_saddr_rtn:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
-; GFX950-GISEL-NEXT: flat_atomic_add_f32 v0, v[2:3], v0 offset:40 sc0
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX950-LABEL: flat_atomic_fadd_f32_saddr_rtn:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-NEXT: flat_atomic_add_f32 v0, v[2:3], v0 offset:40 sc0
+; GFX950-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX950-NEXT: s_setpc_b64 s[30:31]
%gep.0 = getelementptr inbounds [512 x float], ptr %ptr, i64 0, i64 10
%result = atomicrmw fadd ptr %gep.0, float %data syncscope("workgroup") seq_cst, align 8, !amdgpu.no.fine.grained.memory !0
ret float %result
@@ -12940,22 +12925,13 @@ define void @flat_atomic_fadd_f32_saddr_nortn(ptr inreg %ptr, float %data) {
; GFX1250-NEXT: s_wait_storecnt_dscnt 0x0
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
;
-; GFX950-SDAG-LABEL: flat_atomic_fadd_f32_saddr_nortn:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: flat_atomic_add_f32 v[2:3], v0 offset:40
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: flat_atomic_fadd_f32_saddr_nortn:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
-; GFX950-GISEL-NEXT: flat_atomic_add_f32 v[2:3], v0 offset:40
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX950-LABEL: flat_atomic_fadd_f32_saddr_nortn:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-NEXT: flat_atomic_add_f32 v[2:3], v0 offset:40
+; GFX950-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX950-NEXT: s_setpc_b64 s[30:31]
%gep.0 = getelementptr inbounds [512 x float], ptr %ptr, i64 0, i64 10
%unused = atomicrmw fadd ptr %gep.0, float %data syncscope("workgroup") seq_cst, align 8, !amdgpu.no.fine.grained.memory !0
ret void
@@ -13218,22 +13194,13 @@ define <2 x half> @flat_atomic_fadd_v2f16_saddr_rtn(ptr inreg %ptr, <2 x half> %
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
;
-; GFX950-SDAG-LABEL: flat_atomic_fadd_v2f16_saddr_rtn:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: flat_atomic_pk_add_f16 v0, v[2:3], v0 offset:40 sc0
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: flat_atomic_fadd_v2f16_saddr_rtn:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
-; GFX950-GISEL-NEXT: flat_atomic_pk_add_f16 v0, v[2:3], v0 offset:40 sc0
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX950-LABEL: flat_atomic_fadd_v2f16_saddr_rtn:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-NEXT: flat_atomic_pk_add_f16 v0, v[2:3], v0 offset:40 sc0
+; GFX950-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX950-NEXT: s_setpc_b64 s[30:31]
%gep.0 = getelementptr inbounds [512 x <2 x half>], ptr %ptr, i64 0, i64 10
%result = atomicrmw fadd ptr %gep.0, <2 x half> %data syncscope("workgroup") seq_cst, align 8, !amdgpu.no.fine.grained.memory !0
ret <2 x half> %result
@@ -13250,22 +13217,13 @@ define void @flat_atomic_fadd_v2f16_saddr_nortn(ptr inreg %ptr, <2 x half> %data
; GFX1250-NEXT: s_wait_storecnt_dscnt 0x0
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
;
-; GFX950-SDAG-LABEL: flat_atomic_fadd_v2f16_saddr_nortn:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: flat_atomic_pk_add_f16 v[2:3], v0 offset:40
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: flat_atomic_fadd_v2f16_saddr_nortn:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
-; GFX950-GISEL-NEXT: flat_atomic_pk_add_f16 v[2:3], v0 offset:40
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX950-LABEL: flat_atomic_fadd_v2f16_saddr_nortn:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-NEXT: flat_atomic_pk_add_f16 v[2:3], v0 offset:40
+; GFX950-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX950-NEXT: s_setpc_b64 s[30:31]
%gep.0 = getelementptr inbounds [512 x <2 x half>], ptr %ptr, i64 0, i64 10
%unused = atomicrmw fadd ptr %gep.0, <2 x half> %data syncscope("workgroup") seq_cst, align 8, !amdgpu.no.fine.grained.memory !0
ret void
@@ -13619,8 +13577,7 @@ define <2 x bfloat> @flat_atomic_fadd_v2bf16_saddr_rtn(ptr inreg %ptr, <2 x bflo
; GFX950-LABEL: flat_atomic_fadd_v2bf16_saddr_rtn:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-NEXT: v_mov_b32_e32 v3, s1
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
; GFX950-NEXT: flat_atomic_pk_add_bf16 v0, v[2:3], v0 offset:40 sc0
; GFX950-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX950-NEXT: s_setpc_b64 s[30:31]
@@ -13643,8 +13600,7 @@ define void @flat_atomic_fadd_v2bf16_saddr_nortn(ptr inreg %ptr, <2 x bfloat> %d
; GFX950-LABEL: flat_atomic_fadd_v2bf16_saddr_nortn:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-NEXT: v_mov_b32_e32 v3, s1
+; GFX950-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
; GFX950-NEXT: flat_atomic_pk_add_bf16 v[2:3], v0 offset:40
; GFX950-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX950-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll b/llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
index 278a77affd22a..b6ea8a5e5a801 100644
--- a/llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
+++ b/llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
@@ -142,8 +142,7 @@ define amdgpu_kernel void @local_atomic_fadd_v2f16_noret(ptr addrspace(3) %ptr,
; GFX942: ; %bb.0:
; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, s0
-; GFX942-NEXT: v_mov_b32_e32 v1, s1
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX942-NEXT: ds_pk_add_f16 v0, v1
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-NEXT: s_endpgm
@@ -209,8 +208,7 @@ define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3) %ptr,
; GFX942: ; %bb.0:
; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, s0
-; GFX942-NEXT: v_mov_b32_e32 v1, s1
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX942-NEXT: ds_pk_add_bf16 v0, v1
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
index 5b41f57ca9563..267dd74a4cef9 100644
--- a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
@@ -4142,8 +4142,7 @@ define double @global_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory(ptr add
; GFX90A-NEXT: s_cbranch_execnz .LBB24_1
; GFX90A-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX90A-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
; GFX908-LABEL: global_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory:
diff --git a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
index 7b529d1aff4f4..3548526524106 100644
--- a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
@@ -4142,8 +4142,7 @@ define double @global_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory(ptr add
; GFX90A-NEXT: s_cbranch_execnz .LBB24_1
; GFX90A-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX90A-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
; GFX908-LABEL: global_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory:
diff --git a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
index 2031374ca0df4..ff0ef82abd961 100644
--- a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
@@ -3781,8 +3781,7 @@ define double @global_agent_atomic_fsub_ret_f64(ptr addrspace(1) %ptr, double %v
; GFX942-NEXT: s_cbranch_execnz .LBB16_1
; GFX942-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: global_agent_atomic_fsub_ret_f64:
@@ -3856,8 +3855,7 @@ define double @global_agent_atomic_fsub_ret_f64(ptr addrspace(1) %ptr, double %v
; GFX90A-NEXT: s_cbranch_execnz .LBB16_1
; GFX90A-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX90A-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
; GFX908-LABEL: global_agent_atomic_fsub_ret_f64:
@@ -4033,8 +4031,7 @@ define double @global_agent_atomic_fsub_ret_f64__offset12b_pos(ptr addrspace(1)
; GFX942-NEXT: s_cbranch_execnz .LBB17_1
; GFX942-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: global_agent_atomic_fsub_ret_f64__offset12b_pos:
@@ -4108,8 +4105,7 @@ define double @global_agent_atomic_fsub_ret_f64__offset12b_pos(ptr addrspace(1)
; GFX90A-NEXT: s_cbranch_execnz .LBB17_1
; GFX90A-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX90A-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
; GFX908-LABEL: global_agent_atomic_fsub_ret_f64__offset12b_pos:
@@ -4286,8 +4282,7 @@ define double @global_agent_atomic_fsub_ret_f64__offset12b_neg(ptr addrspace(1)
; GFX942-NEXT: s_cbranch_execnz .LBB18_1
; GFX942-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: global_agent_atomic_fsub_ret_f64__offset12b_neg:
@@ -4361,8 +4356,7 @@ define double @global_agent_atomic_fsub_ret_f64__offset12b_neg(ptr addrspace(1)
; GFX90A-NEXT: s_cbranch_execnz .LBB18_1
; GFX90A-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX90A-NEXT: s_or_b64 exec, exec, s[4:5]
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: s_setpc_b64 s[30:31]
;
; GFX908-LABEL: global_agent_atomic_fsub_ret_f64__offset12b_neg:
diff --git a/llvm/test/CodeGen/AMDGPU/issue153808-extract-subvector-legalize.ll b/llvm/test/CodeGen/AMDGPU/issue153808-extract-subvector-legalize.ll
index 75c5d206e7933..e48777c722b92 100644
--- a/llvm/test/CodeGen/AMDGPU/issue153808-extract-subvector-legalize.ll
+++ b/llvm/test/CodeGen/AMDGPU/issue153808-extract-subvector-legalize.ll
@@ -49,8 +49,7 @@ define <3 x float> @extract_subvector_v3f32_v33f32_elt30_0(ptr addrspace(1) %ptr
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: global_load_dwordx4 v[4:7], v[0:1], off offset:112 sc0 sc1
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v6
-; GFX942-NEXT: v_mov_b32_e32 v1, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[6:7]
; GFX942-NEXT: s_setpc_b64 s[30:31]
%val = load volatile <33 x float>, ptr addrspace(1) %ptr, align 4
%extract.subvector = shufflevector <33 x float> %val, <33 x float> poison, <3 x i32> <i32 30, i32 31, i32 32>
@@ -89,8 +88,7 @@ define <3 x float> @extract_subvector_v3f32_v33f32_elt30_1(ptr addrspace(1) %ptr
; GFX942-NEXT: s_waitcnt vmcnt(2)
; GFX942-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GFX942-NEXT: s_waitcnt vmcnt(2)
-; GFX942-NEXT: v_mov_b32_e32 v0, v10
-; GFX942-NEXT: v_mov_b32_e32 v1, v11
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
%val = load <33 x float>, ptr addrspace(1) %ptr, align 4
@@ -132,8 +130,7 @@ define <6 x float> @extract_subvector_v6f32_v36f32_elt30(ptr addrspace(1) %ptr)
; GFX942-NEXT: s_waitcnt vmcnt(2)
; GFX942-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0
; GFX942-NEXT: s_waitcnt vmcnt(2)
-; GFX942-NEXT: v_mov_b32_e32 v0, v12
-; GFX942-NEXT: v_mov_b32_e32 v1, v13
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
%val = load <36 x float>, ptr addrspace(1) %ptr, align 4
@@ -172,8 +169,7 @@ define <3 x float> @issue153808_vector_extract_assert(ptr addrspace(1) %ptr) #0
; GFX942-NEXT: s_waitcnt vmcnt(1)
; GFX942-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0
; GFX942-NEXT: s_waitcnt vmcnt(1)
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: v_mov_b32_e32 v2, v4
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
index c49b2b927bd31..9c44b0959c572 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
@@ -225,6 +225,7 @@
; GCN-O2-NEXT: machine-cp
; GCN-O2-NEXT: machinelicm
; GCN-O2-NEXT: si-fix-vgpr-copies
+; GCN-O2-NEXT: si-merge-vgpr-copies
; GCN-O2-NEXT: si-optimize-exec-masking
; GCN-O2-NEXT: remove-redundant-debug-values
; GCN-O2-NEXT: fixup-statepoint-caller-saved
@@ -394,6 +395,7 @@
; GCN-O3-NEXT: machine-cp
; GCN-O3-NEXT: machinelicm
; GCN-O3-NEXT: si-fix-vgpr-copies
+; GCN-O3-NEXT: si-merge-vgpr-copies
; GCN-O3-NEXT: si-optimize-exec-masking
; GCN-O3-NEXT: remove-redundant-debug-values
; GCN-O3-NEXT: fixup-statepoint-caller-saved
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index 070c873798647..731846140a65b 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -399,6 +399,7 @@
; GCN-O1-NEXT: Machine Copy Propagation Pass
; GCN-O1-NEXT: Machine Loop Invariant Code Motion
; GCN-O1-NEXT: SI Fix VGPR copies
+; GCN-O1-NEXT: SI Merge VGPR copies
; GCN-O1-NEXT: SI optimize exec mask operations
; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis
; GCN-O1-NEXT: Fixup Statepoint Caller Saved
@@ -717,6 +718,7 @@
; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass
; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion
; GCN-O1-OPTS-NEXT: SI Fix VGPR copies
+; GCN-O1-OPTS-NEXT: SI Merge VGPR copies
; GCN-O1-OPTS-NEXT: SI optimize exec mask operations
; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis
; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved
@@ -1040,6 +1042,7 @@
; GCN-O2-NEXT: Machine Copy Propagation Pass
; GCN-O2-NEXT: Machine Loop Invariant Code Motion
; GCN-O2-NEXT: SI Fix VGPR copies
+; GCN-O2-NEXT: SI Merge VGPR copies
; GCN-O2-NEXT: SI optimize exec mask operations
; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis
; GCN-O2-NEXT: Fixup Statepoint Caller Saved
@@ -1376,6 +1379,7 @@
; GCN-O3-NEXT: Machine Copy Propagation Pass
; GCN-O3-NEXT: Machine Loop Invariant Code Motion
; GCN-O3-NEXT: SI Fix VGPR copies
+; GCN-O3-NEXT: SI Merge VGPR copies
; GCN-O3-NEXT: SI optimize exec mask operations
; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis
; GCN-O3-NEXT: Fixup Statepoint Caller Saved
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
index d6ab24646d784..5f7e9ef6c28e5 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
@@ -966,24 +966,18 @@ define <32 x float> @test_cvt_scale_pk32_f32_fp6(<6 x i32> %src, float %scale) {
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b32_e32 v38, v6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v37, v5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v36, v4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v35, v3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v34, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v33, v1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v32, v0
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[36:37], v[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[34:35], v[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[32:33], v[0:1]
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f32_fp6 v[0:31], v[32:37], v38
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX950-GISEL-LABEL: test_cvt_scale_pk32_f32_fp6:
; GFX950-GISEL: ; %bb.0:
; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v32, v0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v33, v1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v34, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v35, v3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v36, v4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v37, v5
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[32:33], v[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[34:35], v[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[36:37], v[4:5]
; GFX950-GISEL-NEXT: v_mov_b32_e32 v38, v6
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f32_fp6 v[0:31], v[32:37], v38
; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -996,24 +990,18 @@ define <32 x float> @test_cvt_scale_pk32_f32_bf6(<6 x i32> %src, float %scale) {
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b32_e32 v38, v6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v37, v5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v36, v4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v35, v3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v34, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v33, v1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v32, v0
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[36:37], v[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[34:35], v[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[32:33], v[0:1]
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f32_bf6 v[0:31], v[32:37], v38
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX950-GISEL-LABEL: test_cvt_scale_pk32_f32_bf6:
; GFX950-GISEL: ; %bb.0:
; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v32, v0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v33, v1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v34, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v35, v3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v36, v4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v37, v5
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[32:33], v[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[34:35], v[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[36:37], v[4:5]
; GFX950-GISEL-NEXT: v_mov_b32_e32 v38, v6
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f32_bf6 v[0:31], v[32:37], v38
; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -1026,24 +1014,18 @@ define <32 x half> @test_cvt_scalef32_pk32_f16_fp6_vv(<6 x i32> %src, float %sca
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, v6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, v5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, v4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, v3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, v1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, v0
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], v[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[18:19], v[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], v22
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_fp6_vv:
; GFX950-GISEL: ; %bb.0:
; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, v0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, v1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v19, v3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v20, v4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v21, v5
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[18:19], v[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[20:21], v[4:5]
; GFX950-GISEL-NEXT: v_mov_b32_e32 v22, v6
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], v22
; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -1055,12 +1037,9 @@ define <32 x half> @test_cvt_scalef32_pk32_f16_fp6_sl(<6 x i32> inreg %src) {
; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_fp6_sl:
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s16
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s17
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], s0
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -1085,12 +1064,9 @@ define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_fp6_vv(<6 x i32> %src, float %
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v22, v6
-; GCN-NEXT: v_mov_b32_e32 v21, v5
-; GCN-NEXT: v_mov_b32_e32 v20, v4
-; GCN-NEXT: v_mov_b32_e32 v19, v3
-; GCN-NEXT: v_mov_b32_e32 v18, v2
-; GCN-NEXT: v_mov_b32_e32 v17, v1
-; GCN-NEXT: v_mov_b32_e32 v16, v0
+; GCN-NEXT: v_mov_b64_e32 v[20:21], v[4:5]
+; GCN-NEXT: v_mov_b64_e32 v[18:19], v[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
; GCN-NEXT: v_cvt_scalef32_pk32_bf16_fp6 v[0:15], v[16:21], v22
; GCN-NEXT: s_setpc_b64 s[30:31]
%ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6(<6 x i32> %src, float %scale)
@@ -1101,12 +1077,9 @@ define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_fp6_sl(<6 x i32> inreg %src) {
; GCN-LABEL: test_cvt_scalef32_pk32_bf16_fp6_sl:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v16, s0
-; GCN-NEXT: v_mov_b32_e32 v17, s1
-; GCN-NEXT: v_mov_b32_e32 v18, s2
-; GCN-NEXT: v_mov_b32_e32 v19, s3
-; GCN-NEXT: v_mov_b32_e32 v20, s16
-; GCN-NEXT: v_mov_b32_e32 v21, s17
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; GCN-NEXT: s_mov_b32 s0, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_pk32_bf16_fp6 v[0:15], v[16:21], s0
; GCN-NEXT: s_setpc_b64 s[30:31]
@@ -1119,24 +1092,18 @@ define <32 x half> @test_cvt_scalef32_pk32_f16_bf6_vv(<6 x i32> %src, float %sca
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, v6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, v5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, v4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, v3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, v1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, v0
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], v[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[18:19], v[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], v22
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX950-GISEL-LABEL: test_cvt_scalef32_pk32_f16_bf6_vv:
; GFX950-GISEL: ; %bb.0:
; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, v0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, v1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v18, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v19, v3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v20, v4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v21, v5
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[18:19], v[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[20:21], v[4:5]
; GFX950-GISEL-NEXT: v_mov_b32_e32 v22, v6
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], v22
; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -1148,12 +1115,9 @@ define <32 x half> @test_cvt_scalef32_pk32_f16_bf6_sl(<6 x i32> inreg %src) {
; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_bf6_sl:
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s16
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s17
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], s0
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -1178,12 +1142,9 @@ define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_bf6_vv(<6 x i32> %src, float %
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v22, v6
-; GCN-NEXT: v_mov_b32_e32 v21, v5
-; GCN-NEXT: v_mov_b32_e32 v20, v4
-; GCN-NEXT: v_mov_b32_e32 v19, v3
-; GCN-NEXT: v_mov_b32_e32 v18, v2
-; GCN-NEXT: v_mov_b32_e32 v17, v1
-; GCN-NEXT: v_mov_b32_e32 v16, v0
+; GCN-NEXT: v_mov_b64_e32 v[20:21], v[4:5]
+; GCN-NEXT: v_mov_b64_e32 v[18:19], v[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
; GCN-NEXT: v_cvt_scalef32_pk32_bf16_bf6 v[0:15], v[16:21], v22
; GCN-NEXT: s_setpc_b64 s[30:31]
%ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6(<6 x i32> %src, float %scale)
@@ -1194,12 +1155,9 @@ define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_bf6_sl(<6 x i32> inreg %src) {
; GCN-LABEL: test_cvt_scalef32_pk32_bf16_bf6_sl:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v16, s0
-; GCN-NEXT: v_mov_b32_e32 v17, s1
-; GCN-NEXT: v_mov_b32_e32 v18, s2
-; GCN-NEXT: v_mov_b32_e32 v19, s3
-; GCN-NEXT: v_mov_b32_e32 v20, s16
-; GCN-NEXT: v_mov_b32_e32 v21, s17
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; GCN-NEXT: s_mov_b32 s0, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_pk32_bf16_bf6 v[0:15], v[16:21], s0
; GCN-NEXT: s_setpc_b64 s[30:31]
@@ -2183,12 +2141,9 @@ define <32 x float> @test_cvt_scale_pk32_f32_fp6_inreg_src(<6 x i32> inreg %src,
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b32_e32 v32, v0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v34, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v35, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v36, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v37, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v38, s16
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v39, s17
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[36:37], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[16:17]
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f32_fp6 v[0:31], v[34:39], v32
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2212,12 +2167,9 @@ define <32 x float> @test_cvt_scale_pk32_f32_bf6_inreg_src(<6 x i32> inreg %src,
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b32_e32 v32, v0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v34, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v35, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v36, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v37, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v38, s16
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v39, s17
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[36:37], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[16:17]
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f32_bf6 v[0:31], v[34:39], v32
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2241,12 +2193,9 @@ define <32 x half> @test_cvt_scalef32_pk32_f16_fp6_vv_inreg_src(<6 x i32> inreg
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, v0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s16
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s17
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[18:19], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[18:23], v16
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2269,12 +2218,9 @@ define <32 x half> @test_cvt_scalef32_pk32_f16_fp6_sl_inreg_src(<6 x i32> inreg
; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_fp6_sl_inreg_src:
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s16
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s17
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_fp6 v[0:15], v[16:21], s0
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -2299,12 +2245,9 @@ define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_fp6_vv_inreg_src(<6 x i32> inr
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v16, v0
-; GCN-NEXT: v_mov_b32_e32 v18, s0
-; GCN-NEXT: v_mov_b32_e32 v19, s1
-; GCN-NEXT: v_mov_b32_e32 v20, s2
-; GCN-NEXT: v_mov_b32_e32 v21, s3
-; GCN-NEXT: v_mov_b32_e32 v22, s16
-; GCN-NEXT: v_mov_b32_e32 v23, s17
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GCN-NEXT: v_cvt_scalef32_pk32_bf16_fp6 v[0:15], v[18:23], v16
; GCN-NEXT: s_setpc_b64 s[30:31]
%ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6(<6 x i32> %src, float %scale)
@@ -2315,12 +2258,9 @@ define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_fp6_sl_inreg_src(<6 x i32> inr
; GCN-LABEL: test_cvt_scalef32_pk32_bf16_fp6_sl_inreg_src:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v16, s0
-; GCN-NEXT: v_mov_b32_e32 v17, s1
-; GCN-NEXT: v_mov_b32_e32 v18, s2
-; GCN-NEXT: v_mov_b32_e32 v19, s3
-; GCN-NEXT: v_mov_b32_e32 v20, s16
-; GCN-NEXT: v_mov_b32_e32 v21, s17
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; GCN-NEXT: s_mov_b32 s0, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_pk32_bf16_fp6 v[0:15], v[16:21], s0
; GCN-NEXT: s_setpc_b64 s[30:31]
@@ -2333,12 +2273,9 @@ define <32 x half> @test_cvt_scalef32_pk32_f16_bf6_vv_inreg_src(<6 x i32> inreg
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, v0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s16
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s17
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[18:19], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[18:23], v16
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2361,12 +2298,9 @@ define <32 x half> @test_cvt_scalef32_pk32_f16_bf6_sl_inreg_src(<6 x i32> inreg
; GFX950-SDAG-LABEL: test_cvt_scalef32_pk32_f16_bf6_sl_inreg_src:
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s16
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s17
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_f16_bf6 v[0:15], v[16:21], s0
; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -2391,12 +2325,9 @@ define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_bf6_vv_inreg_src(<6 x i32> inr
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v16, v0
-; GCN-NEXT: v_mov_b32_e32 v18, s0
-; GCN-NEXT: v_mov_b32_e32 v19, s1
-; GCN-NEXT: v_mov_b32_e32 v20, s2
-; GCN-NEXT: v_mov_b32_e32 v21, s3
-; GCN-NEXT: v_mov_b32_e32 v22, s16
-; GCN-NEXT: v_mov_b32_e32 v23, s17
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GCN-NEXT: v_cvt_scalef32_pk32_bf16_bf6 v[0:15], v[18:23], v16
; GCN-NEXT: s_setpc_b64 s[30:31]
%ret = tail call <32 x bfloat> @llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6(<6 x i32> %src, float %scale)
@@ -2407,12 +2338,9 @@ define <32 x bfloat> @test_cvt_scalef32_pk32_bf16_bf6_sl_inreg_src(<6 x i32> inr
; GCN-LABEL: test_cvt_scalef32_pk32_bf16_bf6_sl_inreg_src:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v16, s0
-; GCN-NEXT: v_mov_b32_e32 v17, s1
-; GCN-NEXT: v_mov_b32_e32 v18, s2
-; GCN-NEXT: v_mov_b32_e32 v19, s3
-; GCN-NEXT: v_mov_b32_e32 v20, s16
-; GCN-NEXT: v_mov_b32_e32 v21, s17
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; GCN-NEXT: s_mov_b32 s0, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_pk32_bf16_bf6 v[0:15], v[16:21], s0
; GCN-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
index 70674961b87fb..aec52ce83aab0 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
@@ -33,22 +33,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_bf16_vv(<32 x bfloat> %src, float
define amdgpu_ps void @test_scalef32_pk32_bf6_bf16_sl(<32 x bfloat> inreg %src, ptr addrspace(1) %out) {
; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_bf16_sl:
; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_bf6_bf16 v[18:23], v[2:17], s0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -57,22 +49,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_bf16_sl(<32 x bfloat> inreg %src,
;
; GFX950-GISEL-LABEL: test_scalef32_pk32_bf6_bf16_sl:
; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-GISEL-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_bf6_bf16 v[18:23], v[2:17], s0
; GFX950-GISEL-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -109,22 +93,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_f16_vv(<32 x half> %src, float %sc
define amdgpu_ps void @test_scalef32_pk32_bf6_f16_sl(<32 x half> inreg %src, ptr addrspace(1) %out) {
; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_f16_sl:
; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_bf6_f16 v[18:23], v[2:17], s0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -177,22 +153,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_bf16_vv(<32 x bfloat> %src, float
define amdgpu_ps void @test_scalef32_pk32_fp6_bf16_sl(<32 x bfloat> inreg %src, ptr addrspace(1) %out) {
; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_bf16_sl:
; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_fp6_bf16 v[18:23], v[2:17], s0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -201,22 +169,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_bf16_sl(<32 x bfloat> inreg %src,
;
; GFX950-GISEL-LABEL: test_scalef32_pk32_fp6_bf16_sl:
; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-GISEL-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_fp6_bf16 v[18:23], v[2:17], s0
; GFX950-GISEL-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -253,22 +213,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_f16_vv(<32 x half> %src, float %sc
define amdgpu_ps void @test_scalef32_pk32_fp6_f16_sl(<32 x half> inreg %src, ptr addrspace(1) %out) {
; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_f16_sl:
; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_fp6_f16 v[18:23], v[2:17], s0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -299,22 +251,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_bf16_vv_inreg_src(<32 x bfloat> in
; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_bf16_vv_inreg_src:
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: v_mov_b32_e32 v25, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: v_mov_b32_e32 v24, v1
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_bf6_bf16 v[18:23], v[2:17], v0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[24:25], v[22:23], off offset:16
@@ -324,22 +268,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_bf16_vv_inreg_src(<32 x bfloat> in
; GFX950-GISEL-LABEL: test_scalef32_pk32_bf6_bf16_vv_inreg_src:
; GFX950-GISEL: ; %bb.0:
; GFX950-GISEL-NEXT: v_mov_b32_e32 v25, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-GISEL-NEXT: v_mov_b32_e32 v24, v1
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_bf6_bf16 v[18:23], v[2:17], v0
; GFX950-GISEL-NEXT: global_store_dwordx2 v[24:25], v[22:23], off offset:16
@@ -353,22 +289,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_bf16_vv_inreg_src(<32 x bfloat> in
define amdgpu_ps void @test_scalef32_pk32_bf6_bf16_sl_inreg_src(<32 x bfloat> inreg %src, ptr addrspace(1) %out) {
; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_bf16_sl_inreg_src:
; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_bf6_bf16 v[18:23], v[2:17], s0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -377,22 +305,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_bf16_sl_inreg_src(<32 x bfloat> in
;
; GFX950-GISEL-LABEL: test_scalef32_pk32_bf6_bf16_sl_inreg_src:
; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-GISEL-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_bf6_bf16 v[18:23], v[2:17], s0
; GFX950-GISEL-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -407,22 +327,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_f16_vv_inreg_src(<32 x half> inreg
; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_f16_vv_inreg_src:
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: v_mov_b32_e32 v25, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: v_mov_b32_e32 v24, v1
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_bf6_f16 v[18:23], v[2:17], v0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[24:25], v[22:23], off offset:16
@@ -453,22 +365,14 @@ define amdgpu_ps void @test_scalef32_pk32_bf6_f16_vv_inreg_src(<32 x half> inreg
define amdgpu_ps void @test_scalef32_pk32_bf6_f16_sl_inreg_src(<32 x half> inreg %src, ptr addrspace(1) %out) {
; GFX950-SDAG-LABEL: test_scalef32_pk32_bf6_f16_sl_inreg_src:
; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_bf6_f16 v[18:23], v[2:17], s0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -499,22 +403,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_bf16_vv_inreg_src(<32 x bfloat> in
; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_bf16_vv_inreg_src:
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: v_mov_b32_e32 v25, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: v_mov_b32_e32 v24, v1
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_fp6_bf16 v[18:23], v[2:17], v0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[24:25], v[22:23], off offset:16
@@ -524,22 +420,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_bf16_vv_inreg_src(<32 x bfloat> in
; GFX950-GISEL-LABEL: test_scalef32_pk32_fp6_bf16_vv_inreg_src:
; GFX950-GISEL: ; %bb.0:
; GFX950-GISEL-NEXT: v_mov_b32_e32 v25, v2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-GISEL-NEXT: v_mov_b32_e32 v24, v1
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_fp6_bf16 v[18:23], v[2:17], v0
; GFX950-GISEL-NEXT: global_store_dwordx2 v[24:25], v[22:23], off offset:16
@@ -553,22 +441,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_bf16_vv_inreg_src(<32 x bfloat> in
define amdgpu_ps void @test_scalef32_pk32_fp6_bf16_sl_inreg_src(<32 x bfloat> inreg %src, ptr addrspace(1) %out) {
; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_bf16_sl_inreg_src:
; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_fp6_bf16 v[18:23], v[2:17], s0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -577,22 +457,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_bf16_sl_inreg_src(<32 x bfloat> in
;
; GFX950-GISEL-LABEL: test_scalef32_pk32_fp6_bf16_sl_inreg_src:
; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-GISEL-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-GISEL-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-GISEL-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-GISEL-NEXT: v_cvt_scalef32_pk32_fp6_bf16 v[18:23], v[2:17], s0
; GFX950-GISEL-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -607,22 +479,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_f16_vv_inreg_src(<32 x half> inreg
; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_f16_vv_inreg_src:
; GFX950-SDAG: ; %bb.0:
; GFX950-SDAG-NEXT: v_mov_b32_e32 v25, v2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: v_mov_b32_e32 v24, v1
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_fp6_f16 v[18:23], v[2:17], v0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[24:25], v[22:23], off offset:16
@@ -653,22 +517,14 @@ define amdgpu_ps void @test_scalef32_pk32_fp6_f16_vv_inreg_src(<32 x half> inreg
define amdgpu_ps void @test_scalef32_pk32_fp6_f16_sl_inreg_src(<32 x half> inreg %src, ptr addrspace(1) %out) {
; GFX950-SDAG-LABEL: test_scalef32_pk32_fp6_f16_sl_inreg_src:
; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s1
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s2
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s3
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v6, s4
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v7, s5
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v8, s6
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v9, s7
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v12, s10
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v13, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v14, s12
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v15, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s14
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v17, s15
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x42c80000
; GFX950-SDAG-NEXT: v_cvt_scalef32_pk32_fp6_f16 v[18:23], v[2:17], s0
; GFX950-SDAG-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
index bcd4d03056077..b4fbe35eea138 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
@@ -24,22 +24,14 @@ define amdgpu_ps void @test_scalef32_sr_pk32_bf6_bf16_vv(<32 x bfloat> %src, i32
define amdgpu_ps void @test_scalef32_sr_pk32_bf6_bf16_sl(<32 x bfloat> inreg %src, i32 inreg %sr, ptr addrspace(1) %out) {
; GCN-LABEL: test_scalef32_sr_pk32_bf6_bf16_sl:
; GCN: ; %bb.0:
-; GCN-NEXT: v_mov_b32_e32 v2, s0
-; GCN-NEXT: v_mov_b32_e32 v3, s1
-; GCN-NEXT: v_mov_b32_e32 v4, s2
-; GCN-NEXT: v_mov_b32_e32 v5, s3
-; GCN-NEXT: v_mov_b32_e32 v6, s4
-; GCN-NEXT: v_mov_b32_e32 v7, s5
-; GCN-NEXT: v_mov_b32_e32 v8, s6
-; GCN-NEXT: v_mov_b32_e32 v9, s7
-; GCN-NEXT: v_mov_b32_e32 v10, s8
-; GCN-NEXT: v_mov_b32_e32 v11, s9
-; GCN-NEXT: v_mov_b32_e32 v12, s10
-; GCN-NEXT: v_mov_b32_e32 v13, s11
-; GCN-NEXT: v_mov_b32_e32 v14, s12
-; GCN-NEXT: v_mov_b32_e32 v15, s13
-; GCN-NEXT: v_mov_b32_e32 v16, s14
-; GCN-NEXT: v_mov_b32_e32 v17, s15
+; GCN-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GCN-NEXT: v_mov_b32_e32 v24, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_sr_pk32_bf6_bf16 v[18:23], v[2:17], s16, v24
; GCN-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -72,22 +64,14 @@ define amdgpu_ps void @test_scalef32_sr_pk32_bf6_f16_vv(<32 x half> %src, i32 %s
define amdgpu_ps void @test_scalef32_sr_pk32_bf6_f16_sl(<32 x half> inreg %src, i32 inreg %sr, ptr addrspace(1) %out) {
; GCN-LABEL: test_scalef32_sr_pk32_bf6_f16_sl:
; GCN: ; %bb.0:
-; GCN-NEXT: v_mov_b32_e32 v2, s0
-; GCN-NEXT: v_mov_b32_e32 v3, s1
-; GCN-NEXT: v_mov_b32_e32 v4, s2
-; GCN-NEXT: v_mov_b32_e32 v5, s3
-; GCN-NEXT: v_mov_b32_e32 v6, s4
-; GCN-NEXT: v_mov_b32_e32 v7, s5
-; GCN-NEXT: v_mov_b32_e32 v8, s6
-; GCN-NEXT: v_mov_b32_e32 v9, s7
-; GCN-NEXT: v_mov_b32_e32 v10, s8
-; GCN-NEXT: v_mov_b32_e32 v11, s9
-; GCN-NEXT: v_mov_b32_e32 v12, s10
-; GCN-NEXT: v_mov_b32_e32 v13, s11
-; GCN-NEXT: v_mov_b32_e32 v14, s12
-; GCN-NEXT: v_mov_b32_e32 v15, s13
-; GCN-NEXT: v_mov_b32_e32 v16, s14
-; GCN-NEXT: v_mov_b32_e32 v17, s15
+; GCN-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GCN-NEXT: v_mov_b32_e32 v24, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_sr_pk32_bf6_f16 v[18:23], v[2:17], s16, v24
; GCN-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -113,22 +97,14 @@ define amdgpu_ps void @test_scalef32_sr_pk32_fp6_bf16_vv(<32 x bfloat> %src, i32
define amdgpu_ps void @test_scalef32_sr_pk32_fp6_bf16_sl(<32 x bfloat> inreg %src, i32 inreg %sr, ptr addrspace(1) %out) {
; GCN-LABEL: test_scalef32_sr_pk32_fp6_bf16_sl:
; GCN: ; %bb.0:
-; GCN-NEXT: v_mov_b32_e32 v2, s0
-; GCN-NEXT: v_mov_b32_e32 v3, s1
-; GCN-NEXT: v_mov_b32_e32 v4, s2
-; GCN-NEXT: v_mov_b32_e32 v5, s3
-; GCN-NEXT: v_mov_b32_e32 v6, s4
-; GCN-NEXT: v_mov_b32_e32 v7, s5
-; GCN-NEXT: v_mov_b32_e32 v8, s6
-; GCN-NEXT: v_mov_b32_e32 v9, s7
-; GCN-NEXT: v_mov_b32_e32 v10, s8
-; GCN-NEXT: v_mov_b32_e32 v11, s9
-; GCN-NEXT: v_mov_b32_e32 v12, s10
-; GCN-NEXT: v_mov_b32_e32 v13, s11
-; GCN-NEXT: v_mov_b32_e32 v14, s12
-; GCN-NEXT: v_mov_b32_e32 v15, s13
-; GCN-NEXT: v_mov_b32_e32 v16, s14
-; GCN-NEXT: v_mov_b32_e32 v17, s15
+; GCN-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GCN-NEXT: v_mov_b32_e32 v24, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_sr_pk32_fp6_bf16 v[18:23], v[2:17], s16, v24
; GCN-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -161,22 +137,14 @@ define amdgpu_ps void @test_scalef32_sr_pk32_fp6_f16_vv(<32 x half> %src, i32 %s
define amdgpu_ps void @test_scalef32_sr_pk32_fp6_f16_sl(<32 x half> inreg %src, i32 inreg %sr, ptr addrspace(1) %out) {
; GCN-LABEL: test_scalef32_sr_pk32_fp6_f16_sl:
; GCN: ; %bb.0:
-; GCN-NEXT: v_mov_b32_e32 v2, s0
-; GCN-NEXT: v_mov_b32_e32 v3, s1
-; GCN-NEXT: v_mov_b32_e32 v4, s2
-; GCN-NEXT: v_mov_b32_e32 v5, s3
-; GCN-NEXT: v_mov_b32_e32 v6, s4
-; GCN-NEXT: v_mov_b32_e32 v7, s5
-; GCN-NEXT: v_mov_b32_e32 v8, s6
-; GCN-NEXT: v_mov_b32_e32 v9, s7
-; GCN-NEXT: v_mov_b32_e32 v10, s8
-; GCN-NEXT: v_mov_b32_e32 v11, s9
-; GCN-NEXT: v_mov_b32_e32 v12, s10
-; GCN-NEXT: v_mov_b32_e32 v13, s11
-; GCN-NEXT: v_mov_b32_e32 v14, s12
-; GCN-NEXT: v_mov_b32_e32 v15, s13
-; GCN-NEXT: v_mov_b32_e32 v16, s14
-; GCN-NEXT: v_mov_b32_e32 v17, s15
+; GCN-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
; GCN-NEXT: v_mov_b32_e32 v24, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_sr_pk32_fp6_f16 v[18:23], v[2:17], s16, v24
; GCN-NEXT: global_store_dwordx2 v[0:1], v[22:23], off offset:16
@@ -209,38 +177,22 @@ define amdgpu_ps void @test_scalef32_sr_pk32_bf6_f32_vv(<32 x float> %src, i32 %
define amdgpu_ps void @test_scalef32_sr_pk32_bf6_f32_sl(<32 x float> inreg %src, i32 inreg %sr, ptr addrspace(1) %out) {
; GCN-LABEL: test_scalef32_sr_pk32_bf6_f32_sl:
; GCN: ; %bb.0:
-; GCN-NEXT: v_mov_b32_e32 v2, s0
-; GCN-NEXT: v_mov_b32_e32 v3, s1
-; GCN-NEXT: v_mov_b32_e32 v4, s2
-; GCN-NEXT: v_mov_b32_e32 v5, s3
-; GCN-NEXT: v_mov_b32_e32 v6, s4
-; GCN-NEXT: v_mov_b32_e32 v7, s5
-; GCN-NEXT: v_mov_b32_e32 v8, s6
-; GCN-NEXT: v_mov_b32_e32 v9, s7
-; GCN-NEXT: v_mov_b32_e32 v10, s8
-; GCN-NEXT: v_mov_b32_e32 v11, s9
-; GCN-NEXT: v_mov_b32_e32 v12, s10
-; GCN-NEXT: v_mov_b32_e32 v13, s11
-; GCN-NEXT: v_mov_b32_e32 v14, s12
-; GCN-NEXT: v_mov_b32_e32 v15, s13
-; GCN-NEXT: v_mov_b32_e32 v16, s14
-; GCN-NEXT: v_mov_b32_e32 v17, s15
-; GCN-NEXT: v_mov_b32_e32 v18, s16
-; GCN-NEXT: v_mov_b32_e32 v19, s17
-; GCN-NEXT: v_mov_b32_e32 v20, s18
-; GCN-NEXT: v_mov_b32_e32 v21, s19
-; GCN-NEXT: v_mov_b32_e32 v22, s20
-; GCN-NEXT: v_mov_b32_e32 v23, s21
-; GCN-NEXT: v_mov_b32_e32 v24, s22
-; GCN-NEXT: v_mov_b32_e32 v25, s23
-; GCN-NEXT: v_mov_b32_e32 v26, s24
-; GCN-NEXT: v_mov_b32_e32 v27, s25
-; GCN-NEXT: v_mov_b32_e32 v28, s26
-; GCN-NEXT: v_mov_b32_e32 v29, s27
-; GCN-NEXT: v_mov_b32_e32 v30, s28
-; GCN-NEXT: v_mov_b32_e32 v31, s29
-; GCN-NEXT: v_mov_b32_e32 v32, s30
-; GCN-NEXT: v_mov_b32_e32 v33, s31
+; GCN-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[26:27], s[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[28:29], s[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[30:31], s[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[32:33], s[30:31]
; GCN-NEXT: v_mov_b32_e32 v40, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_sr_pk32_bf6_f32 v[34:39], v[2:33], s32, v40
; GCN-NEXT: global_store_dwordx2 v[0:1], v[38:39], off offset:16
@@ -273,38 +225,22 @@ define amdgpu_ps void @test_scalef32_sr_pk32_fp6_f32_vv(<32 x float> %src, i32 %
define amdgpu_ps void @test_scalef32_sr_pk32_fp6_f32_sl(<32 x float> inreg %src, i32 inreg %sr, ptr addrspace(1) %out) {
; GCN-LABEL: test_scalef32_sr_pk32_fp6_f32_sl:
; GCN: ; %bb.0:
-; GCN-NEXT: v_mov_b32_e32 v2, s0
-; GCN-NEXT: v_mov_b32_e32 v3, s1
-; GCN-NEXT: v_mov_b32_e32 v4, s2
-; GCN-NEXT: v_mov_b32_e32 v5, s3
-; GCN-NEXT: v_mov_b32_e32 v6, s4
-; GCN-NEXT: v_mov_b32_e32 v7, s5
-; GCN-NEXT: v_mov_b32_e32 v8, s6
-; GCN-NEXT: v_mov_b32_e32 v9, s7
-; GCN-NEXT: v_mov_b32_e32 v10, s8
-; GCN-NEXT: v_mov_b32_e32 v11, s9
-; GCN-NEXT: v_mov_b32_e32 v12, s10
-; GCN-NEXT: v_mov_b32_e32 v13, s11
-; GCN-NEXT: v_mov_b32_e32 v14, s12
-; GCN-NEXT: v_mov_b32_e32 v15, s13
-; GCN-NEXT: v_mov_b32_e32 v16, s14
-; GCN-NEXT: v_mov_b32_e32 v17, s15
-; GCN-NEXT: v_mov_b32_e32 v18, s16
-; GCN-NEXT: v_mov_b32_e32 v19, s17
-; GCN-NEXT: v_mov_b32_e32 v20, s18
-; GCN-NEXT: v_mov_b32_e32 v21, s19
-; GCN-NEXT: v_mov_b32_e32 v22, s20
-; GCN-NEXT: v_mov_b32_e32 v23, s21
-; GCN-NEXT: v_mov_b32_e32 v24, s22
-; GCN-NEXT: v_mov_b32_e32 v25, s23
-; GCN-NEXT: v_mov_b32_e32 v26, s24
-; GCN-NEXT: v_mov_b32_e32 v27, s25
-; GCN-NEXT: v_mov_b32_e32 v28, s26
-; GCN-NEXT: v_mov_b32_e32 v29, s27
-; GCN-NEXT: v_mov_b32_e32 v30, s28
-; GCN-NEXT: v_mov_b32_e32 v31, s29
-; GCN-NEXT: v_mov_b32_e32 v32, s30
-; GCN-NEXT: v_mov_b32_e32 v33, s31
+; GCN-NEXT: v_mov_b64_e32 v[2:3], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[26:27], s[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[28:29], s[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[30:31], s[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[32:33], s[30:31]
; GCN-NEXT: v_mov_b32_e32 v40, 0x42c80000
; GCN-NEXT: v_cvt_scalef32_sr_pk32_fp6_f32 v[34:39], v[2:33], s32, v40
; GCN-NEXT: global_store_dwordx2 v[0:1], v[38:39], off offset:16
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
index e8f74533eebd3..74b7664d2bd2f 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
@@ -89,10 +89,8 @@ define amdgpu_ps <4 x float> @load_cube_lwe(<8 x i32> inreg %rsrc, ptr addrspace
; GCN-NEXT: v_mov_b32_e32 v8, v14
; GCN-NEXT: image_load v[4:8], v[0:2], s[0:7] dmask:0xf unorm lwe da
; GCN-NEXT: s_waitcnt vmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v0, v4
-; GCN-NEXT: v_mov_b32_e32 v1, v5
-; GCN-NEXT: v_mov_b32_e32 v2, v6
-; GCN-NEXT: v_mov_b32_e32 v3, v7
+; GCN-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
+; GCN-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GCN-NEXT: global_store_dword v10, v8, s[8:9]
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: ; return to shader part epilog
@@ -141,10 +139,8 @@ define amdgpu_ps <4 x float> @load_2darray_lwe(<8 x i32> inreg %rsrc, ptr addrsp
; GCN-NEXT: v_mov_b32_e32 v8, v14
; GCN-NEXT: image_load v[4:8], v[0:2], s[0:7] dmask:0xf unorm lwe da
; GCN-NEXT: s_waitcnt vmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v0, v4
-; GCN-NEXT: v_mov_b32_e32 v1, v5
-; GCN-NEXT: v_mov_b32_e32 v2, v6
-; GCN-NEXT: v_mov_b32_e32 v3, v7
+; GCN-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
+; GCN-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GCN-NEXT: global_store_dword v10, v8, s[8:9]
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: ; return to shader part epilog
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll
index cc4cc8efd66f4..3d0f168ce91a8 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll
@@ -85,38 +85,23 @@ define amdgpu_kernel void @not_enough_agprs(ptr addrspace(1) %arg) #2 {
; HEURRC-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; HEURRC-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v0, s16
-; HEURRC-NEXT: v_mov_b32_e32 v1, s17
-; HEURRC-NEXT: v_mov_b32_e32 v2, s18
-; HEURRC-NEXT: v_mov_b32_e32 v3, s19
-; HEURRC-NEXT: v_mov_b32_e32 v4, s20
-; HEURRC-NEXT: v_mov_b32_e32 v5, s21
-; HEURRC-NEXT: v_mov_b32_e32 v6, s22
-; HEURRC-NEXT: v_mov_b32_e32 v7, s23
-; HEURRC-NEXT: v_mov_b32_e32 v8, s24
-; HEURRC-NEXT: v_mov_b32_e32 v9, s25
-; HEURRC-NEXT: v_mov_b32_e32 v10, s26
-; HEURRC-NEXT: v_mov_b32_e32 v11, s27
-; HEURRC-NEXT: v_mov_b32_e32 v12, s28
-; HEURRC-NEXT: v_mov_b32_e32 v13, s29
-; HEURRC-NEXT: v_mov_b32_e32 v14, s30
-; HEURRC-NEXT: v_mov_b32_e32 v15, s31
-; HEURRC-NEXT: v_mov_b32_e32 v16, s0
-; HEURRC-NEXT: v_mov_b32_e32 v17, s1
-; HEURRC-NEXT: v_mov_b32_e32 v18, s2
-; HEURRC-NEXT: v_mov_b32_e32 v19, s3
-; HEURRC-NEXT: v_mov_b32_e32 v20, s4
-; HEURRC-NEXT: v_mov_b32_e32 v21, s5
-; HEURRC-NEXT: v_mov_b32_e32 v22, s6
-; HEURRC-NEXT: v_mov_b32_e32 v23, s7
-; HEURRC-NEXT: v_mov_b32_e32 v24, s8
-; HEURRC-NEXT: v_mov_b32_e32 v25, s9
-; HEURRC-NEXT: v_mov_b32_e32 v26, s10
-; HEURRC-NEXT: v_mov_b32_e32 v27, s11
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; HEURRC-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; HEURRC-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; HEURRC-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; HEURRC-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; HEURRC-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; HEURRC-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; HEURRC-NEXT: v_mov_b32_e32 v28, s12
; HEURRC-NEXT: v_mov_b32_e32 v29, s13
-; HEURRC-NEXT: v_mov_b32_e32 v30, s14
-; HEURRC-NEXT: v_mov_b32_e32 v31, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; HEURRC-NEXT: s_nop 1
; HEURRC-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v33, v34, v[0:31] cbsz:1 abid:2 blgp:3
; HEURRC-NEXT: s_nop 15
@@ -141,38 +126,23 @@ define amdgpu_kernel void @not_enough_agprs(ptr addrspace(1) %arg) #2 {
; VGPRRC-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; VGPRRC-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s16
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s17
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s19
-; VGPRRC-NEXT: v_mov_b32_e32 v4, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v5, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v6, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v7, s23
-; VGPRRC-NEXT: v_mov_b32_e32 v8, s24
-; VGPRRC-NEXT: v_mov_b32_e32 v9, s25
-; VGPRRC-NEXT: v_mov_b32_e32 v10, s26
-; VGPRRC-NEXT: v_mov_b32_e32 v11, s27
-; VGPRRC-NEXT: v_mov_b32_e32 v12, s28
-; VGPRRC-NEXT: v_mov_b32_e32 v13, s29
-; VGPRRC-NEXT: v_mov_b32_e32 v14, s30
-; VGPRRC-NEXT: v_mov_b32_e32 v15, s31
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s0
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s1
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s2
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s3
-; VGPRRC-NEXT: v_mov_b32_e32 v20, s4
-; VGPRRC-NEXT: v_mov_b32_e32 v21, s5
-; VGPRRC-NEXT: v_mov_b32_e32 v22, s6
-; VGPRRC-NEXT: v_mov_b32_e32 v23, s7
-; VGPRRC-NEXT: v_mov_b32_e32 v24, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v25, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v26, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v27, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; VGPRRC-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; VGPRRC-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; VGPRRC-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; VGPRRC-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; VGPRRC-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; VGPRRC-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; VGPRRC-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; VGPRRC-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; VGPRRC-NEXT: v_mov_b32_e32 v28, s12
; VGPRRC-NEXT: v_mov_b32_e32 v29, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v30, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v31, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; VGPRRC-NEXT: s_nop 1
; VGPRRC-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v33, v34, v[0:31] cbsz:1 abid:2 blgp:3
; VGPRRC-NEXT: s_nop 15
@@ -248,22 +218,14 @@ define <16 x float> @mfma_scale_respect_flag(<8 x i32> %arg0, <8 x i32> %arg1, <
; VGPRRC-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0]
; VGPRRC-NEXT: s_nop 15
; VGPRRC-NEXT: s_nop 3
-; VGPRRC-NEXT: v_mov_b32_e32 v0, v16
-; VGPRRC-NEXT: v_mov_b32_e32 v1, v17
-; VGPRRC-NEXT: v_mov_b32_e32 v2, v18
-; VGPRRC-NEXT: v_mov_b32_e32 v3, v19
-; VGPRRC-NEXT: v_mov_b32_e32 v4, v20
-; VGPRRC-NEXT: v_mov_b32_e32 v5, v21
-; VGPRRC-NEXT: v_mov_b32_e32 v6, v22
-; VGPRRC-NEXT: v_mov_b32_e32 v7, v23
-; VGPRRC-NEXT: v_mov_b32_e32 v8, v24
-; VGPRRC-NEXT: v_mov_b32_e32 v9, v25
-; VGPRRC-NEXT: v_mov_b32_e32 v10, v26
-; VGPRRC-NEXT: v_mov_b32_e32 v11, v27
-; VGPRRC-NEXT: v_mov_b32_e32 v12, v28
-; VGPRRC-NEXT: v_mov_b32_e32 v13, v29
-; VGPRRC-NEXT: v_mov_b32_e32 v14, v30
-; VGPRRC-NEXT: v_mov_b32_e32 v15, v31
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; VGPRRC-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; VGPRRC-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; VGPRRC-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; VGPRRC-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; VGPRRC-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; VGPRRC-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
index e6379bd4dbb15..115fb0914ec11 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
@@ -82,38 +82,23 @@ define amdgpu_kernel void @test_mfma_f32_32x32x4bf16_1k(ptr addrspace(1) %arg) #
; GFX942-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GFX942-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-NEXT: v_mov_b32_e32 v27, s11
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GFX942-NEXT: v_mov_b32_e32 v28, s12
; GFX942-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-NEXT: s_nop 1
; GFX942-NEXT: v_mfma_f32_32x32x4_2b_bf16 v[0:31], v[34:35], v[32:33], v[0:31] cbsz:1 abid:2 blgp:3
; GFX942-NEXT: s_nop 15
@@ -196,38 +181,23 @@ define amdgpu_kernel void @test_mfma_f32_32x32x4bf16_1k(ptr addrspace(1) %arg) #
; GFX942-VGPR-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GFX942-VGPR-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v27, s11
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GFX942-VGPR-NEXT: v_mov_b32_e32 v28, s12
; GFX942-VGPR-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-VGPR-NEXT: s_nop 1
; GFX942-VGPR-NEXT: v_mfma_f32_32x32x4_2b_bf16 v[0:31], v[34:35], v[32:33], v[0:31] cbsz:1 abid:2 blgp:3
; GFX942-VGPR-NEXT: s_nop 15
@@ -1200,14 +1170,11 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_imm_int_64_in_high_bit
; GFX90A-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
; GFX90A-NEXT: v_mov_b32_e32 v1, 64
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[10:11], s[2:3], s[2:3] op_sel:[0,1]
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: v_pk_mov_b32 v[12:13], s[6:7], s[6:7] op_sel:[0,1]
; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
@@ -1228,14 +1195,11 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_imm_int_64_in_high_bit
; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX942-NEXT: v_mov_b32_e32 v0, 0
; GFX942-NEXT: v_mov_b32_e32 v1, 64
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: v_mov_b64_e32 v[12:13], s[6:7]
; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
@@ -1256,14 +1220,11 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_imm_int_64_in_high_bit
; GFX90A-VGPR-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX90A-VGPR-NEXT: v_mov_b32_e32 v0, 0
; GFX90A-VGPR-NEXT: v_mov_b32_e32 v1, 64
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v2, v0
+; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-VGPR-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[10:11], s[2:3], s[2:3] op_sel:[0,1]
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v5, v1
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[12:13], s[6:7], s[6:7] op_sel:[0,1]
; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
@@ -1284,14 +1245,11 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_imm_int_64_in_high_bit
; GFX942-VGPR-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX942-VGPR-NEXT: v_mov_b32_e32 v0, 0
; GFX942-VGPR-NEXT: v_mov_b32_e32 v1, 64
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v2, v0
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v5, v1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[6:7]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
@@ -1563,8 +1521,7 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_imm(ptr addrspace(1) %arg, d
; GFX942-NEXT: v_mov_b32_e32 v7, 0x3ff00000
; GFX942-NEXT: v_mov_b32_e32 v2, v0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v10, s2
-; GFX942-NEXT: v_mov_b32_e32 v11, s3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
; GFX942-NEXT: v_mov_b32_e32 v3, v0
; GFX942-NEXT: v_mov_b32_e32 v4, v0
; GFX942-NEXT: v_mov_b32_e32 v5, v0
@@ -1619,8 +1576,7 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_imm(ptr addrspace(1) %arg, d
; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, 0x3ff00000
; GFX942-VGPR-NEXT: v_mov_b32_e32 v2, v0
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v10, s2
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v11, s3
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
; GFX942-VGPR-NEXT: v_mov_b32_e32 v3, v0
; GFX942-VGPR-NEXT: v_mov_b32_e32 v4, v0
; GFX942-VGPR-NEXT: v_mov_b32_e32 v5, v0
@@ -1651,15 +1607,12 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_lit(ptr addrspace(1) %
; GFX90A-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
; GFX90A-NEXT: v_mov_b32_e32 v1, 0x405ec000
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_mov_b32_e32 v10, s2
; GFX90A-NEXT: v_mov_b32_e32 v11, s3
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: v_pk_mov_b32 v[12:13], s[6:7], s[6:7] op_sel:[0,1]
; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
@@ -1679,15 +1632,11 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_lit(ptr addrspace(1) %
; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX942-NEXT: v_mov_b32_e32 v0, 0
; GFX942-NEXT: v_mov_b32_e32 v1, 0x405ec000
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v10, s2
-; GFX942-NEXT: v_mov_b32_e32 v11, s3
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: v_mov_b64_e32 v[12:13], s[6:7]
; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
@@ -1707,15 +1656,12 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_lit(ptr addrspace(1) %
; GFX90A-VGPR-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX90A-VGPR-NEXT: v_mov_b32_e32 v0, 0
; GFX90A-VGPR-NEXT: v_mov_b32_e32 v1, 0x405ec000
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v2, v0
+; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-VGPR-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-VGPR-NEXT: v_mov_b32_e32 v10, s2
; GFX90A-VGPR-NEXT: v_mov_b32_e32 v11, s3
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v5, v1
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-VGPR-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[12:13], s[6:7], s[6:7] op_sel:[0,1]
; GFX90A-VGPR-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
@@ -1735,15 +1681,11 @@ define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_lit(ptr addrspace(1) %
; GFX942-VGPR-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX942-VGPR-NEXT: v_mov_b32_e32 v0, 0
; GFX942-VGPR-NEXT: v_mov_b32_e32 v1, 0x405ec000
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v2, v0
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v10, s2
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v11, s3
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v5, v1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[6:7]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
index 700fc6db8549f..a55d0729f8e47 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
@@ -2051,16 +2051,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_i8(ptr addrspace(1) %arg, <2
; GFX942-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX942-SDAG-NEXT: s_nop 1
; GFX942-SDAG-NEXT: v_smfmac_i32_16x16x64_i8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -2098,16 +2096,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_i8(ptr addrspace(1) %arg, <2
; GFX950-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX950-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX950-SDAG-NEXT: s_nop 1
; GFX950-SDAG-NEXT: v_smfmac_i32_16x16x64_i8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -2261,16 +2257,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_i8(ptr addrspace(1) %arg, <2
; GFX942-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX942-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX942-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX942-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX942-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -2326,16 +2320,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_i8(ptr addrspace(1) %arg, <2
; GFX950-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX950-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX950-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -2565,16 +2557,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_bf8_bf8(ptr addrspace(1) %ar
; GFX942-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX942-SDAG-NEXT: s_nop 1
; GFX942-SDAG-NEXT: v_smfmac_f32_16x16x64_bf8_bf8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -2612,16 +2602,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_bf8_bf8(ptr addrspace(1) %ar
; GFX950-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX950-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX950-SDAG-NEXT: s_nop 1
; GFX950-SDAG-NEXT: v_smfmac_f32_16x16x64_bf8_bf8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -2776,16 +2764,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_bf8_fp8(ptr addrspace(1) %ar
; GFX942-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX942-SDAG-NEXT: s_nop 1
; GFX942-SDAG-NEXT: v_smfmac_f32_16x16x64_bf8_fp8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -2823,16 +2809,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_bf8_fp8(ptr addrspace(1) %ar
; GFX950-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX950-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX950-SDAG-NEXT: s_nop 1
; GFX950-SDAG-NEXT: v_smfmac_f32_16x16x64_bf8_fp8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -2987,16 +2971,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_fp8_bf8(ptr addrspace(1) %ar
; GFX942-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX942-SDAG-NEXT: s_nop 1
; GFX942-SDAG-NEXT: v_smfmac_f32_16x16x64_fp8_bf8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -3034,16 +3016,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_fp8_bf8(ptr addrspace(1) %ar
; GFX950-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX950-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX950-SDAG-NEXT: s_nop 1
; GFX950-SDAG-NEXT: v_smfmac_f32_16x16x64_fp8_bf8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -3198,16 +3178,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_fp8_fp8(ptr addrspace(1) %ar
; GFX942-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX942-SDAG-NEXT: s_nop 1
; GFX942-SDAG-NEXT: v_smfmac_f32_16x16x64_fp8_fp8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -3245,16 +3223,14 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x64_fp8_fp8(ptr addrspace(1) %ar
; GFX950-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v10, s8
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
; GFX950-SDAG-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v11, s9
; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, s10
; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, s11
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v4, s12
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[8:9], s[2:3]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v5, s13
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s14
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]
; GFX950-SDAG-NEXT: s_nop 1
; GFX950-SDAG-NEXT: v_smfmac_f32_16x16x64_fp8_fp8 v[6:9], v[10:11], v[2:5], v1 cbsz:1 abid:2
@@ -3408,16 +3384,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_bf8_bf8(ptr addrspace(1) %ar
; GFX942-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX942-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX942-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX942-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX942-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -3473,16 +3447,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_bf8_bf8(ptr addrspace(1) %ar
; GFX950-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX950-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX950-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -3711,16 +3683,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_bf8_fp8(ptr addrspace(1) %ar
; GFX942-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX942-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX942-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX942-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX942-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -3776,16 +3746,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_bf8_fp8(ptr addrspace(1) %ar
; GFX950-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX950-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX950-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -4014,16 +3982,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_fp8_bf8(ptr addrspace(1) %ar
; GFX942-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX942-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX942-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX942-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX942-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -4079,16 +4045,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_fp8_bf8(ptr addrspace(1) %ar
; GFX950-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX950-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX950-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -4317,16 +4281,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_fp8_fp8(ptr addrspace(1) %ar
; GFX942-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX942-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX942-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX942-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX942-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -4382,16 +4344,14 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x32_fp8_fp8(ptr addrspace(1) %ar
; GFX950-SDAG-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x2c
; GFX950-SDAG-NEXT: s_load_dwordx2 s[24:25], s[4:5], 0x24
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v22, s16
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
; GFX950-SDAG-NEXT: s_load_dwordx16 s[0:15], s[24:25], 0x0
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v23, s17
; GFX950-SDAG-NEXT: v_mov_b32_e32 v18, s18
; GFX950-SDAG-NEXT: v_mov_b32_e32 v19, s19
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v20, s20
+; GFX950-SDAG-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
+; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v21, s21
-; GFX950-SDAG-NEXT: v_mov_b32_e32 v16, s22
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX950-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
index 55c076375fac4..8bd06f83db06d 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
@@ -109,14 +109,11 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16(<8 x bfloat> %arg0, <8 x
; AGPR-NEXT: v_mov_b32_e32 v16, s16
; AGPR-NEXT: v_mov_b32_e32 v17, s17
; AGPR-NEXT: v_mfma_f32_32x32x16_bf16 a[16:31], v[8:11], v[12:15], a[0:15]
-; AGPR-NEXT: v_mov_b32_e32 v18, s18
-; AGPR-NEXT: v_mov_b32_e32 v19, s19
-; AGPR-NEXT: v_mov_b32_e32 v8, s20
-; AGPR-NEXT: v_mov_b32_e32 v9, s21
-; AGPR-NEXT: v_mov_b32_e32 v10, s22
-; AGPR-NEXT: v_mov_b32_e32 v11, s23
+; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
+; AGPR-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
+; AGPR-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
; AGPR-NEXT: v_mov_b64_e32 v[6:7], 0
-; AGPR-NEXT: s_nop 4
+; AGPR-NEXT: s_nop 7
; AGPR-NEXT: global_store_dwordx4 v[0:1], a[28:31], off sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: global_store_dwordx4 v[2:3], a[24:27], off sc0 sc1
@@ -129,17 +126,13 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16(<8 x bfloat> %arg0, <8 x
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: global_store_dwordx4 v[0:1], v[8:11], off sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
-; AGPR-NEXT: v_mov_b32_e32 v0, s8
-; AGPR-NEXT: v_mov_b32_e32 v1, s9
-; AGPR-NEXT: v_mov_b32_e32 v2, s10
-; AGPR-NEXT: v_mov_b32_e32 v3, s11
+; AGPR-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; AGPR-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; AGPR-NEXT: global_store_dwordx4 v[6:7], v[0:3], off sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: s_nop 0
-; AGPR-NEXT: v_mov_b32_e32 v0, s12
-; AGPR-NEXT: v_mov_b32_e32 v1, s13
-; AGPR-NEXT: v_mov_b32_e32 v2, s14
-; AGPR-NEXT: v_mov_b32_e32 v3, s15
+; AGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; AGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; AGPR-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: s_endpgm
@@ -167,10 +160,9 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16(<8 x bfloat> %arg0, <8 x
; VGPR-NEXT: v_mov_b32_e32 v48, s16
; VGPR-NEXT: v_mov_b32_e32 v49, s17
; VGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[16:31], v[40:43], v[44:47], v[0:15]
-; VGPR-NEXT: v_mov_b32_e32 v50, s18
-; VGPR-NEXT: v_mov_b32_e32 v51, s19
+; VGPR-NEXT: v_mov_b64_e32 v[50:51], s[18:19]
; VGPR-NEXT: v_mov_b64_e32 v[38:39], 0
-; VGPR-NEXT: s_nop 8
+; VGPR-NEXT: s_nop 9
; VGPR-NEXT: global_store_dwordx4 v[32:33], v[28:31], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: global_store_dwordx4 v[34:35], v[24:27], off sc0 sc1
@@ -179,26 +171,20 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16(<8 x bfloat> %arg0, <8 x
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: global_store_dwordx4 v[38:39], v[16:19], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
-; VGPR-NEXT: v_mov_b32_e32 v0, s20
-; VGPR-NEXT: v_mov_b32_e32 v1, s21
-; VGPR-NEXT: v_mov_b32_e32 v2, s22
-; VGPR-NEXT: v_mov_b32_e32 v3, s23
+; VGPR-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; VGPR-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; VGPR-NEXT: global_store_dwordx4 v[34:35], v[48:51], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_nop 0
-; VGPR-NEXT: v_mov_b32_e32 v0, s8
-; VGPR-NEXT: v_mov_b32_e32 v1, s9
-; VGPR-NEXT: v_mov_b32_e32 v2, s10
-; VGPR-NEXT: v_mov_b32_e32 v3, s11
+; VGPR-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; VGPR-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; VGPR-NEXT: global_store_dwordx4 v[38:39], v[0:3], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_nop 0
-; VGPR-NEXT: v_mov_b32_e32 v0, s12
-; VGPR-NEXT: v_mov_b32_e32 v1, s13
-; VGPR-NEXT: v_mov_b32_e32 v2, s14
-; VGPR-NEXT: v_mov_b32_e32 v3, s15
+; VGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; VGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; VGPR-NEXT: global_store_dwordx4 v[36:37], v[0:3], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_endpgm
@@ -306,14 +292,11 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16__flags(<8 x bfloat> %arg0
; AGPR-NEXT: v_mov_b32_e32 v16, s16
; AGPR-NEXT: v_mov_b32_e32 v17, s17
; AGPR-NEXT: v_mfma_f32_32x32x16_bf16 a[16:31], v[8:11], v[12:15], a[0:15] cbsz:2 abid:3 blgp:1
-; AGPR-NEXT: v_mov_b32_e32 v18, s18
-; AGPR-NEXT: v_mov_b32_e32 v19, s19
-; AGPR-NEXT: v_mov_b32_e32 v8, s20
-; AGPR-NEXT: v_mov_b32_e32 v9, s21
-; AGPR-NEXT: v_mov_b32_e32 v10, s22
-; AGPR-NEXT: v_mov_b32_e32 v11, s23
+; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
+; AGPR-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
+; AGPR-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
; AGPR-NEXT: v_mov_b64_e32 v[6:7], 0
-; AGPR-NEXT: s_nop 4
+; AGPR-NEXT: s_nop 7
; AGPR-NEXT: global_store_dwordx4 v[0:1], a[28:31], off sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: global_store_dwordx4 v[2:3], a[24:27], off sc0 sc1
@@ -326,17 +309,13 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16__flags(<8 x bfloat> %arg0
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: global_store_dwordx4 v[0:1], v[8:11], off sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
-; AGPR-NEXT: v_mov_b32_e32 v0, s8
-; AGPR-NEXT: v_mov_b32_e32 v1, s9
-; AGPR-NEXT: v_mov_b32_e32 v2, s10
-; AGPR-NEXT: v_mov_b32_e32 v3, s11
+; AGPR-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; AGPR-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; AGPR-NEXT: global_store_dwordx4 v[6:7], v[0:3], off sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: s_nop 0
-; AGPR-NEXT: v_mov_b32_e32 v0, s12
-; AGPR-NEXT: v_mov_b32_e32 v1, s13
-; AGPR-NEXT: v_mov_b32_e32 v2, s14
-; AGPR-NEXT: v_mov_b32_e32 v3, s15
+; AGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; AGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; AGPR-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: s_endpgm
@@ -364,10 +343,9 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16__flags(<8 x bfloat> %arg0
; VGPR-NEXT: v_mov_b32_e32 v48, s16
; VGPR-NEXT: v_mov_b32_e32 v49, s17
; VGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[16:31], v[40:43], v[44:47], v[0:15] cbsz:2 abid:3 blgp:1
-; VGPR-NEXT: v_mov_b32_e32 v50, s18
-; VGPR-NEXT: v_mov_b32_e32 v51, s19
+; VGPR-NEXT: v_mov_b64_e32 v[50:51], s[18:19]
; VGPR-NEXT: v_mov_b64_e32 v[38:39], 0
-; VGPR-NEXT: s_nop 8
+; VGPR-NEXT: s_nop 9
; VGPR-NEXT: global_store_dwordx4 v[32:33], v[28:31], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: global_store_dwordx4 v[34:35], v[24:27], off sc0 sc1
@@ -376,26 +354,20 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16__flags(<8 x bfloat> %arg0
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: global_store_dwordx4 v[38:39], v[16:19], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
-; VGPR-NEXT: v_mov_b32_e32 v0, s20
-; VGPR-NEXT: v_mov_b32_e32 v1, s21
-; VGPR-NEXT: v_mov_b32_e32 v2, s22
-; VGPR-NEXT: v_mov_b32_e32 v3, s23
+; VGPR-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; VGPR-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; VGPR-NEXT: global_store_dwordx4 v[34:35], v[48:51], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_nop 0
-; VGPR-NEXT: v_mov_b32_e32 v0, s8
-; VGPR-NEXT: v_mov_b32_e32 v1, s9
-; VGPR-NEXT: v_mov_b32_e32 v2, s10
-; VGPR-NEXT: v_mov_b32_e32 v3, s11
+; VGPR-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; VGPR-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; VGPR-NEXT: global_store_dwordx4 v[38:39], v[0:3], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_nop 0
-; VGPR-NEXT: v_mov_b32_e32 v0, s12
-; VGPR-NEXT: v_mov_b32_e32 v1, s13
-; VGPR-NEXT: v_mov_b32_e32 v2, s14
-; VGPR-NEXT: v_mov_b32_e32 v3, s15
+; VGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; VGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; VGPR-NEXT: global_store_dwordx4 v[36:37], v[0:3], off sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_endpgm
@@ -491,22 +463,14 @@ define <16 x float> @test_mfma_f32_32x32x16_bf16__mac(<8 x bfloat> %arg0, <8 x b
; VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[8:23], v[0:3], v[4:7], v[8:23]
; VGPR-NEXT: s_nop 11
-; VGPR-NEXT: v_mov_b32_e32 v0, v8
-; VGPR-NEXT: v_mov_b32_e32 v1, v9
-; VGPR-NEXT: v_mov_b32_e32 v2, v10
-; VGPR-NEXT: v_mov_b32_e32 v3, v11
-; VGPR-NEXT: v_mov_b32_e32 v4, v12
-; VGPR-NEXT: v_mov_b32_e32 v5, v13
-; VGPR-NEXT: v_mov_b32_e32 v6, v14
-; VGPR-NEXT: v_mov_b32_e32 v7, v15
-; VGPR-NEXT: v_mov_b32_e32 v8, v16
-; VGPR-NEXT: v_mov_b32_e32 v9, v17
-; VGPR-NEXT: v_mov_b32_e32 v10, v18
-; VGPR-NEXT: v_mov_b32_e32 v11, v19
-; VGPR-NEXT: v_mov_b32_e32 v12, v20
-; VGPR-NEXT: v_mov_b32_e32 v13, v21
-; VGPR-NEXT: v_mov_b32_e32 v14, v22
-; VGPR-NEXT: v_mov_b32_e32 v15, v23
+; VGPR-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; VGPR-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; VGPR-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; VGPR-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; VGPR-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; VGPR-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; VGPR-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; VGPR-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.f32.32x32x16.bf16(<8 x bfloat> %arg0, <8 x bfloat> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0)
ret <16 x float> %result
@@ -598,22 +562,14 @@ define <16 x float> @test_mfma_f32_32x32x16_bf16__mac__flags(<8 x bfloat> %arg0,
; VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[8:23], v[0:3], v[4:7], v[8:23] cbsz:1 abid:1 blgp:1
; VGPR-NEXT: s_nop 11
-; VGPR-NEXT: v_mov_b32_e32 v0, v8
-; VGPR-NEXT: v_mov_b32_e32 v1, v9
-; VGPR-NEXT: v_mov_b32_e32 v2, v10
-; VGPR-NEXT: v_mov_b32_e32 v3, v11
-; VGPR-NEXT: v_mov_b32_e32 v4, v12
-; VGPR-NEXT: v_mov_b32_e32 v5, v13
-; VGPR-NEXT: v_mov_b32_e32 v6, v14
-; VGPR-NEXT: v_mov_b32_e32 v7, v15
-; VGPR-NEXT: v_mov_b32_e32 v8, v16
-; VGPR-NEXT: v_mov_b32_e32 v9, v17
-; VGPR-NEXT: v_mov_b32_e32 v10, v18
-; VGPR-NEXT: v_mov_b32_e32 v11, v19
-; VGPR-NEXT: v_mov_b32_e32 v12, v20
-; VGPR-NEXT: v_mov_b32_e32 v13, v21
-; VGPR-NEXT: v_mov_b32_e32 v14, v22
-; VGPR-NEXT: v_mov_b32_e32 v15, v23
+; VGPR-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; VGPR-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; VGPR-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; VGPR-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; VGPR-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; VGPR-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; VGPR-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; VGPR-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.f32.32x32x16.bf16(<8 x bfloat> %arg0, <8 x bfloat> %arg1, <16 x float> %arg2, i32 1, i32 1, i32 1)
ret <16 x float> %result
@@ -696,32 +652,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16__vgprcd(<8 x bfloat> %arg
; AGPR-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; AGPR-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; AGPR-NEXT: v_mov_b32_e32 v32, s20
-; AGPR-NEXT: v_mov_b32_e32 v33, s21
-; AGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[0:15], v[38:41], v[42:45], v[16:31]
+; AGPR-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; AGPR-NEXT: v_mov_b32_e32 v34, s22
+; AGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[0:15], v[38:41], v[42:45], v[16:31]
; AGPR-NEXT: v_mov_b32_e32 v35, s23
; AGPR-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
-; AGPR-NEXT: s_nop 2
-; AGPR-NEXT: v_mov_b32_e32 v16, s16
-; AGPR-NEXT: v_mov_b32_e32 v17, s17
-; AGPR-NEXT: v_mov_b32_e32 v18, s18
-; AGPR-NEXT: v_mov_b32_e32 v19, s19
+; AGPR-NEXT: s_nop 3
+; AGPR-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; AGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: s_nop 0
-; AGPR-NEXT: v_mov_b32_e32 v16, s12
-; AGPR-NEXT: v_mov_b32_e32 v17, s13
-; AGPR-NEXT: v_mov_b32_e32 v18, s14
-; AGPR-NEXT: v_mov_b32_e32 v19, s15
+; AGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; AGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: s_nop 0
-; AGPR-NEXT: v_mov_b32_e32 v16, s8
-; AGPR-NEXT: v_mov_b32_e32 v17, s9
-; AGPR-NEXT: v_mov_b32_e32 v18, s10
-; AGPR-NEXT: v_mov_b32_e32 v19, s11
+; AGPR-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; AGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -753,32 +702,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16__vgprcd(<8 x bfloat> %arg
; VGPR-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; VGPR-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPR-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; VGPR-NEXT: v_mov_b32_e32 v32, s20
-; VGPR-NEXT: v_mov_b32_e32 v33, s21
-; VGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[0:15], v[38:41], v[42:45], v[16:31]
+; VGPR-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; VGPR-NEXT: v_mov_b32_e32 v34, s22
+; VGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[0:15], v[38:41], v[42:45], v[16:31]
; VGPR-NEXT: v_mov_b32_e32 v35, s23
; VGPR-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
-; VGPR-NEXT: s_nop 2
-; VGPR-NEXT: v_mov_b32_e32 v16, s16
-; VGPR-NEXT: v_mov_b32_e32 v17, s17
-; VGPR-NEXT: v_mov_b32_e32 v18, s18
-; VGPR-NEXT: v_mov_b32_e32 v19, s19
+; VGPR-NEXT: s_nop 3
+; VGPR-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; VGPR-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; VGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_nop 0
-; VGPR-NEXT: v_mov_b32_e32 v16, s12
-; VGPR-NEXT: v_mov_b32_e32 v17, s13
-; VGPR-NEXT: v_mov_b32_e32 v18, s14
-; VGPR-NEXT: v_mov_b32_e32 v19, s15
+; VGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; VGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; VGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_nop 0
-; VGPR-NEXT: v_mov_b32_e32 v16, s8
-; VGPR-NEXT: v_mov_b32_e32 v17, s9
-; VGPR-NEXT: v_mov_b32_e32 v18, s10
-; VGPR-NEXT: v_mov_b32_e32 v19, s11
+; VGPR-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; VGPR-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -873,32 +815,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16__vgprcd__flags(<8 x bfloa
; AGPR-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; AGPR-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; AGPR-NEXT: v_mov_b32_e32 v32, s20
-; AGPR-NEXT: v_mov_b32_e32 v33, s21
-; AGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
+; AGPR-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; AGPR-NEXT: v_mov_b32_e32 v34, s22
+; AGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
; AGPR-NEXT: v_mov_b32_e32 v35, s23
; AGPR-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
-; AGPR-NEXT: s_nop 2
-; AGPR-NEXT: v_mov_b32_e32 v16, s16
-; AGPR-NEXT: v_mov_b32_e32 v17, s17
-; AGPR-NEXT: v_mov_b32_e32 v18, s18
-; AGPR-NEXT: v_mov_b32_e32 v19, s19
+; AGPR-NEXT: s_nop 3
+; AGPR-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; AGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: s_nop 0
-; AGPR-NEXT: v_mov_b32_e32 v16, s12
-; AGPR-NEXT: v_mov_b32_e32 v17, s13
-; AGPR-NEXT: v_mov_b32_e32 v18, s14
-; AGPR-NEXT: v_mov_b32_e32 v19, s15
+; AGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; AGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: s_nop 0
-; AGPR-NEXT: v_mov_b32_e32 v16, s8
-; AGPR-NEXT: v_mov_b32_e32 v17, s9
-; AGPR-NEXT: v_mov_b32_e32 v18, s10
-; AGPR-NEXT: v_mov_b32_e32 v19, s11
+; AGPR-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; AGPR-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; AGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; AGPR-NEXT: s_waitcnt vmcnt(0)
; AGPR-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -930,32 +865,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_bf16__vgprcd__flags(<8 x bfloa
; VGPR-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; VGPR-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPR-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; VGPR-NEXT: v_mov_b32_e32 v32, s20
-; VGPR-NEXT: v_mov_b32_e32 v33, s21
-; VGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
+; VGPR-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; VGPR-NEXT: v_mov_b32_e32 v34, s22
+; VGPR-NEXT: v_mfma_f32_32x32x16_bf16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
; VGPR-NEXT: v_mov_b32_e32 v35, s23
; VGPR-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
-; VGPR-NEXT: s_nop 2
-; VGPR-NEXT: v_mov_b32_e32 v16, s16
-; VGPR-NEXT: v_mov_b32_e32 v17, s17
-; VGPR-NEXT: v_mov_b32_e32 v18, s18
-; VGPR-NEXT: v_mov_b32_e32 v19, s19
+; VGPR-NEXT: s_nop 3
+; VGPR-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; VGPR-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; VGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_nop 0
-; VGPR-NEXT: v_mov_b32_e32 v16, s12
-; VGPR-NEXT: v_mov_b32_e32 v17, s13
-; VGPR-NEXT: v_mov_b32_e32 v18, s14
-; VGPR-NEXT: v_mov_b32_e32 v19, s15
+; VGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; VGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; VGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: s_nop 0
-; VGPR-NEXT: v_mov_b32_e32 v16, s8
-; VGPR-NEXT: v_mov_b32_e32 v17, s9
-; VGPR-NEXT: v_mov_b32_e32 v18, s10
-; VGPR-NEXT: v_mov_b32_e32 v19, s11
+; VGPR-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; VGPR-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPR-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; VGPR-NEXT: s_waitcnt vmcnt(0)
; VGPR-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
index a1fe463de1c54..427bf0899b8f2 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
@@ -381,10 +381,9 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16(<8 x half> %arg0, <8 x hal
; SDAG-NEXT: v_mov_b32_e32 v48, s16
; SDAG-NEXT: v_mov_b32_e32 v49, s17
; SDAG-NEXT: v_mfma_f32_32x32x16_f16 v[16:31], v[40:43], v[44:47], v[0:15]
-; SDAG-NEXT: v_mov_b32_e32 v50, s18
-; SDAG-NEXT: v_mov_b32_e32 v51, s19
+; SDAG-NEXT: v_mov_b64_e32 v[50:51], s[18:19]
; SDAG-NEXT: v_mov_b64_e32 v[38:39], 0
-; SDAG-NEXT: s_nop 8
+; SDAG-NEXT: s_nop 9
; SDAG-NEXT: global_store_dwordx4 v[32:33], v[28:31], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v[34:35], v[24:27], off sc0 sc1
@@ -393,26 +392,20 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16(<8 x half> %arg0, <8 x hal
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v[38:39], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s20
-; SDAG-NEXT: v_mov_b32_e32 v1, s21
-; SDAG-NEXT: v_mov_b32_e32 v2, s22
-; SDAG-NEXT: v_mov_b32_e32 v3, s23
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; SDAG-NEXT: global_store_dwordx4 v[34:35], v[48:51], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v[38:39], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v[36:37], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_endpgm
@@ -499,14 +492,11 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16(<8 x half> %arg0, <8 x hal
; HEURRC-NEXT: v_mov_b32_e32 v16, s16
; HEURRC-NEXT: v_mov_b32_e32 v17, s17
; HEURRC-NEXT: v_mfma_f32_32x32x16_f16 a[16:31], v[8:11], v[12:15], a[0:15]
-; HEURRC-NEXT: v_mov_b32_e32 v18, s18
-; HEURRC-NEXT: v_mov_b32_e32 v19, s19
-; HEURRC-NEXT: v_mov_b32_e32 v8, s20
-; HEURRC-NEXT: v_mov_b32_e32 v9, s21
-; HEURRC-NEXT: v_mov_b32_e32 v10, s22
-; HEURRC-NEXT: v_mov_b32_e32 v11, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
; HEURRC-NEXT: v_mov_b64_e32 v[6:7], 0
-; HEURRC-NEXT: s_nop 4
+; HEURRC-NEXT: s_nop 7
; HEURRC-NEXT: global_store_dwordx4 v[0:1], a[28:31], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v[2:3], a[24:27], off sc0 sc1
@@ -519,17 +509,13 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16(<8 x half> %arg0, <8 x hal
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v[0:1], v[8:11], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v0, s8
-; HEURRC-NEXT: v_mov_b32_e32 v1, s9
-; HEURRC-NEXT: v_mov_b32_e32 v2, s10
-; HEURRC-NEXT: v_mov_b32_e32 v3, s11
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; HEURRC-NEXT: global_store_dwordx4 v[6:7], v[0:3], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v0, s12
-; HEURRC-NEXT: v_mov_b32_e32 v1, s13
-; HEURRC-NEXT: v_mov_b32_e32 v2, s14
-; HEURRC-NEXT: v_mov_b32_e32 v3, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; HEURRC-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_endpgm
@@ -557,10 +543,9 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16(<8 x half> %arg0, <8 x hal
; VGPRRC-NEXT: v_mov_b32_e32 v48, s16
; VGPRRC-NEXT: v_mov_b32_e32 v49, s17
; VGPRRC-NEXT: v_mfma_f32_32x32x16_f16 v[16:31], v[40:43], v[44:47], v[0:15]
-; VGPRRC-NEXT: v_mov_b32_e32 v50, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v51, s19
+; VGPRRC-NEXT: v_mov_b64_e32 v[50:51], s[18:19]
; VGPRRC-NEXT: v_mov_b64_e32 v[38:39], 0
-; VGPRRC-NEXT: s_nop 8
+; VGPRRC-NEXT: s_nop 9
; VGPRRC-NEXT: global_store_dwordx4 v[32:33], v[28:31], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v[34:35], v[24:27], off sc0 sc1
@@ -569,26 +554,20 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16(<8 x half> %arg0, <8 x hal
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v[38:39], v[16:19], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; VGPRRC-NEXT: global_store_dwordx4 v[34:35], v[48:51], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; VGPRRC-NEXT: global_store_dwordx4 v[38:39], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; VGPRRC-NEXT: global_store_dwordx4 v[36:37], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_endpgm
@@ -747,10 +726,9 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__flags(<8 x half> %arg0, <
; SDAG-NEXT: v_mov_b32_e32 v48, s16
; SDAG-NEXT: v_mov_b32_e32 v49, s17
; SDAG-NEXT: v_mfma_f32_32x32x16_f16 v[16:31], v[40:43], v[44:47], v[0:15] cbsz:2 abid:3 blgp:1
-; SDAG-NEXT: v_mov_b32_e32 v50, s18
-; SDAG-NEXT: v_mov_b32_e32 v51, s19
+; SDAG-NEXT: v_mov_b64_e32 v[50:51], s[18:19]
; SDAG-NEXT: v_mov_b64_e32 v[38:39], 0
-; SDAG-NEXT: s_nop 8
+; SDAG-NEXT: s_nop 9
; SDAG-NEXT: global_store_dwordx4 v[32:33], v[28:31], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v[34:35], v[24:27], off sc0 sc1
@@ -759,26 +737,20 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__flags(<8 x half> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v[38:39], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s20
-; SDAG-NEXT: v_mov_b32_e32 v1, s21
-; SDAG-NEXT: v_mov_b32_e32 v2, s22
-; SDAG-NEXT: v_mov_b32_e32 v3, s23
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; SDAG-NEXT: global_store_dwordx4 v[34:35], v[48:51], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v[38:39], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v[36:37], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_endpgm
@@ -865,14 +837,11 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__flags(<8 x half> %arg0, <
; HEURRC-NEXT: v_mov_b32_e32 v16, s16
; HEURRC-NEXT: v_mov_b32_e32 v17, s17
; HEURRC-NEXT: v_mfma_f32_32x32x16_f16 a[16:31], v[8:11], v[12:15], a[0:15] cbsz:2 abid:3 blgp:1
-; HEURRC-NEXT: v_mov_b32_e32 v18, s18
-; HEURRC-NEXT: v_mov_b32_e32 v19, s19
-; HEURRC-NEXT: v_mov_b32_e32 v8, s20
-; HEURRC-NEXT: v_mov_b32_e32 v9, s21
-; HEURRC-NEXT: v_mov_b32_e32 v10, s22
-; HEURRC-NEXT: v_mov_b32_e32 v11, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
; HEURRC-NEXT: v_mov_b64_e32 v[6:7], 0
-; HEURRC-NEXT: s_nop 4
+; HEURRC-NEXT: s_nop 7
; HEURRC-NEXT: global_store_dwordx4 v[0:1], a[28:31], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v[2:3], a[24:27], off sc0 sc1
@@ -885,17 +854,13 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__flags(<8 x half> %arg0, <
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v[0:1], v[8:11], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v0, s8
-; HEURRC-NEXT: v_mov_b32_e32 v1, s9
-; HEURRC-NEXT: v_mov_b32_e32 v2, s10
-; HEURRC-NEXT: v_mov_b32_e32 v3, s11
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; HEURRC-NEXT: global_store_dwordx4 v[6:7], v[0:3], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v0, s12
-; HEURRC-NEXT: v_mov_b32_e32 v1, s13
-; HEURRC-NEXT: v_mov_b32_e32 v2, s14
-; HEURRC-NEXT: v_mov_b32_e32 v3, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; HEURRC-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_endpgm
@@ -923,10 +888,9 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__flags(<8 x half> %arg0, <
; VGPRRC-NEXT: v_mov_b32_e32 v48, s16
; VGPRRC-NEXT: v_mov_b32_e32 v49, s17
; VGPRRC-NEXT: v_mfma_f32_32x32x16_f16 v[16:31], v[40:43], v[44:47], v[0:15] cbsz:2 abid:3 blgp:1
-; VGPRRC-NEXT: v_mov_b32_e32 v50, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v51, s19
+; VGPRRC-NEXT: v_mov_b64_e32 v[50:51], s[18:19]
; VGPRRC-NEXT: v_mov_b64_e32 v[38:39], 0
-; VGPRRC-NEXT: s_nop 8
+; VGPRRC-NEXT: s_nop 9
; VGPRRC-NEXT: global_store_dwordx4 v[32:33], v[28:31], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v[34:35], v[24:27], off sc0 sc1
@@ -935,26 +899,20 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__flags(<8 x half> %arg0, <
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v[38:39], v[16:19], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; VGPRRC-NEXT: global_store_dwordx4 v[34:35], v[48:51], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; VGPRRC-NEXT: global_store_dwordx4 v[38:39], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; VGPRRC-NEXT: global_store_dwordx4 v[36:37], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_endpgm
@@ -1095,22 +1053,14 @@ define <16 x float> @test_mfma_f32_32x32x16_f16__mac(<8 x half> %arg0, <8 x half
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x16_f16 v[8:23], v[0:3], v[4:7], v[8:23]
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v8
-; GCN-NEXT: v_mov_b32_e32 v1, v9
-; GCN-NEXT: v_mov_b32_e32 v2, v10
-; GCN-NEXT: v_mov_b32_e32 v3, v11
-; GCN-NEXT: v_mov_b32_e32 v4, v12
-; GCN-NEXT: v_mov_b32_e32 v5, v13
-; GCN-NEXT: v_mov_b32_e32 v6, v14
-; GCN-NEXT: v_mov_b32_e32 v7, v15
-; GCN-NEXT: v_mov_b32_e32 v8, v16
-; GCN-NEXT: v_mov_b32_e32 v9, v17
-; GCN-NEXT: v_mov_b32_e32 v10, v18
-; GCN-NEXT: v_mov_b32_e32 v11, v19
-; GCN-NEXT: v_mov_b32_e32 v12, v20
-; GCN-NEXT: v_mov_b32_e32 v13, v21
-; GCN-NEXT: v_mov_b32_e32 v14, v22
-; GCN-NEXT: v_mov_b32_e32 v15, v23
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; HEURRC-LABEL: test_mfma_f32_32x32x16_f16__mac:
@@ -1158,22 +1108,14 @@ define <16 x float> @test_mfma_f32_32x32x16_f16__mac(<8 x half> %arg0, <8 x half
; VGPRRC-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VGPRRC-NEXT: v_mfma_f32_32x32x16_f16 v[8:23], v[0:3], v[4:7], v[8:23]
; VGPRRC-NEXT: s_nop 11
-; VGPRRC-NEXT: v_mov_b32_e32 v0, v8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, v9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, v10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, v11
-; VGPRRC-NEXT: v_mov_b32_e32 v4, v12
-; VGPRRC-NEXT: v_mov_b32_e32 v5, v13
-; VGPRRC-NEXT: v_mov_b32_e32 v6, v14
-; VGPRRC-NEXT: v_mov_b32_e32 v7, v15
-; VGPRRC-NEXT: v_mov_b32_e32 v8, v16
-; VGPRRC-NEXT: v_mov_b32_e32 v9, v17
-; VGPRRC-NEXT: v_mov_b32_e32 v10, v18
-; VGPRRC-NEXT: v_mov_b32_e32 v11, v19
-; VGPRRC-NEXT: v_mov_b32_e32 v12, v20
-; VGPRRC-NEXT: v_mov_b32_e32 v13, v21
-; VGPRRC-NEXT: v_mov_b32_e32 v14, v22
-; VGPRRC-NEXT: v_mov_b32_e32 v15, v23
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; VGPRRC-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; VGPRRC-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; VGPRRC-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; VGPRRC-NEXT: s_setpc_b64 s[30:31]
; AGPR-LABEL: test_mfma_f32_32x32x16_f16__mac:
; AGPR: ; %bb.0:
@@ -1248,22 +1190,14 @@ define <16 x float> @test_mfma_f32_32x32x16_f16__mac__flags(<8 x half> %arg0, <8
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x16_f16 v[8:23], v[0:3], v[4:7], v[8:23] cbsz:1 abid:1 blgp:1
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v8
-; GCN-NEXT: v_mov_b32_e32 v1, v9
-; GCN-NEXT: v_mov_b32_e32 v2, v10
-; GCN-NEXT: v_mov_b32_e32 v3, v11
-; GCN-NEXT: v_mov_b32_e32 v4, v12
-; GCN-NEXT: v_mov_b32_e32 v5, v13
-; GCN-NEXT: v_mov_b32_e32 v6, v14
-; GCN-NEXT: v_mov_b32_e32 v7, v15
-; GCN-NEXT: v_mov_b32_e32 v8, v16
-; GCN-NEXT: v_mov_b32_e32 v9, v17
-; GCN-NEXT: v_mov_b32_e32 v10, v18
-; GCN-NEXT: v_mov_b32_e32 v11, v19
-; GCN-NEXT: v_mov_b32_e32 v12, v20
-; GCN-NEXT: v_mov_b32_e32 v13, v21
-; GCN-NEXT: v_mov_b32_e32 v14, v22
-; GCN-NEXT: v_mov_b32_e32 v15, v23
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; HEURRC-LABEL: test_mfma_f32_32x32x16_f16__mac__flags:
@@ -1311,22 +1245,14 @@ define <16 x float> @test_mfma_f32_32x32x16_f16__mac__flags(<8 x half> %arg0, <8
; VGPRRC-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VGPRRC-NEXT: v_mfma_f32_32x32x16_f16 v[8:23], v[0:3], v[4:7], v[8:23] cbsz:1 abid:1 blgp:1
; VGPRRC-NEXT: s_nop 11
-; VGPRRC-NEXT: v_mov_b32_e32 v0, v8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, v9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, v10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, v11
-; VGPRRC-NEXT: v_mov_b32_e32 v4, v12
-; VGPRRC-NEXT: v_mov_b32_e32 v5, v13
-; VGPRRC-NEXT: v_mov_b32_e32 v6, v14
-; VGPRRC-NEXT: v_mov_b32_e32 v7, v15
-; VGPRRC-NEXT: v_mov_b32_e32 v8, v16
-; VGPRRC-NEXT: v_mov_b32_e32 v9, v17
-; VGPRRC-NEXT: v_mov_b32_e32 v10, v18
-; VGPRRC-NEXT: v_mov_b32_e32 v11, v19
-; VGPRRC-NEXT: v_mov_b32_e32 v12, v20
-; VGPRRC-NEXT: v_mov_b32_e32 v13, v21
-; VGPRRC-NEXT: v_mov_b32_e32 v14, v22
-; VGPRRC-NEXT: v_mov_b32_e32 v15, v23
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; VGPRRC-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; VGPRRC-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; VGPRRC-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; VGPRRC-NEXT: s_setpc_b64 s[30:31]
; AGPR-LABEL: test_mfma_f32_32x32x16_f16__mac__flags:
; AGPR: ; %bb.0:
@@ -1415,32 +1341,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__vgprcd(<8 x half> %arg0,
; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; SDAG-NEXT: v_mov_b32_e32 v32, s20
-; SDAG-NEXT: v_mov_b32_e32 v33, s21
-; SDAG-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31]
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; SDAG-NEXT: v_mov_b32_e32 v34, s22
+; SDAG-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31]
; SDAG-NEXT: v_mov_b32_e32 v35, s23
; SDAG-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: s_nop 2
-; SDAG-NEXT: v_mov_b32_e32 v16, s16
-; SDAG-NEXT: v_mov_b32_e32 v17, s17
-; SDAG-NEXT: v_mov_b32_e32 v18, s18
-; SDAG-NEXT: v_mov_b32_e32 v19, s19
+; SDAG-NEXT: s_nop 3
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; SDAG-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -1518,32 +1437,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__vgprcd(<8 x half> %arg0,
; HEURRC-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; HEURRC-NEXT: v_mov_b32_e32 v32, s20
-; HEURRC-NEXT: v_mov_b32_e32 v33, s21
-; HEURRC-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31]
+; HEURRC-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; HEURRC-NEXT: v_mov_b32_e32 v34, s22
+; HEURRC-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31]
; HEURRC-NEXT: v_mov_b32_e32 v35, s23
; HEURRC-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
-; HEURRC-NEXT: s_nop 2
-; HEURRC-NEXT: v_mov_b32_e32 v16, s16
-; HEURRC-NEXT: v_mov_b32_e32 v17, s17
-; HEURRC-NEXT: v_mov_b32_e32 v18, s18
-; HEURRC-NEXT: v_mov_b32_e32 v19, s19
+; HEURRC-NEXT: s_nop 3
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; HEURRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s12
-; HEURRC-NEXT: v_mov_b32_e32 v17, s13
-; HEURRC-NEXT: v_mov_b32_e32 v18, s14
-; HEURRC-NEXT: v_mov_b32_e32 v19, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; HEURRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s8
-; HEURRC-NEXT: v_mov_b32_e32 v17, s9
-; HEURRC-NEXT: v_mov_b32_e32 v18, s10
-; HEURRC-NEXT: v_mov_b32_e32 v19, s11
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; HEURRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -1575,32 +1487,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__vgprcd(<8 x half> %arg0,
; VGPRRC-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; VGPRRC-NEXT: v_mov_b32_e32 v32, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v33, s21
-; VGPRRC-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31]
+; VGPRRC-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; VGPRRC-NEXT: v_mov_b32_e32 v34, s22
+; VGPRRC-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31]
; VGPRRC-NEXT: v_mov_b32_e32 v35, s23
; VGPRRC-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
-; VGPRRC-NEXT: s_nop 2
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s16
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s17
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s19
+; VGPRRC-NEXT: s_nop 3
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; VGPRRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; VGPRRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPRRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -1757,32 +1662,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__vgprcd__flags(<8 x half>
; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; SDAG-NEXT: v_mov_b32_e32 v32, s20
-; SDAG-NEXT: v_mov_b32_e32 v33, s21
-; SDAG-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; SDAG-NEXT: v_mov_b32_e32 v34, s22
+; SDAG-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
; SDAG-NEXT: v_mov_b32_e32 v35, s23
; SDAG-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: s_nop 2
-; SDAG-NEXT: v_mov_b32_e32 v16, s16
-; SDAG-NEXT: v_mov_b32_e32 v17, s17
-; SDAG-NEXT: v_mov_b32_e32 v18, s18
-; SDAG-NEXT: v_mov_b32_e32 v19, s19
+; SDAG-NEXT: s_nop 3
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; SDAG-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -1860,32 +1758,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__vgprcd__flags(<8 x half>
; HEURRC-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; HEURRC-NEXT: v_mov_b32_e32 v32, s20
-; HEURRC-NEXT: v_mov_b32_e32 v33, s21
-; HEURRC-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
+; HEURRC-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; HEURRC-NEXT: v_mov_b32_e32 v34, s22
+; HEURRC-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
; HEURRC-NEXT: v_mov_b32_e32 v35, s23
; HEURRC-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
-; HEURRC-NEXT: s_nop 2
-; HEURRC-NEXT: v_mov_b32_e32 v16, s16
-; HEURRC-NEXT: v_mov_b32_e32 v17, s17
-; HEURRC-NEXT: v_mov_b32_e32 v18, s18
-; HEURRC-NEXT: v_mov_b32_e32 v19, s19
+; HEURRC-NEXT: s_nop 3
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; HEURRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s12
-; HEURRC-NEXT: v_mov_b32_e32 v17, s13
-; HEURRC-NEXT: v_mov_b32_e32 v18, s14
-; HEURRC-NEXT: v_mov_b32_e32 v19, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; HEURRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s8
-; HEURRC-NEXT: v_mov_b32_e32 v17, s9
-; HEURRC-NEXT: v_mov_b32_e32 v18, s10
-; HEURRC-NEXT: v_mov_b32_e32 v19, s11
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; HEURRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -1917,32 +1808,25 @@ define amdgpu_kernel void @test_mfma_f32_32x32x16_f16__vgprcd__flags(<8 x half>
; VGPRRC-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
-; VGPRRC-NEXT: v_mov_b32_e32 v32, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v33, s21
-; VGPRRC-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
+; VGPRRC-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
; VGPRRC-NEXT: v_mov_b32_e32 v34, s22
+; VGPRRC-NEXT: v_mfma_f32_32x32x16_f16 v[0:15], v[38:41], v[42:45], v[16:31] cbsz:1 abid:2 blgp:3
; VGPRRC-NEXT: v_mov_b32_e32 v35, s23
; VGPRRC-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] offset:48 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
-; VGPRRC-NEXT: s_nop 2
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s16
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s17
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s19
+; VGPRRC-NEXT: s_nop 3
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; VGPRRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:32 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; VGPRRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:16 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPRRC-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -2559,18 +2443,12 @@ define amdgpu_kernel void @test_mfma_i32_16x16x64_i8_no_agpr__vgprcd(ptr addrspa
; SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x54
; SDAG-NEXT: v_mov_b32_e32 v12, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
-; SDAG-NEXT: v_mov_b32_e32 v4, s12
-; SDAG-NEXT: v_mov_b32_e32 v5, s13
-; SDAG-NEXT: v_mov_b32_e32 v6, s14
-; SDAG-NEXT: v_mov_b32_e32 v7, s15
-; SDAG-NEXT: v_mov_b32_e32 v8, s0
-; SDAG-NEXT: v_mov_b32_e32 v9, s1
-; SDAG-NEXT: v_mov_b32_e32 v10, s2
-; SDAG-NEXT: v_mov_b32_e32 v11, s3
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_i32_16x16x64_i8 v[0:3], v[0:3], v[4:7], v[8:11]
; SDAG-NEXT: s_nop 7
@@ -2603,18 +2481,12 @@ define amdgpu_kernel void @test_mfma_i32_16x16x64_i8_no_agpr__vgprcd(ptr addrspa
; HEURRC-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x54
; HEURRC-NEXT: v_mov_b32_e32 v12, 0
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v0, s8
-; HEURRC-NEXT: v_mov_b32_e32 v1, s9
-; HEURRC-NEXT: v_mov_b32_e32 v2, s10
-; HEURRC-NEXT: v_mov_b32_e32 v3, s11
-; HEURRC-NEXT: v_mov_b32_e32 v4, s12
-; HEURRC-NEXT: v_mov_b32_e32 v5, s13
-; HEURRC-NEXT: v_mov_b32_e32 v6, s14
-; HEURRC-NEXT: v_mov_b32_e32 v7, s15
-; HEURRC-NEXT: v_mov_b32_e32 v8, s0
-; HEURRC-NEXT: v_mov_b32_e32 v9, s1
-; HEURRC-NEXT: v_mov_b32_e32 v10, s2
-; HEURRC-NEXT: v_mov_b32_e32 v11, s3
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; HEURRC-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[0:1]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
; HEURRC-NEXT: s_nop 1
; HEURRC-NEXT: v_mfma_i32_16x16x64_i8 v[0:3], v[0:3], v[4:7], v[8:11]
; HEURRC-NEXT: s_nop 7
@@ -2628,18 +2500,12 @@ define amdgpu_kernel void @test_mfma_i32_16x16x64_i8_no_agpr__vgprcd(ptr addrspa
; VGPRRC-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x54
; VGPRRC-NEXT: v_mov_b32_e32 v12, 0
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s11
-; VGPRRC-NEXT: v_mov_b32_e32 v4, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v5, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v6, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v7, s15
-; VGPRRC-NEXT: v_mov_b32_e32 v8, s0
-; VGPRRC-NEXT: v_mov_b32_e32 v9, s1
-; VGPRRC-NEXT: v_mov_b32_e32 v10, s2
-; VGPRRC-NEXT: v_mov_b32_e32 v11, s3
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; VGPRRC-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
+; VGPRRC-NEXT: v_mov_b64_e32 v[8:9], s[0:1]
+; VGPRRC-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
; VGPRRC-NEXT: s_nop 1
; VGPRRC-NEXT: v_mfma_i32_16x16x64_i8 v[0:3], v[0:3], v[4:7], v[8:11]
; VGPRRC-NEXT: s_nop 7
@@ -2706,18 +2572,12 @@ define amdgpu_kernel void @test_mfma_i32_16x16x64_i8_no_agpr__vgprcd__flags(ptr
; SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x54
; SDAG-NEXT: v_mov_b32_e32 v12, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
-; SDAG-NEXT: v_mov_b32_e32 v4, s12
-; SDAG-NEXT: v_mov_b32_e32 v5, s13
-; SDAG-NEXT: v_mov_b32_e32 v6, s14
-; SDAG-NEXT: v_mov_b32_e32 v7, s15
-; SDAG-NEXT: v_mov_b32_e32 v8, s0
-; SDAG-NEXT: v_mov_b32_e32 v9, s1
-; SDAG-NEXT: v_mov_b32_e32 v10, s2
-; SDAG-NEXT: v_mov_b32_e32 v11, s3
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_i32_16x16x64_i8 v[0:3], v[0:3], v[4:7], v[8:11] cbsz:3 abid:2 blgp:1
; SDAG-NEXT: s_nop 7
@@ -2750,18 +2610,12 @@ define amdgpu_kernel void @test_mfma_i32_16x16x64_i8_no_agpr__vgprcd__flags(ptr
; HEURRC-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x54
; HEURRC-NEXT: v_mov_b32_e32 v12, 0
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v0, s8
-; HEURRC-NEXT: v_mov_b32_e32 v1, s9
-; HEURRC-NEXT: v_mov_b32_e32 v2, s10
-; HEURRC-NEXT: v_mov_b32_e32 v3, s11
-; HEURRC-NEXT: v_mov_b32_e32 v4, s12
-; HEURRC-NEXT: v_mov_b32_e32 v5, s13
-; HEURRC-NEXT: v_mov_b32_e32 v6, s14
-; HEURRC-NEXT: v_mov_b32_e32 v7, s15
-; HEURRC-NEXT: v_mov_b32_e32 v8, s0
-; HEURRC-NEXT: v_mov_b32_e32 v9, s1
-; HEURRC-NEXT: v_mov_b32_e32 v10, s2
-; HEURRC-NEXT: v_mov_b32_e32 v11, s3
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; HEURRC-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[0:1]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
; HEURRC-NEXT: s_nop 1
; HEURRC-NEXT: v_mfma_i32_16x16x64_i8 v[0:3], v[0:3], v[4:7], v[8:11] cbsz:3 abid:2 blgp:1
; HEURRC-NEXT: s_nop 7
@@ -2775,18 +2629,12 @@ define amdgpu_kernel void @test_mfma_i32_16x16x64_i8_no_agpr__vgprcd__flags(ptr
; VGPRRC-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x54
; VGPRRC-NEXT: v_mov_b32_e32 v12, 0
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s11
-; VGPRRC-NEXT: v_mov_b32_e32 v4, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v5, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v6, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v7, s15
-; VGPRRC-NEXT: v_mov_b32_e32 v8, s0
-; VGPRRC-NEXT: v_mov_b32_e32 v9, s1
-; VGPRRC-NEXT: v_mov_b32_e32 v10, s2
-; VGPRRC-NEXT: v_mov_b32_e32 v11, s3
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; VGPRRC-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
+; VGPRRC-NEXT: v_mov_b64_e32 v[8:9], s[0:1]
+; VGPRRC-NEXT: v_mov_b64_e32 v[10:11], s[2:3]
; VGPRRC-NEXT: s_nop 1
; VGPRRC-NEXT: v_mfma_i32_16x16x64_i8 v[0:3], v[0:3], v[4:7], v[8:11] cbsz:3 abid:2 blgp:1
; VGPRRC-NEXT: s_nop 7
@@ -2859,15 +2707,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8(<4 x i32> %arg0, <4 x i32>
; SDAG-NEXT: v_mov_b64_e32 v[32:33], 48
; SDAG-NEXT: v_mov_b64_e32 v[34:35], 32
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v36, s24
-; SDAG-NEXT: v_mov_b32_e32 v37, s25
-; SDAG-NEXT: v_mov_b32_e32 v38, s26
-; SDAG-NEXT: v_mov_b32_e32 v39, s27
+; SDAG-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
-; SDAG-NEXT: v_mov_b32_e32 v40, s28
-; SDAG-NEXT: v_mov_b32_e32 v41, s29
-; SDAG-NEXT: v_mov_b32_e32 v42, s30
-; SDAG-NEXT: v_mov_b32_e32 v43, s31
+; SDAG-NEXT: v_mov_b64_e32 v[40:41], s[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[42:43], s[30:31]
; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[18:19]
; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[16:17]
@@ -2891,31 +2735,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8(<4 x i32> %arg0, <4 x i32>
; SDAG-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s16
-; SDAG-NEXT: v_mov_b32_e32 v1, s17
-; SDAG-NEXT: v_mov_b32_e32 v2, s18
-; SDAG-NEXT: v_mov_b32_e32 v3, s19
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
; SDAG-NEXT: global_store_dwordx4 v[34:35], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s20
-; SDAG-NEXT: v_mov_b32_e32 v1, s21
-; SDAG-NEXT: v_mov_b32_e32 v2, s22
-; SDAG-NEXT: v_mov_b32_e32 v3, s23
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; SDAG-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v[8:9], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_endpgm
@@ -2978,15 +2814,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8(<4 x i32> %arg0, <4 x i32>
; HEURRC-NEXT: v_mov_b64_e32 v[0:1], 48
; HEURRC-NEXT: v_mov_b64_e32 v[2:3], 32
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v4, s24
-; HEURRC-NEXT: v_mov_b32_e32 v5, s25
-; HEURRC-NEXT: v_mov_b32_e32 v6, s26
-; HEURRC-NEXT: v_mov_b32_e32 v7, s27
+; HEURRC-NEXT: v_mov_b64_e32 v[4:5], s[24:25]
+; HEURRC-NEXT: v_mov_b64_e32 v[6:7], s[26:27]
; HEURRC-NEXT: v_accvgpr_write_b32 a31, s23
-; HEURRC-NEXT: v_mov_b32_e32 v8, s28
-; HEURRC-NEXT: v_mov_b32_e32 v9, s29
-; HEURRC-NEXT: v_mov_b32_e32 v10, s30
-; HEURRC-NEXT: v_mov_b32_e32 v11, s31
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[28:29]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[30:31]
; HEURRC-NEXT: v_accvgpr_write_b32 a30, s22
; HEURRC-NEXT: v_accvgpr_write_b32 a29, s21
; HEURRC-NEXT: v_accvgpr_write_b32 a28, s20
@@ -3006,11 +2838,9 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8(<4 x i32> %arg0, <4 x i32>
; HEURRC-NEXT: v_mfma_i32_32x32x32_i8 a[0:15], v[4:7], v[8:11], a[16:31]
; HEURRC-NEXT: v_mov_b64_e32 v[4:5], 16
; HEURRC-NEXT: v_mov_b64_e32 v[6:7], 0
-; HEURRC-NEXT: v_mov_b32_e32 v8, s16
-; HEURRC-NEXT: v_mov_b32_e32 v9, s17
-; HEURRC-NEXT: v_mov_b32_e32 v10, s18
-; HEURRC-NEXT: v_mov_b32_e32 v11, s19
-; HEURRC-NEXT: s_nop 5
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[16:17]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
+; HEURRC-NEXT: s_nop 7
; HEURRC-NEXT: global_store_dwordx4 v[0:1], a[12:15], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v[2:3], a[8:11], off sc0 sc1
@@ -3021,23 +2851,17 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8(<4 x i32> %arg0, <4 x i32>
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v[2:3], v[8:11], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v2, s10
-; HEURRC-NEXT: v_mov_b32_e32 v3, s11
-; HEURRC-NEXT: v_mov_b32_e32 v8, s20
-; HEURRC-NEXT: v_mov_b32_e32 v9, s21
-; HEURRC-NEXT: v_mov_b32_e32 v10, s22
-; HEURRC-NEXT: v_mov_b32_e32 v11, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
; HEURRC-NEXT: global_store_dwordx4 v[0:1], v[8:11], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v0, s8
-; HEURRC-NEXT: v_mov_b32_e32 v1, s9
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; HEURRC-NEXT: global_store_dwordx4 v[6:7], v[0:3], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v0, s12
-; HEURRC-NEXT: v_mov_b32_e32 v1, s13
-; HEURRC-NEXT: v_mov_b32_e32 v2, s14
-; HEURRC-NEXT: v_mov_b32_e32 v3, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; HEURRC-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_endpgm
@@ -3049,15 +2873,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8(<4 x i32> %arg0, <4 x i32>
; VGPRRC-NEXT: v_mov_b64_e32 v[32:33], 48
; VGPRRC-NEXT: v_mov_b64_e32 v[34:35], 32
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v36, s24
-; VGPRRC-NEXT: v_mov_b32_e32 v37, s25
-; VGPRRC-NEXT: v_mov_b32_e32 v38, s26
-; VGPRRC-NEXT: v_mov_b32_e32 v39, s27
+; VGPRRC-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; VGPRRC-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; VGPRRC-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
-; VGPRRC-NEXT: v_mov_b32_e32 v40, s28
-; VGPRRC-NEXT: v_mov_b32_e32 v41, s29
-; VGPRRC-NEXT: v_mov_b32_e32 v42, s30
-; VGPRRC-NEXT: v_mov_b32_e32 v43, s31
+; VGPRRC-NEXT: v_mov_b64_e32 v[40:41], s[28:29]
+; VGPRRC-NEXT: v_mov_b64_e32 v[42:43], s[30:31]
; VGPRRC-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
; VGPRRC-NEXT: v_mov_b64_e32 v[26:27], s[18:19]
; VGPRRC-NEXT: v_mov_b64_e32 v[24:25], s[16:17]
@@ -3081,31 +2901,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8(<4 x i32> %arg0, <4 x i32>
; VGPRRC-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s16
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s17
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s19
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
; VGPRRC-NEXT: global_store_dwordx4 v[34:35], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; VGPRRC-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; VGPRRC-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; VGPRRC-NEXT: global_store_dwordx4 v[8:9], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_endpgm
@@ -3260,15 +3072,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__flags(<4 x i32> %arg0, <4
; SDAG-NEXT: v_mov_b64_e32 v[32:33], 48
; SDAG-NEXT: v_mov_b64_e32 v[34:35], 32
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v36, s24
-; SDAG-NEXT: v_mov_b32_e32 v37, s25
-; SDAG-NEXT: v_mov_b32_e32 v38, s26
-; SDAG-NEXT: v_mov_b32_e32 v39, s27
+; SDAG-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
-; SDAG-NEXT: v_mov_b32_e32 v40, s28
-; SDAG-NEXT: v_mov_b32_e32 v41, s29
-; SDAG-NEXT: v_mov_b32_e32 v42, s30
-; SDAG-NEXT: v_mov_b32_e32 v43, s31
+; SDAG-NEXT: v_mov_b64_e32 v[40:41], s[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[42:43], s[30:31]
; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[18:19]
; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[16:17]
@@ -3292,31 +3100,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__flags(<4 x i32> %arg0, <4
; SDAG-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s16
-; SDAG-NEXT: v_mov_b32_e32 v1, s17
-; SDAG-NEXT: v_mov_b32_e32 v2, s18
-; SDAG-NEXT: v_mov_b32_e32 v3, s19
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
; SDAG-NEXT: global_store_dwordx4 v[34:35], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s20
-; SDAG-NEXT: v_mov_b32_e32 v1, s21
-; SDAG-NEXT: v_mov_b32_e32 v2, s22
-; SDAG-NEXT: v_mov_b32_e32 v3, s23
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; SDAG-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v[8:9], v[0:3], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_endpgm
@@ -3379,15 +3179,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__flags(<4 x i32> %arg0, <4
; HEURRC-NEXT: v_mov_b64_e32 v[0:1], 48
; HEURRC-NEXT: v_mov_b64_e32 v[2:3], 32
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v4, s24
-; HEURRC-NEXT: v_mov_b32_e32 v5, s25
-; HEURRC-NEXT: v_mov_b32_e32 v6, s26
-; HEURRC-NEXT: v_mov_b32_e32 v7, s27
+; HEURRC-NEXT: v_mov_b64_e32 v[4:5], s[24:25]
+; HEURRC-NEXT: v_mov_b64_e32 v[6:7], s[26:27]
; HEURRC-NEXT: v_accvgpr_write_b32 a31, s23
-; HEURRC-NEXT: v_mov_b32_e32 v8, s28
-; HEURRC-NEXT: v_mov_b32_e32 v9, s29
-; HEURRC-NEXT: v_mov_b32_e32 v10, s30
-; HEURRC-NEXT: v_mov_b32_e32 v11, s31
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[28:29]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[30:31]
; HEURRC-NEXT: v_accvgpr_write_b32 a30, s22
; HEURRC-NEXT: v_accvgpr_write_b32 a29, s21
; HEURRC-NEXT: v_accvgpr_write_b32 a28, s20
@@ -3407,11 +3203,9 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__flags(<4 x i32> %arg0, <4
; HEURRC-NEXT: v_mfma_i32_32x32x32_i8 a[0:15], v[4:7], v[8:11], a[16:31] cbsz:2 abid:3 blgp:1
; HEURRC-NEXT: v_mov_b64_e32 v[4:5], 16
; HEURRC-NEXT: v_mov_b64_e32 v[6:7], 0
-; HEURRC-NEXT: v_mov_b32_e32 v8, s16
-; HEURRC-NEXT: v_mov_b32_e32 v9, s17
-; HEURRC-NEXT: v_mov_b32_e32 v10, s18
-; HEURRC-NEXT: v_mov_b32_e32 v11, s19
-; HEURRC-NEXT: s_nop 5
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[16:17]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
+; HEURRC-NEXT: s_nop 7
; HEURRC-NEXT: global_store_dwordx4 v[0:1], a[12:15], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v[2:3], a[8:11], off sc0 sc1
@@ -3422,23 +3216,17 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__flags(<4 x i32> %arg0, <4
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v[2:3], v[8:11], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v2, s10
-; HEURRC-NEXT: v_mov_b32_e32 v3, s11
-; HEURRC-NEXT: v_mov_b32_e32 v8, s20
-; HEURRC-NEXT: v_mov_b32_e32 v9, s21
-; HEURRC-NEXT: v_mov_b32_e32 v10, s22
-; HEURRC-NEXT: v_mov_b32_e32 v11, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; HEURRC-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
; HEURRC-NEXT: global_store_dwordx4 v[0:1], v[8:11], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v0, s8
-; HEURRC-NEXT: v_mov_b32_e32 v1, s9
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; HEURRC-NEXT: global_store_dwordx4 v[6:7], v[0:3], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v0, s12
-; HEURRC-NEXT: v_mov_b32_e32 v1, s13
-; HEURRC-NEXT: v_mov_b32_e32 v2, s14
-; HEURRC-NEXT: v_mov_b32_e32 v3, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; HEURRC-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_endpgm
@@ -3450,15 +3238,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__flags(<4 x i32> %arg0, <4
; VGPRRC-NEXT: v_mov_b64_e32 v[32:33], 48
; VGPRRC-NEXT: v_mov_b64_e32 v[34:35], 32
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v36, s24
-; VGPRRC-NEXT: v_mov_b32_e32 v37, s25
-; VGPRRC-NEXT: v_mov_b32_e32 v38, s26
-; VGPRRC-NEXT: v_mov_b32_e32 v39, s27
+; VGPRRC-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; VGPRRC-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; VGPRRC-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
-; VGPRRC-NEXT: v_mov_b32_e32 v40, s28
-; VGPRRC-NEXT: v_mov_b32_e32 v41, s29
-; VGPRRC-NEXT: v_mov_b32_e32 v42, s30
-; VGPRRC-NEXT: v_mov_b32_e32 v43, s31
+; VGPRRC-NEXT: v_mov_b64_e32 v[40:41], s[28:29]
+; VGPRRC-NEXT: v_mov_b64_e32 v[42:43], s[30:31]
; VGPRRC-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
; VGPRRC-NEXT: v_mov_b64_e32 v[26:27], s[18:19]
; VGPRRC-NEXT: v_mov_b64_e32 v[24:25], s[16:17]
@@ -3482,31 +3266,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__flags(<4 x i32> %arg0, <4
; VGPRRC-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s16
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s17
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s19
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
; VGPRRC-NEXT: global_store_dwordx4 v[34:35], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
; VGPRRC-NEXT: global_store_dwordx4 v[32:33], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; VGPRRC-NEXT: global_store_dwordx4 v[4:5], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v0, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v1, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v2, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v3, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
; VGPRRC-NEXT: global_store_dwordx4 v[8:9], v[0:3], off sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_endpgm
@@ -3659,22 +3435,14 @@ define <16 x i32> @test_mfma_i32_32x32x32_i8__mac(<4 x i32> %arg0, <4 x i32> %ar
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_i32_32x32x32_i8 v[8:23], v[0:3], v[4:7], v[8:23]
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v8
-; GCN-NEXT: v_mov_b32_e32 v1, v9
-; GCN-NEXT: v_mov_b32_e32 v2, v10
-; GCN-NEXT: v_mov_b32_e32 v3, v11
-; GCN-NEXT: v_mov_b32_e32 v4, v12
-; GCN-NEXT: v_mov_b32_e32 v5, v13
-; GCN-NEXT: v_mov_b32_e32 v6, v14
-; GCN-NEXT: v_mov_b32_e32 v7, v15
-; GCN-NEXT: v_mov_b32_e32 v8, v16
-; GCN-NEXT: v_mov_b32_e32 v9, v17
-; GCN-NEXT: v_mov_b32_e32 v10, v18
-; GCN-NEXT: v_mov_b32_e32 v11, v19
-; GCN-NEXT: v_mov_b32_e32 v12, v20
-; GCN-NEXT: v_mov_b32_e32 v13, v21
-; GCN-NEXT: v_mov_b32_e32 v14, v22
-; GCN-NEXT: v_mov_b32_e32 v15, v23
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; HEURRC-LABEL: test_mfma_i32_32x32x32_i8__mac:
@@ -3722,22 +3490,14 @@ define <16 x i32> @test_mfma_i32_32x32x32_i8__mac(<4 x i32> %arg0, <4 x i32> %ar
; VGPRRC-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VGPRRC-NEXT: v_mfma_i32_32x32x32_i8 v[8:23], v[0:3], v[4:7], v[8:23]
; VGPRRC-NEXT: s_nop 11
-; VGPRRC-NEXT: v_mov_b32_e32 v0, v8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, v9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, v10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, v11
-; VGPRRC-NEXT: v_mov_b32_e32 v4, v12
-; VGPRRC-NEXT: v_mov_b32_e32 v5, v13
-; VGPRRC-NEXT: v_mov_b32_e32 v6, v14
-; VGPRRC-NEXT: v_mov_b32_e32 v7, v15
-; VGPRRC-NEXT: v_mov_b32_e32 v8, v16
-; VGPRRC-NEXT: v_mov_b32_e32 v9, v17
-; VGPRRC-NEXT: v_mov_b32_e32 v10, v18
-; VGPRRC-NEXT: v_mov_b32_e32 v11, v19
-; VGPRRC-NEXT: v_mov_b32_e32 v12, v20
-; VGPRRC-NEXT: v_mov_b32_e32 v13, v21
-; VGPRRC-NEXT: v_mov_b32_e32 v14, v22
-; VGPRRC-NEXT: v_mov_b32_e32 v15, v23
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; VGPRRC-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; VGPRRC-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; VGPRRC-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; VGPRRC-NEXT: s_setpc_b64 s[30:31]
; AGPR-LABEL: test_mfma_i32_32x32x32_i8__mac:
; AGPR: ; %bb.0:
@@ -3812,22 +3572,14 @@ define <16 x i32> @test_mfma_i32_32x32x32_i8__mac__flags(<4 x i32> %arg0, <4 x i
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_i32_32x32x32_i8 v[8:23], v[0:3], v[4:7], v[8:23] cbsz:1 abid:1 blgp:1
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v8
-; GCN-NEXT: v_mov_b32_e32 v1, v9
-; GCN-NEXT: v_mov_b32_e32 v2, v10
-; GCN-NEXT: v_mov_b32_e32 v3, v11
-; GCN-NEXT: v_mov_b32_e32 v4, v12
-; GCN-NEXT: v_mov_b32_e32 v5, v13
-; GCN-NEXT: v_mov_b32_e32 v6, v14
-; GCN-NEXT: v_mov_b32_e32 v7, v15
-; GCN-NEXT: v_mov_b32_e32 v8, v16
-; GCN-NEXT: v_mov_b32_e32 v9, v17
-; GCN-NEXT: v_mov_b32_e32 v10, v18
-; GCN-NEXT: v_mov_b32_e32 v11, v19
-; GCN-NEXT: v_mov_b32_e32 v12, v20
-; GCN-NEXT: v_mov_b32_e32 v13, v21
-; GCN-NEXT: v_mov_b32_e32 v14, v22
-; GCN-NEXT: v_mov_b32_e32 v15, v23
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; HEURRC-LABEL: test_mfma_i32_32x32x32_i8__mac__flags:
@@ -3875,22 +3627,14 @@ define <16 x i32> @test_mfma_i32_32x32x32_i8__mac__flags(<4 x i32> %arg0, <4 x i
; VGPRRC-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VGPRRC-NEXT: v_mfma_i32_32x32x32_i8 v[8:23], v[0:3], v[4:7], v[8:23] cbsz:1 abid:1 blgp:1
; VGPRRC-NEXT: s_nop 11
-; VGPRRC-NEXT: v_mov_b32_e32 v0, v8
-; VGPRRC-NEXT: v_mov_b32_e32 v1, v9
-; VGPRRC-NEXT: v_mov_b32_e32 v2, v10
-; VGPRRC-NEXT: v_mov_b32_e32 v3, v11
-; VGPRRC-NEXT: v_mov_b32_e32 v4, v12
-; VGPRRC-NEXT: v_mov_b32_e32 v5, v13
-; VGPRRC-NEXT: v_mov_b32_e32 v6, v14
-; VGPRRC-NEXT: v_mov_b32_e32 v7, v15
-; VGPRRC-NEXT: v_mov_b32_e32 v8, v16
-; VGPRRC-NEXT: v_mov_b32_e32 v9, v17
-; VGPRRC-NEXT: v_mov_b32_e32 v10, v18
-; VGPRRC-NEXT: v_mov_b32_e32 v11, v19
-; VGPRRC-NEXT: v_mov_b32_e32 v12, v20
-; VGPRRC-NEXT: v_mov_b32_e32 v13, v21
-; VGPRRC-NEXT: v_mov_b32_e32 v14, v22
-; VGPRRC-NEXT: v_mov_b32_e32 v15, v23
+; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; VGPRRC-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; VGPRRC-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; VGPRRC-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; VGPRRC-NEXT: s_setpc_b64 s[30:31]
; AGPR-LABEL: test_mfma_i32_32x32x32_i8__mac__flags:
; AGPR: ; %bb.0:
@@ -3966,15 +3710,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd(<4 x i32> %arg0, <4
; SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; SDAG-NEXT: v_mov_b32_e32 v40, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v32, s20
-; SDAG-NEXT: v_mov_b32_e32 v33, s21
-; SDAG-NEXT: v_mov_b32_e32 v34, s22
-; SDAG-NEXT: v_mov_b32_e32 v35, s23
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[34:35], s[22:23]
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
-; SDAG-NEXT: v_mov_b32_e32 v36, s24
-; SDAG-NEXT: v_mov_b32_e32 v37, s25
-; SDAG-NEXT: v_mov_b32_e32 v38, s26
-; SDAG-NEXT: v_mov_b32_e32 v39, s27
+; SDAG-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
@@ -3987,31 +3727,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd(<4 x i32> %arg0, <4
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_i32_32x32x32_i8 v[0:15], v[32:35], v[36:39], v[16:31]
; SDAG-NEXT: s_nop 6
-; SDAG-NEXT: v_mov_b32_e32 v16, s20
-; SDAG-NEXT: v_mov_b32_e32 v17, s21
-; SDAG-NEXT: v_mov_b32_e32 v18, s22
-; SDAG-NEXT: v_mov_b32_e32 v19, s23
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; SDAG-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:48 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s16
-; SDAG-NEXT: v_mov_b32_e32 v17, s17
-; SDAG-NEXT: v_mov_b32_e32 v18, s18
-; SDAG-NEXT: v_mov_b32_e32 v19, s19
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; SDAG-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:32 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:16 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v40, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -4076,15 +3808,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd(<4 x i32> %arg0, <4
; HEURRC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; HEURRC-NEXT: v_mov_b32_e32 v40, 0
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v32, s20
-; HEURRC-NEXT: v_mov_b32_e32 v33, s21
-; HEURRC-NEXT: v_mov_b32_e32 v34, s22
-; HEURRC-NEXT: v_mov_b32_e32 v35, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[34:35], s[22:23]
; HEURRC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
-; HEURRC-NEXT: v_mov_b32_e32 v36, s24
-; HEURRC-NEXT: v_mov_b32_e32 v37, s25
-; HEURRC-NEXT: v_mov_b32_e32 v38, s26
-; HEURRC-NEXT: v_mov_b32_e32 v39, s27
+; HEURRC-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; HEURRC-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
; HEURRC-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
; HEURRC-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
@@ -4097,31 +3825,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd(<4 x i32> %arg0, <4
; HEURRC-NEXT: s_nop 1
; HEURRC-NEXT: v_mfma_i32_32x32x32_i8 v[0:15], v[32:35], v[36:39], v[16:31]
; HEURRC-NEXT: s_nop 6
-; HEURRC-NEXT: v_mov_b32_e32 v16, s20
-; HEURRC-NEXT: v_mov_b32_e32 v17, s21
-; HEURRC-NEXT: v_mov_b32_e32 v18, s22
-; HEURRC-NEXT: v_mov_b32_e32 v19, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; HEURRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:48 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s16
-; HEURRC-NEXT: v_mov_b32_e32 v17, s17
-; HEURRC-NEXT: v_mov_b32_e32 v18, s18
-; HEURRC-NEXT: v_mov_b32_e32 v19, s19
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; HEURRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:32 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s12
-; HEURRC-NEXT: v_mov_b32_e32 v17, s13
-; HEURRC-NEXT: v_mov_b32_e32 v18, s14
-; HEURRC-NEXT: v_mov_b32_e32 v19, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; HEURRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:16 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s8
-; HEURRC-NEXT: v_mov_b32_e32 v17, s9
-; HEURRC-NEXT: v_mov_b32_e32 v18, s10
-; HEURRC-NEXT: v_mov_b32_e32 v19, s11
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; HEURRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v40, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -4140,15 +3860,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd(<4 x i32> %arg0, <4
; VGPRRC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; VGPRRC-NEXT: v_mov_b32_e32 v40, 0
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v32, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v33, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v34, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v35, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[34:35], s[22:23]
; VGPRRC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
-; VGPRRC-NEXT: v_mov_b32_e32 v36, s24
-; VGPRRC-NEXT: v_mov_b32_e32 v37, s25
-; VGPRRC-NEXT: v_mov_b32_e32 v38, s26
-; VGPRRC-NEXT: v_mov_b32_e32 v39, s27
+; VGPRRC-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; VGPRRC-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
; VGPRRC-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
; VGPRRC-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
@@ -4161,31 +3877,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd(<4 x i32> %arg0, <4
; VGPRRC-NEXT: s_nop 1
; VGPRRC-NEXT: v_mfma_i32_32x32x32_i8 v[0:15], v[32:35], v[36:39], v[16:31]
; VGPRRC-NEXT: s_nop 6
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; VGPRRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:48 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s16
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s17
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s19
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; VGPRRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:32 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; VGPRRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:16 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPRRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v40, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -4343,15 +4051,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd__flags(<4 x i32> %a
; SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; SDAG-NEXT: v_mov_b32_e32 v40, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v32, s20
-; SDAG-NEXT: v_mov_b32_e32 v33, s21
-; SDAG-NEXT: v_mov_b32_e32 v34, s22
-; SDAG-NEXT: v_mov_b32_e32 v35, s23
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[34:35], s[22:23]
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
-; SDAG-NEXT: v_mov_b32_e32 v36, s24
-; SDAG-NEXT: v_mov_b32_e32 v37, s25
-; SDAG-NEXT: v_mov_b32_e32 v38, s26
-; SDAG-NEXT: v_mov_b32_e32 v39, s27
+; SDAG-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
@@ -4364,31 +4068,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd__flags(<4 x i32> %a
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_i32_32x32x32_i8 v[0:15], v[32:35], v[36:39], v[16:31] cbsz:1 abid:2 blgp:3
; SDAG-NEXT: s_nop 6
-; SDAG-NEXT: v_mov_b32_e32 v16, s20
-; SDAG-NEXT: v_mov_b32_e32 v17, s21
-; SDAG-NEXT: v_mov_b32_e32 v18, s22
-; SDAG-NEXT: v_mov_b32_e32 v19, s23
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; SDAG-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:48 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s16
-; SDAG-NEXT: v_mov_b32_e32 v17, s17
-; SDAG-NEXT: v_mov_b32_e32 v18, s18
-; SDAG-NEXT: v_mov_b32_e32 v19, s19
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; SDAG-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:32 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:16 sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v40, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -4453,15 +4149,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd__flags(<4 x i32> %a
; HEURRC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; HEURRC-NEXT: v_mov_b32_e32 v40, 0
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v32, s20
-; HEURRC-NEXT: v_mov_b32_e32 v33, s21
-; HEURRC-NEXT: v_mov_b32_e32 v34, s22
-; HEURRC-NEXT: v_mov_b32_e32 v35, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[34:35], s[22:23]
; HEURRC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
-; HEURRC-NEXT: v_mov_b32_e32 v36, s24
-; HEURRC-NEXT: v_mov_b32_e32 v37, s25
-; HEURRC-NEXT: v_mov_b32_e32 v38, s26
-; HEURRC-NEXT: v_mov_b32_e32 v39, s27
+; HEURRC-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; HEURRC-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
; HEURRC-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
; HEURRC-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
@@ -4474,31 +4166,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd__flags(<4 x i32> %a
; HEURRC-NEXT: s_nop 1
; HEURRC-NEXT: v_mfma_i32_32x32x32_i8 v[0:15], v[32:35], v[36:39], v[16:31] cbsz:1 abid:2 blgp:3
; HEURRC-NEXT: s_nop 6
-; HEURRC-NEXT: v_mov_b32_e32 v16, s20
-; HEURRC-NEXT: v_mov_b32_e32 v17, s21
-; HEURRC-NEXT: v_mov_b32_e32 v18, s22
-; HEURRC-NEXT: v_mov_b32_e32 v19, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; HEURRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:48 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s16
-; HEURRC-NEXT: v_mov_b32_e32 v17, s17
-; HEURRC-NEXT: v_mov_b32_e32 v18, s18
-; HEURRC-NEXT: v_mov_b32_e32 v19, s19
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; HEURRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:32 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s12
-; HEURRC-NEXT: v_mov_b32_e32 v17, s13
-; HEURRC-NEXT: v_mov_b32_e32 v18, s14
-; HEURRC-NEXT: v_mov_b32_e32 v19, s15
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; HEURRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:16 sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: s_nop 0
-; HEURRC-NEXT: v_mov_b32_e32 v16, s8
-; HEURRC-NEXT: v_mov_b32_e32 v17, s9
-; HEURRC-NEXT: v_mov_b32_e32 v18, s10
-; HEURRC-NEXT: v_mov_b32_e32 v19, s11
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; HEURRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] sc0 sc1
; HEURRC-NEXT: s_waitcnt vmcnt(0)
; HEURRC-NEXT: global_store_dwordx4 v40, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -4517,15 +4201,11 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd__flags(<4 x i32> %a
; VGPRRC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; VGPRRC-NEXT: v_mov_b32_e32 v40, 0
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v32, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v33, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v34, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v35, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[32:33], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[34:35], s[22:23]
; VGPRRC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
-; VGPRRC-NEXT: v_mov_b32_e32 v36, s24
-; VGPRRC-NEXT: v_mov_b32_e32 v37, s25
-; VGPRRC-NEXT: v_mov_b32_e32 v38, s26
-; VGPRRC-NEXT: v_mov_b32_e32 v39, s27
+; VGPRRC-NEXT: v_mov_b64_e32 v[36:37], s[24:25]
+; VGPRRC-NEXT: v_mov_b64_e32 v[38:39], s[26:27]
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
; VGPRRC-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
; VGPRRC-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
@@ -4538,31 +4218,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd__flags(<4 x i32> %a
; VGPRRC-NEXT: s_nop 1
; VGPRRC-NEXT: v_mfma_i32_32x32x32_i8 v[0:15], v[32:35], v[36:39], v[16:31] cbsz:1 abid:2 blgp:3
; VGPRRC-NEXT: s_nop 6
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; VGPRRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:48 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s16
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s17
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s18
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s19
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; VGPRRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:32 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s12
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s13
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s14
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s15
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; VGPRRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] offset:16 sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: s_nop 0
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s8
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s9
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s10
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s11
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; VGPRRC-NEXT: global_store_dwordx4 v40, v[16:19], s[0:1] sc0 sc1
; VGPRRC-NEXT: s_waitcnt vmcnt(0)
; VGPRRC-NEXT: global_store_dwordx4 v40, v[8:11], s[0:1] offset:32 sc0 sc1
@@ -4719,15 +4391,12 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd_mac(<4 x i32> %arg0
; SDAG-NEXT: s_load_dwordx8 s[20:27], s[4:5], 0x24
; SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v16, s20
-; SDAG-NEXT: v_mov_b32_e32 v17, s21
-; SDAG-NEXT: v_mov_b32_e32 v18, s22
-; SDAG-NEXT: v_mov_b32_e32 v19, s23
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; SDAG-NEXT: v_mov_b32_e32 v20, s24
; SDAG-NEXT: v_mov_b32_e32 v21, s25
-; SDAG-NEXT: v_mov_b32_e32 v22, s26
-; SDAG-NEXT: v_mov_b32_e32 v23, s27
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[26:27]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
@@ -4780,15 +4449,12 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd_mac(<4 x i32> %arg0
; HEURRC-NEXT: s_load_dwordx8 s[20:27], s[4:5], 0x24
; HEURRC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v16, s20
-; HEURRC-NEXT: v_mov_b32_e32 v17, s21
-; HEURRC-NEXT: v_mov_b32_e32 v18, s22
-; HEURRC-NEXT: v_mov_b32_e32 v19, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; HEURRC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; HEURRC-NEXT: v_mov_b32_e32 v20, s24
; HEURRC-NEXT: v_mov_b32_e32 v21, s25
-; HEURRC-NEXT: v_mov_b32_e32 v22, s26
-; HEURRC-NEXT: v_mov_b32_e32 v23, s27
+; HEURRC-NEXT: v_mov_b64_e32 v[22:23], s[26:27]
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
@@ -4813,15 +4479,12 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd_mac(<4 x i32> %arg0
; VGPRRC-NEXT: s_load_dwordx8 s[20:27], s[4:5], 0x24
; VGPRRC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; VGPRRC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; VGPRRC-NEXT: v_mov_b32_e32 v20, s24
; VGPRRC-NEXT: v_mov_b32_e32 v21, s25
-; VGPRRC-NEXT: v_mov_b32_e32 v22, s26
-; VGPRRC-NEXT: v_mov_b32_e32 v23, s27
+; VGPRRC-NEXT: v_mov_b64_e32 v[22:23], s[26:27]
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
@@ -4925,15 +4588,12 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd_mac_flags(<4 x i32>
; SDAG-NEXT: s_load_dwordx8 s[20:27], s[4:5], 0x24
; SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v16, s20
-; SDAG-NEXT: v_mov_b32_e32 v17, s21
-; SDAG-NEXT: v_mov_b32_e32 v18, s22
-; SDAG-NEXT: v_mov_b32_e32 v19, s23
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; SDAG-NEXT: v_mov_b32_e32 v20, s24
; SDAG-NEXT: v_mov_b32_e32 v21, s25
-; SDAG-NEXT: v_mov_b32_e32 v22, s26
-; SDAG-NEXT: v_mov_b32_e32 v23, s27
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[26:27]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
@@ -4986,15 +4646,12 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd_mac_flags(<4 x i32>
; HEURRC-NEXT: s_load_dwordx8 s[20:27], s[4:5], 0x24
; HEURRC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
-; HEURRC-NEXT: v_mov_b32_e32 v16, s20
-; HEURRC-NEXT: v_mov_b32_e32 v17, s21
-; HEURRC-NEXT: v_mov_b32_e32 v18, s22
-; HEURRC-NEXT: v_mov_b32_e32 v19, s23
+; HEURRC-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; HEURRC-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; HEURRC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; HEURRC-NEXT: v_mov_b32_e32 v20, s24
; HEURRC-NEXT: v_mov_b32_e32 v21, s25
-; HEURRC-NEXT: v_mov_b32_e32 v22, s26
-; HEURRC-NEXT: v_mov_b32_e32 v23, s27
+; HEURRC-NEXT: v_mov_b64_e32 v[22:23], s[26:27]
; HEURRC-NEXT: s_waitcnt lgkmcnt(0)
; HEURRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; HEURRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
@@ -5019,15 +4676,12 @@ define amdgpu_kernel void @test_mfma_i32_32x32x32_i8__vgprcd_mac_flags(<4 x i32>
; VGPRRC-NEXT: s_load_dwordx8 s[20:27], s[4:5], 0x24
; VGPRRC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xa4
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
-; VGPRRC-NEXT: v_mov_b32_e32 v16, s20
-; VGPRRC-NEXT: v_mov_b32_e32 v17, s21
-; VGPRRC-NEXT: v_mov_b32_e32 v18, s22
-; VGPRRC-NEXT: v_mov_b32_e32 v19, s23
+; VGPRRC-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; VGPRRC-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; VGPRRC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; VGPRRC-NEXT: v_mov_b32_e32 v20, s24
; VGPRRC-NEXT: v_mov_b32_e32 v21, s25
-; VGPRRC-NEXT: v_mov_b32_e32 v22, s26
-; VGPRRC-NEXT: v_mov_b32_e32 v23, s27
+; VGPRRC-NEXT: v_mov_b64_e32 v[22:23], s[26:27]
; VGPRRC-NEXT: s_waitcnt lgkmcnt(0)
; VGPRRC-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; VGPRRC-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
index 0161cdf03deac..d4b9bf6a97c90 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
@@ -357,38 +357,23 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 {
; GFX942-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GFX942-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-NEXT: v_mov_b32_e32 v27, s11
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GFX942-NEXT: v_mov_b32_e32 v28, s12
; GFX942-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-NEXT: s_nop 1
; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v33, v34, v[0:31] cbsz:1 abid:2 blgp:3
; GFX942-NEXT: s_nop 15
@@ -413,38 +398,23 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 {
; GFX942-VGPR-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GFX942-VGPR-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v27, s11
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GFX942-VGPR-NEXT: v_mov_b32_e32 v28, s12
; GFX942-VGPR-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-VGPR-NEXT: s_nop 1
; GFX942-VGPR-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v33, v34, v[0:31] cbsz:1 abid:2 blgp:3
; GFX942-VGPR-NEXT: s_nop 15
@@ -1481,44 +1451,26 @@ define amdgpu_kernel void @test_mfma_f32_32x32x4f16(ptr addrspace(1) %arg, ptr a
; GFX942-NEXT: s_load_dwordx16 s[0:15], s[36:37], 0x40
; GFX942-NEXT: s_load_dwordx16 s[16:31], s[36:37], 0x0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-NEXT: v_mov_b32_e32 v19, s3
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
; GFX942-NEXT: s_load_dwordx4 s[0:3], s[38:39], 0x0
-; GFX942-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-NEXT: v_mov_b32_e32 v3, s19
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v34, s0
-; GFX942-NEXT: v_mov_b32_e32 v35, s1
-; GFX942-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-NEXT: v_mov_b32_e32 v27, s11
-; GFX942-NEXT: v_mov_b32_e32 v28, s12
-; GFX942-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-NEXT: v_mov_b32_e32 v31, s15
-; GFX942-NEXT: v_mov_b32_e32 v36, s2
-; GFX942-NEXT: v_mov_b32_e32 v37, s3
+; GFX942-NEXT: v_mov_b64_e32 v[34:35], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[28:29], s[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[36:37], s[2:3]
; GFX942-NEXT: s_nop 1
; GFX942-NEXT: v_mfma_f32_32x32x4_2b_f16 v[0:31], v[34:35], v[36:37], v[0:31] cbsz:1 abid:2 blgp:3
; GFX942-NEXT: s_nop 15
@@ -1541,44 +1493,26 @@ define amdgpu_kernel void @test_mfma_f32_32x32x4f16(ptr addrspace(1) %arg, ptr a
; GFX942-VGPR-NEXT: s_load_dwordx16 s[0:15], s[36:37], 0x40
; GFX942-VGPR-NEXT: s_load_dwordx16 s[16:31], s[36:37], 0x0
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v19, s3
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
; GFX942-VGPR-NEXT: s_load_dwordx4 s[0:3], s[38:39], 0x0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v3, s19
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v34, s0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v35, s1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v27, s11
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v28, s12
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v31, s15
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v36, s2
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v37, s3
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[34:35], s[0:1]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[28:29], s[12:13]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[36:37], s[2:3]
; GFX942-VGPR-NEXT: s_nop 1
; GFX942-VGPR-NEXT: v_mfma_f32_32x32x4_2b_f16 v[0:31], v[34:35], v[36:37], v[0:31] cbsz:1 abid:2 blgp:3
; GFX942-VGPR-NEXT: s_nop 15
@@ -1779,11 +1713,9 @@ define amdgpu_kernel void @test_mfma_f32_16x16x4f16(ptr addrspace(1) %arg, ptr a
; GFX942-NEXT: s_load_dwordx4 s[20:23], s[18:19], 0x0
; GFX942-NEXT: s_load_dwordx16 s[0:15], s[16:17], 0x0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v16, s20
-; GFX942-NEXT: v_mov_b32_e32 v17, s21
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-NEXT: v_mov_b32_e32 v18, s22
-; GFX942-NEXT: v_mov_b32_e32 v19, s23
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -1808,11 +1740,9 @@ define amdgpu_kernel void @test_mfma_f32_16x16x4f16(ptr addrspace(1) %arg, ptr a
; GFX942-VGPR-NEXT: s_load_dwordx4 s[20:23], s[18:19], 0x0
; GFX942-VGPR-NEXT: s_load_dwordx16 s[0:15], s[16:17], 0x0
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v16, s20
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v17, s21
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v18, s22
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v19, s23
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -1930,11 +1860,9 @@ define amdgpu_kernel void @test_mfma_f32_4x4x4f16(ptr addrspace(1) %arg, ptr add
; GFX942-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
; GFX942-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v6, s4
-; GFX942-NEXT: v_mov_b32_e32 v7, s5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
-; GFX942-NEXT: v_mov_b32_e32 v8, s6
-; GFX942-NEXT: v_mov_b32_e32 v9, s7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; GFX942-NEXT: s_nop 1
; GFX942-NEXT: v_mfma_f32_4x4x4_16b_f16 v[0:3], v[6:7], v[8:9], v[0:3] cbsz:1 abid:2 blgp:3
@@ -1950,11 +1878,9 @@ define amdgpu_kernel void @test_mfma_f32_4x4x4f16(ptr addrspace(1) %arg, ptr add
; GFX942-VGPR-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
; GFX942-VGPR-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x0
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, s4
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, s5
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v8, s6
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v9, s7
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; GFX942-VGPR-NEXT: s_nop 1
; GFX942-VGPR-NEXT: v_mfma_f32_4x4x4_16b_f16 v[0:3], v[6:7], v[8:9], v[0:3] cbsz:1 abid:2 blgp:3
@@ -2149,11 +2075,9 @@ define amdgpu_kernel void @test_mfma_f32_32x32x8f16(ptr addrspace(1) %arg, ptr a
; GFX942-NEXT: s_load_dwordx4 s[20:23], s[18:19], 0x0
; GFX942-NEXT: s_load_dwordx16 s[0:15], s[16:17], 0x0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v16, s20
-; GFX942-NEXT: v_mov_b32_e32 v17, s21
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-NEXT: v_mov_b32_e32 v18, s22
-; GFX942-NEXT: v_mov_b32_e32 v19, s23
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -2178,11 +2102,9 @@ define amdgpu_kernel void @test_mfma_f32_32x32x8f16(ptr addrspace(1) %arg, ptr a
; GFX942-VGPR-NEXT: s_load_dwordx4 s[20:23], s[18:19], 0x0
; GFX942-VGPR-NEXT: s_load_dwordx16 s[0:15], s[16:17], 0x0
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v16, s20
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v17, s21
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v18, s22
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v19, s23
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
@@ -2300,11 +2222,9 @@ define amdgpu_kernel void @test_mfma_f32_16x16x16f16(ptr addrspace(1) %arg, ptr
; GFX942-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
; GFX942-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v6, s4
-; GFX942-NEXT: v_mov_b32_e32 v7, s5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
-; GFX942-NEXT: v_mov_b32_e32 v8, s6
-; GFX942-NEXT: v_mov_b32_e32 v9, s7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; GFX942-NEXT: s_nop 1
; GFX942-NEXT: v_mfma_f32_16x16x16_f16 v[0:3], v[6:7], v[8:9], v[0:3] cbsz:1 abid:2 blgp:3
@@ -2320,11 +2240,9 @@ define amdgpu_kernel void @test_mfma_f32_16x16x16f16(ptr addrspace(1) %arg, ptr
; GFX942-VGPR-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
; GFX942-VGPR-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x0
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, s4
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, s5
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v8, s6
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v9, s7
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; GFX942-VGPR-NEXT: s_nop 1
; GFX942-VGPR-NEXT: v_mfma_f32_16x16x16_f16 v[0:3], v[6:7], v[8:9], v[0:3] cbsz:1 abid:2 blgp:3
@@ -2650,38 +2568,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x4i8(ptr addrspace(1) %arg) #0 {
; GFX942-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GFX942-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-NEXT: v_mov_b32_e32 v27, s11
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GFX942-NEXT: v_mov_b32_e32 v28, s12
; GFX942-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-NEXT: s_nop 1
; GFX942-NEXT: v_mfma_i32_32x32x4_2b_i8 v[0:31], v33, v34, v[0:31] cbsz:1 abid:2 blgp:3
; GFX942-NEXT: s_nop 15
@@ -2706,38 +2609,23 @@ define amdgpu_kernel void @test_mfma_i32_32x32x4i8(ptr addrspace(1) %arg) #0 {
; GFX942-VGPR-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GFX942-VGPR-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v27, s11
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GFX942-VGPR-NEXT: v_mov_b32_e32 v28, s12
; GFX942-VGPR-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-VGPR-NEXT: s_nop 1
; GFX942-VGPR-NEXT: v_mfma_i32_32x32x4_2b_i8 v[0:31], v33, v34, v[0:31] cbsz:1 abid:2 blgp:3
; GFX942-VGPR-NEXT: s_nop 15
@@ -3752,38 +3640,23 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_forward_acc(ptr addrspace(1)
; GFX942-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GFX942-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-NEXT: v_mov_b32_e32 v27, s11
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GFX942-NEXT: v_mov_b32_e32 v28, s12
; GFX942-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-NEXT: s_nop 1
; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v32, v33, v[0:31]
; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v32, v33, v[0:31]
@@ -3809,38 +3682,23 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_forward_acc(ptr addrspace(1)
; GFX942-VGPR-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GFX942-VGPR-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GFX942-VGPR-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v27, s11
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GFX942-VGPR-NEXT: v_mov_b32_e32 v28, s12
; GFX942-VGPR-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-VGPR-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-VGPR-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-VGPR-NEXT: s_nop 1
; GFX942-VGPR-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v32, v33, v[0:31]
; GFX942-VGPR-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v32, v33, v[0:31]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
index 97a89ec819bae..ab3227d3ad85f 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
@@ -812,8 +812,7 @@ define <4 x float> @test_mfma_scale_f32_16x16x128_f8f6f4_0_0__sgpr_scaleA__sgpr_
; GCN-LABEL: test_mfma_scale_f32_16x16x128_f8f6f4_0_0__sgpr_scaleA__sgpr_scaleB:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v20, s0
-; GCN-NEXT: v_mov_b32_e32 v21, s1
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
; GCN-NEXT: s_nop 1
; GCN-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[0:7], v[8:15], v[16:19], v20, v21 op_sel_hi:[0,0,0]
; GCN-NEXT: s_setpc_b64 s[30:31]
@@ -849,26 +848,17 @@ define <4 x float> @test_mfma_scale_f32_16x16x128_f8f6f4_0_0_sgprs(<8 x i32> inr
; SDAG-LABEL: test_mfma_scale_f32_16x16x128_f8f6f4_0_0_sgprs:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v16, s0
-; SDAG-NEXT: v_mov_b32_e32 v17, s1
-; SDAG-NEXT: v_mov_b32_e32 v18, s2
-; SDAG-NEXT: v_mov_b32_e32 v19, s3
-; SDAG-NEXT: v_mov_b32_e32 v20, s16
-; SDAG-NEXT: v_mov_b32_e32 v21, s17
-; SDAG-NEXT: v_mov_b32_e32 v22, s18
-; SDAG-NEXT: v_mov_b32_e32 v23, s19
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[18:19]
; SDAG-NEXT: v_readfirstlane_b32 s0, v1
; SDAG-NEXT: v_readfirstlane_b32 s1, v0
-; SDAG-NEXT: v_mov_b32_e32 v8, s20
-; SDAG-NEXT: v_mov_b32_e32 v9, s21
-; SDAG-NEXT: v_mov_b32_e32 v10, s22
-; SDAG-NEXT: v_mov_b32_e32 v11, s23
-; SDAG-NEXT: v_mov_b32_e32 v12, s24
-; SDAG-NEXT: v_mov_b32_e32 v13, s25
-; SDAG-NEXT: v_mov_b32_e32 v14, s26
-; SDAG-NEXT: v_mov_b32_e32 v15, s27
-; SDAG-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v6, s1
; SDAG-NEXT: v_mov_b32_e32 v7, s0
; SDAG-NEXT: s_nop 1
@@ -915,14 +905,10 @@ define <4 x float> @test_mfma_scale_f32_16x16x128_f8f6f4_0_0_sgpr_vgpr_vgpr__sgp
; SDAG-LABEL: test_mfma_scale_f32_16x16x128_f8f6f4_0_0_sgpr_vgpr_vgpr__sgpr_vgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
; SDAG-NEXT: v_mov_b32_e32 v13, s20
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[14:21], v[0:7], v[8:11], v13, v12 op_sel_hi:[0,0,0]
@@ -951,14 +937,10 @@ define <4 x float> @test_mfma_scale_f32_16x16x128_f8f6f4_0_0_sgpr_vgpr_vgpr__vgp
; SDAG-LABEL: test_mfma_scale_f32_16x16x128_f8f6f4_0_0_sgpr_vgpr_vgpr__vgpr_sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
; SDAG-NEXT: v_mov_b32_e32 v13, s20
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[14:21], v[0:7], v[8:11], v12, v13 op_sel_hi:[0,0,0]
@@ -987,14 +969,10 @@ define <4 x float> @test_mfma_scale_f32_16x16x128_f8f6f4_0_0_vgpr_sgpr_vgpr__vgp
; SDAG-LABEL: test_mfma_scale_f32_16x16x128_f8f6f4_0_0_vgpr_sgpr_vgpr__vgpr_sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
; SDAG-NEXT: v_mov_b32_e32 v13, s20
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[0:7], v[14:21], v[8:11], v12, v13 op_sel_hi:[0,0,0]
@@ -1023,10 +1001,8 @@ define <4 x float> @test_mfma_scale_f32_16x16x128_f8f6f4_0_0_vgpr_vgpr_sgpr__vgp
; SDAG-LABEL: test_mfma_scale_f32_16x16x128_f8f6f4_0_0_vgpr_vgpr_sgpr__vgpr_sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v18, s0
-; SDAG-NEXT: v_mov_b32_e32 v19, s1
-; SDAG-NEXT: v_mov_b32_e32 v20, s2
-; SDAG-NEXT: v_mov_b32_e32 v21, s3
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v17, s16
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[0:7], v[8:15], v[18:21], v16, v17 op_sel_hi:[0,0,0]
@@ -1049,18 +1025,12 @@ define <4 x float> @test_mfma_scale_f32_16x16x128_f8f6f4_0_0_sgpr_vgpr_sgpr__vgp
; SDAG-LABEL: test_mfma_scale_f32_16x16x128_f8f6f4_0_0_sgpr_vgpr_sgpr__vgpr_sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v9, s24
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[14:21], v[0:7], v[10:13], v8, v9 op_sel_hi:[0,0,0]
@@ -1159,28 +1129,18 @@ define amdgpu_kernel void @test_mfma_scale_f32_16x16x128_f8f6f4__vgprcd(<8 x i32
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x0
; SDAG-NEXT: v_mov_b32_e32 v20, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
-; SDAG-NEXT: v_mov_b32_e32 v4, s12
-; SDAG-NEXT: v_mov_b32_e32 v5, s13
-; SDAG-NEXT: v_mov_b32_e32 v6, s14
-; SDAG-NEXT: v_mov_b32_e32 v7, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
; SDAG-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x40
-; SDAG-NEXT: v_mov_b32_e32 v8, s16
-; SDAG-NEXT: v_mov_b32_e32 v9, s17
-; SDAG-NEXT: v_mov_b32_e32 v10, s18
-; SDAG-NEXT: v_mov_b32_e32 v11, s19
-; SDAG-NEXT: v_mov_b32_e32 v12, s20
-; SDAG-NEXT: v_mov_b32_e32 v13, s21
-; SDAG-NEXT: v_mov_b32_e32 v14, s22
-; SDAG-NEXT: v_mov_b32_e32 v15, s23
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: v_mov_b32_e32 v21, s12
; SDAG-NEXT: v_mov_b32_e32 v22, s13
; SDAG-NEXT: s_nop 1
@@ -1204,8 +1164,7 @@ define amdgpu_kernel void @test_mfma_scale_f32_16x16x128_f8f6f4__vgprcd(<8 x i32
; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
; GISEL-NEXT: v_mov_b64_e32 v[18:19], s[26:27]
-; GISEL-NEXT: v_mov_b32_e32 v20, s28
-; GISEL-NEXT: v_mov_b32_e32 v21, s29
+; GISEL-NEXT: v_mov_b64_e32 v[20:21], s[28:29]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[0:7], v[8:15], v[16:19], v20, v21 op_sel:[1,1,0] op_sel_hi:[1,0,0] blgp:2
; GISEL-NEXT: v_mov_b32_e32 v4, 0
@@ -1227,23 +1186,15 @@ define amdgpu_kernel void @test_mfma_scale_f32_16x16x128_f8f6f4__vgprcd___scaleA
; SDAG-NEXT: v_mov_b32_e32 v22, 0x41
; SDAG-NEXT: v_mov_b32_e32 v20, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
-; SDAG-NEXT: v_mov_b32_e32 v4, s12
-; SDAG-NEXT: v_mov_b32_e32 v5, s13
-; SDAG-NEXT: v_mov_b32_e32 v6, s14
-; SDAG-NEXT: v_mov_b32_e32 v7, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
-; SDAG-NEXT: v_mov_b32_e32 v8, s16
-; SDAG-NEXT: v_mov_b32_e32 v9, s17
-; SDAG-NEXT: v_mov_b32_e32 v10, s18
-; SDAG-NEXT: v_mov_b32_e32 v11, s19
-; SDAG-NEXT: v_mov_b32_e32 v12, s20
-; SDAG-NEXT: v_mov_b32_e32 v13, s21
-; SDAG-NEXT: v_mov_b32_e32 v14, s22
-; SDAG-NEXT: v_mov_b32_e32 v15, s23
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[0:7], v[8:15], v[16:19], v22, v21 op_sel:[1,1,0] op_sel_hi:[1,0,0]
@@ -1290,23 +1241,15 @@ define amdgpu_kernel void @test_mfma_scale_f32_16x16x128_f8f6f4__vgprcd___scaleA
; SDAG-NEXT: v_mov_b32_e32 v22, 0x41
; SDAG-NEXT: v_mov_b32_e32 v20, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
-; SDAG-NEXT: v_mov_b32_e32 v4, s12
-; SDAG-NEXT: v_mov_b32_e32 v5, s13
-; SDAG-NEXT: v_mov_b32_e32 v6, s14
-; SDAG-NEXT: v_mov_b32_e32 v7, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
-; SDAG-NEXT: v_mov_b32_e32 v8, s16
-; SDAG-NEXT: v_mov_b32_e32 v9, s17
-; SDAG-NEXT: v_mov_b32_e32 v10, s18
-; SDAG-NEXT: v_mov_b32_e32 v11, s19
-; SDAG-NEXT: v_mov_b32_e32 v12, s20
-; SDAG-NEXT: v_mov_b32_e32 v13, s21
-; SDAG-NEXT: v_mov_b32_e32 v14, s22
-; SDAG-NEXT: v_mov_b32_e32 v15, s23
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[0:7], v[8:15], v[16:19], v22, v21 op_sel:[1,1,0] op_sel_hi:[1,0,0]
@@ -1353,23 +1296,15 @@ define amdgpu_kernel void @test_mfma_scale_f32_16x16x128_f8f6f4__vgprcd___scaleA
; SDAG-NEXT: v_mov_b32_e32 v22, 1.0
; SDAG-NEXT: v_mov_b32_e32 v20, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
-; SDAG-NEXT: v_mov_b32_e32 v4, s12
-; SDAG-NEXT: v_mov_b32_e32 v5, s13
-; SDAG-NEXT: v_mov_b32_e32 v6, s14
-; SDAG-NEXT: v_mov_b32_e32 v7, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
-; SDAG-NEXT: v_mov_b32_e32 v8, s16
-; SDAG-NEXT: v_mov_b32_e32 v9, s17
-; SDAG-NEXT: v_mov_b32_e32 v10, s18
-; SDAG-NEXT: v_mov_b32_e32 v11, s19
-; SDAG-NEXT: v_mov_b32_e32 v12, s20
-; SDAG-NEXT: v_mov_b32_e32 v13, s21
-; SDAG-NEXT: v_mov_b32_e32 v14, s22
-; SDAG-NEXT: v_mov_b32_e32 v15, s23
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[0:7], v[8:15], v[16:19], v22, v21 op_sel:[1,1,0] op_sel_hi:[1,0,0]
@@ -1416,23 +1351,15 @@ define amdgpu_kernel void @test_mfma_scale_f32_16x16x128_f8f6f4__vgprcd___scaleA
; SDAG-NEXT: v_mov_b32_e32 v22, 1.0
; SDAG-NEXT: v_mov_b32_e32 v20, 0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v0, s8
-; SDAG-NEXT: v_mov_b32_e32 v1, s9
-; SDAG-NEXT: v_mov_b32_e32 v2, s10
-; SDAG-NEXT: v_mov_b32_e32 v3, s11
-; SDAG-NEXT: v_mov_b32_e32 v4, s12
-; SDAG-NEXT: v_mov_b32_e32 v5, s13
-; SDAG-NEXT: v_mov_b32_e32 v6, s14
-; SDAG-NEXT: v_mov_b32_e32 v7, s15
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
-; SDAG-NEXT: v_mov_b32_e32 v8, s16
-; SDAG-NEXT: v_mov_b32_e32 v9, s17
-; SDAG-NEXT: v_mov_b32_e32 v10, s18
-; SDAG-NEXT: v_mov_b32_e32 v11, s19
-; SDAG-NEXT: v_mov_b32_e32 v12, s20
-; SDAG-NEXT: v_mov_b32_e32 v13, s21
-; SDAG-NEXT: v_mov_b32_e32 v14, s22
-; SDAG-NEXT: v_mov_b32_e32 v15, s23
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_16x16x128_f8f6f4 v[0:3], v[0:7], v[8:15], v[16:19], v22, v21 op_sel:[1,1,0] op_sel_hi:[1,0,0]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
index 0a36d3dd28f06..c9aa5da6c5fcc 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
@@ -24,22 +24,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp0(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp0:
@@ -52,22 +44,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp0(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -87,22 +71,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_1_1__cbsz1__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel:[1,1,0] op_sel_hi:[0,0,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_1_1__cbsz1__blgp1:
@@ -115,22 +91,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_1_1__cbsz1__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel:[1,1,0] op_sel_hi:[0,0,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -150,22 +118,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_2_2__cbsz1__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_2_2__cbsz1__blgp1:
@@ -178,22 +138,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_2_2__cbsz1__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -213,22 +165,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_3_3__cbsz1__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel:[1,1,0] op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_3_3__cbsz1__blgp1:
@@ -241,22 +185,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_3_3__cbsz1__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel:[1,1,0] op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -276,22 +212,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_3__cbsz1__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel:[0,1,0] op_sel_hi:[0,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_3__cbsz1__blgp1:
@@ -304,22 +232,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_3__cbsz1__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel:[0,1,0] op_sel_hi:[0,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -339,22 +259,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_3_0__cbsz1__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel:[1,0,0] op_sel_hi:[1,0,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_3_0__cbsz1__blgp1:
@@ -367,22 +279,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_3_0__cbsz1__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel:[1,0,0] op_sel_hi:[1,0,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -402,22 +306,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_2_3__cbsz1__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel:[0,1,0] op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_2_3__cbsz1__blgp1:
@@ -430,22 +326,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_2_3__cbsz1__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel:[0,1,0] op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -465,22 +353,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_3_2__cbsz1__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel:[1,0,0] op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_3_2__cbsz1__blgp1:
@@ -493,22 +373,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_3_2__cbsz1__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel:[1,0,0] op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -527,22 +399,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp0__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31]
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -563,22 +427,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] blgp:1
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp1:
@@ -591,22 +447,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] blgp:1
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -624,22 +472,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp1__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31] blgp:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -658,22 +498,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp2(<8 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] blgp:2
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -689,22 +521,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp2__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29] blgp:2
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -723,22 +547,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp3(<8 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] blgp:3
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -754,22 +570,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp3__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29] blgp:3
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -786,22 +594,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp4(<8 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[12:27], v[0:7], v[8:11], v[12:27], v28, v29 op_sel_hi:[0,0,0] blgp:4
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v4i32(<8 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -817,22 +617,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz0__blgp4__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[12:27], v[0:7], v[8:11], v[12:27] blgp:4
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v4i32(<8 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -853,22 +645,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp0(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] cbsz:1
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp0:
@@ -881,22 +665,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp0(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] cbsz:1
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -914,22 +690,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp0__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31] cbsz:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -950,22 +718,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp1(<8 x
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] cbsz:1 blgp:1
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp1:
@@ -978,22 +738,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp1(<8 x
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] cbsz:1 blgp:1
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -1012,22 +764,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp1__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31] cbsz:1 blgp:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -1046,22 +790,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp2(<8 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] cbsz:1 blgp:2
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -1077,22 +813,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp2__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29] cbsz:1 blgp:2
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -1111,22 +839,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp3(<8 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] cbsz:1 blgp:3
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -1142,22 +862,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp3__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29] cbsz:1 blgp:3
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -1174,22 +886,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp4(<8 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[12:27], v[0:7], v[8:11], v[12:27], v28, v29 op_sel_hi:[0,0,0] cbsz:1 blgp:4
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v4i32(<8 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -1205,22 +909,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz1__blgp4__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[12:27], v[0:7], v[8:11], v[12:27] cbsz:1 blgp:4
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v4i32(<8 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 1, ; cbsz
@@ -1239,22 +935,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp0(<6 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] cbsz:2
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1270,22 +958,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp0__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29] cbsz:2
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1304,22 +984,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp1(<6 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] cbsz:2 blgp:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1335,22 +1007,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp1__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29] cbsz:2 blgp:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1366,22 +1030,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp2(<6 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[12:27], v[0:5], v[6:11], v[12:27], v28, v29 op_sel_hi:[0,0,0] cbsz:2 blgp:2
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v6i32(<6 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1396,22 +1052,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp2__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[12:27], v[0:5], v[6:11], v[12:27] cbsz:2 blgp:2
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v6i32(<6 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1427,22 +1075,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp3(<6 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[12:27], v[0:5], v[6:11], v[12:27], v28, v29 op_sel_hi:[0,0,0] cbsz:2 blgp:3
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v6i32(<6 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1457,22 +1097,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp3__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[12:27], v[0:5], v[6:11], v[12:27] cbsz:2 blgp:3
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v6i32(<6 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1492,22 +1124,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp0(<6 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] cbsz:3
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1523,22 +1147,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp0__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29] cbsz:3
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1557,22 +1173,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp1(<6 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] cbsz:3 blgp:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1588,22 +1196,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp1__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29] cbsz:3 blgp:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1619,22 +1219,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp2(<6 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[12:27], v[0:5], v[6:11], v[12:27], v28, v29 op_sel_hi:[0,0,0] cbsz:3 blgp:2
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v6i32(<6 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1649,22 +1241,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp2__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[12:27], v[0:5], v[6:11], v[12:27] cbsz:3 blgp:2
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v6i32(<6 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1680,22 +1264,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp4(<6 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[10:25], v[0:5], v[6:9], v[10:25], v26, v27 op_sel_hi:[0,0,0] cbsz:3 blgp:4
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v10
-; GCN-NEXT: v_mov_b32_e32 v1, v11
-; GCN-NEXT: v_mov_b32_e32 v2, v12
-; GCN-NEXT: v_mov_b32_e32 v3, v13
-; GCN-NEXT: v_mov_b32_e32 v4, v14
-; GCN-NEXT: v_mov_b32_e32 v5, v15
-; GCN-NEXT: v_mov_b32_e32 v6, v16
-; GCN-NEXT: v_mov_b32_e32 v7, v17
-; GCN-NEXT: v_mov_b32_e32 v8, v18
-; GCN-NEXT: v_mov_b32_e32 v9, v19
-; GCN-NEXT: v_mov_b32_e32 v10, v20
-; GCN-NEXT: v_mov_b32_e32 v11, v21
-; GCN-NEXT: v_mov_b32_e32 v12, v22
-; GCN-NEXT: v_mov_b32_e32 v13, v23
-; GCN-NEXT: v_mov_b32_e32 v14, v24
-; GCN-NEXT: v_mov_b32_e32 v15, v25
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v4i32(<6 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1710,22 +1286,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp4__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[10:25], v[0:5], v[6:9], v[10:25] cbsz:3 blgp:4
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v10
-; GCN-NEXT: v_mov_b32_e32 v1, v11
-; GCN-NEXT: v_mov_b32_e32 v2, v12
-; GCN-NEXT: v_mov_b32_e32 v3, v13
-; GCN-NEXT: v_mov_b32_e32 v4, v14
-; GCN-NEXT: v_mov_b32_e32 v5, v15
-; GCN-NEXT: v_mov_b32_e32 v6, v16
-; GCN-NEXT: v_mov_b32_e32 v7, v17
-; GCN-NEXT: v_mov_b32_e32 v8, v18
-; GCN-NEXT: v_mov_b32_e32 v9, v19
-; GCN-NEXT: v_mov_b32_e32 v10, v20
-; GCN-NEXT: v_mov_b32_e32 v11, v21
-; GCN-NEXT: v_mov_b32_e32 v12, v22
-; GCN-NEXT: v_mov_b32_e32 v13, v23
-; GCN-NEXT: v_mov_b32_e32 v14, v24
-; GCN-NEXT: v_mov_b32_e32 v15, v25
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v4i32(<6 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1741,22 +1309,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp3(<6 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[12:27], v[0:5], v[6:11], v[12:27], v28, v29 op_sel_hi:[0,0,0] cbsz:3 blgp:3
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v6i32(<6 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1771,22 +1331,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz3__blgp3__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[12:27], v[0:5], v[6:11], v[12:27] cbsz:3 blgp:3
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v6i32(<6 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 3, ; cbsz
@@ -1802,22 +1354,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp4(<6 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[10:25], v[0:5], v[6:9], v[10:25], v26, v27 op_sel_hi:[0,0,0] cbsz:2 blgp:4
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v10
-; GCN-NEXT: v_mov_b32_e32 v1, v11
-; GCN-NEXT: v_mov_b32_e32 v2, v12
-; GCN-NEXT: v_mov_b32_e32 v3, v13
-; GCN-NEXT: v_mov_b32_e32 v4, v14
-; GCN-NEXT: v_mov_b32_e32 v5, v15
-; GCN-NEXT: v_mov_b32_e32 v6, v16
-; GCN-NEXT: v_mov_b32_e32 v7, v17
-; GCN-NEXT: v_mov_b32_e32 v8, v18
-; GCN-NEXT: v_mov_b32_e32 v9, v19
-; GCN-NEXT: v_mov_b32_e32 v10, v20
-; GCN-NEXT: v_mov_b32_e32 v11, v21
-; GCN-NEXT: v_mov_b32_e32 v12, v22
-; GCN-NEXT: v_mov_b32_e32 v13, v23
-; GCN-NEXT: v_mov_b32_e32 v14, v24
-; GCN-NEXT: v_mov_b32_e32 v15, v25
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v4i32(<6 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1832,22 +1376,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz2__blgp4__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[10:25], v[0:5], v[6:9], v[10:25] cbsz:2 blgp:4
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v10
-; GCN-NEXT: v_mov_b32_e32 v1, v11
-; GCN-NEXT: v_mov_b32_e32 v2, v12
-; GCN-NEXT: v_mov_b32_e32 v3, v13
-; GCN-NEXT: v_mov_b32_e32 v4, v14
-; GCN-NEXT: v_mov_b32_e32 v5, v15
-; GCN-NEXT: v_mov_b32_e32 v6, v16
-; GCN-NEXT: v_mov_b32_e32 v7, v17
-; GCN-NEXT: v_mov_b32_e32 v8, v18
-; GCN-NEXT: v_mov_b32_e32 v9, v19
-; GCN-NEXT: v_mov_b32_e32 v10, v20
-; GCN-NEXT: v_mov_b32_e32 v11, v21
-; GCN-NEXT: v_mov_b32_e32 v12, v22
-; GCN-NEXT: v_mov_b32_e32 v13, v23
-; GCN-NEXT: v_mov_b32_e32 v14, v24
-; GCN-NEXT: v_mov_b32_e32 v15, v25
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v4i32(<6 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -1864,22 +1400,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp0(<4 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[12:27], v[0:3], v[4:11], v[12:27], v28, v29 op_sel_hi:[0,0,0] cbsz:4
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v8i32(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -1895,22 +1423,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp0__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[12:27], v[0:3], v[4:11], v[12:27] cbsz:4
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v8i32(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -1927,22 +1447,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp1(<4 x
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[12:27], v[0:3], v[4:11], v[12:27], v28, v29 op_sel_hi:[0,0,0] cbsz:4 blgp:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v8i32(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -1958,22 +1470,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp1__cons
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[12:27], v[0:3], v[4:11], v[12:27] cbsz:4 blgp:1
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v8i32(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -1989,22 +1493,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp2(<4 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[10:25], v[0:3], v[4:9], v[10:25], v26, v27 op_sel_hi:[0,0,0] cbsz:4 blgp:2
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v10
-; GCN-NEXT: v_mov_b32_e32 v1, v11
-; GCN-NEXT: v_mov_b32_e32 v2, v12
-; GCN-NEXT: v_mov_b32_e32 v3, v13
-; GCN-NEXT: v_mov_b32_e32 v4, v14
-; GCN-NEXT: v_mov_b32_e32 v5, v15
-; GCN-NEXT: v_mov_b32_e32 v6, v16
-; GCN-NEXT: v_mov_b32_e32 v7, v17
-; GCN-NEXT: v_mov_b32_e32 v8, v18
-; GCN-NEXT: v_mov_b32_e32 v9, v19
-; GCN-NEXT: v_mov_b32_e32 v10, v20
-; GCN-NEXT: v_mov_b32_e32 v11, v21
-; GCN-NEXT: v_mov_b32_e32 v12, v22
-; GCN-NEXT: v_mov_b32_e32 v13, v23
-; GCN-NEXT: v_mov_b32_e32 v14, v24
-; GCN-NEXT: v_mov_b32_e32 v15, v25
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v6i32(<4 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -2019,22 +1515,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp2__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[10:25], v[0:3], v[4:9], v[10:25] cbsz:4 blgp:2
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v10
-; GCN-NEXT: v_mov_b32_e32 v1, v11
-; GCN-NEXT: v_mov_b32_e32 v2, v12
-; GCN-NEXT: v_mov_b32_e32 v3, v13
-; GCN-NEXT: v_mov_b32_e32 v4, v14
-; GCN-NEXT: v_mov_b32_e32 v5, v15
-; GCN-NEXT: v_mov_b32_e32 v6, v16
-; GCN-NEXT: v_mov_b32_e32 v7, v17
-; GCN-NEXT: v_mov_b32_e32 v8, v18
-; GCN-NEXT: v_mov_b32_e32 v9, v19
-; GCN-NEXT: v_mov_b32_e32 v10, v20
-; GCN-NEXT: v_mov_b32_e32 v11, v21
-; GCN-NEXT: v_mov_b32_e32 v12, v22
-; GCN-NEXT: v_mov_b32_e32 v13, v23
-; GCN-NEXT: v_mov_b32_e32 v14, v24
-; GCN-NEXT: v_mov_b32_e32 v15, v25
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v6i32(<4 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -2050,22 +1538,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp3(<4 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[10:25], v[0:3], v[4:9], v[10:25], v26, v27 op_sel_hi:[0,0,0] cbsz:4 blgp:3
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v10
-; GCN-NEXT: v_mov_b32_e32 v1, v11
-; GCN-NEXT: v_mov_b32_e32 v2, v12
-; GCN-NEXT: v_mov_b32_e32 v3, v13
-; GCN-NEXT: v_mov_b32_e32 v4, v14
-; GCN-NEXT: v_mov_b32_e32 v5, v15
-; GCN-NEXT: v_mov_b32_e32 v6, v16
-; GCN-NEXT: v_mov_b32_e32 v7, v17
-; GCN-NEXT: v_mov_b32_e32 v8, v18
-; GCN-NEXT: v_mov_b32_e32 v9, v19
-; GCN-NEXT: v_mov_b32_e32 v10, v20
-; GCN-NEXT: v_mov_b32_e32 v11, v21
-; GCN-NEXT: v_mov_b32_e32 v12, v22
-; GCN-NEXT: v_mov_b32_e32 v13, v23
-; GCN-NEXT: v_mov_b32_e32 v14, v24
-; GCN-NEXT: v_mov_b32_e32 v15, v25
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v6i32(<4 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -2080,22 +1560,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp3__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[10:25], v[0:3], v[4:9], v[10:25] cbsz:4 blgp:3
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v10
-; GCN-NEXT: v_mov_b32_e32 v1, v11
-; GCN-NEXT: v_mov_b32_e32 v2, v12
-; GCN-NEXT: v_mov_b32_e32 v3, v13
-; GCN-NEXT: v_mov_b32_e32 v4, v14
-; GCN-NEXT: v_mov_b32_e32 v5, v15
-; GCN-NEXT: v_mov_b32_e32 v6, v16
-; GCN-NEXT: v_mov_b32_e32 v7, v17
-; GCN-NEXT: v_mov_b32_e32 v8, v18
-; GCN-NEXT: v_mov_b32_e32 v9, v19
-; GCN-NEXT: v_mov_b32_e32 v10, v20
-; GCN-NEXT: v_mov_b32_e32 v11, v21
-; GCN-NEXT: v_mov_b32_e32 v12, v22
-; GCN-NEXT: v_mov_b32_e32 v13, v23
-; GCN-NEXT: v_mov_b32_e32 v14, v24
-; GCN-NEXT: v_mov_b32_e32 v15, v25
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v6i32(<4 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -2111,22 +1583,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp4(<4 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[8:23], v[0:3], v[4:7], v[8:23], v24, v25 op_sel_hi:[0,0,0] cbsz:4 blgp:4
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v8
-; GCN-NEXT: v_mov_b32_e32 v1, v9
-; GCN-NEXT: v_mov_b32_e32 v2, v10
-; GCN-NEXT: v_mov_b32_e32 v3, v11
-; GCN-NEXT: v_mov_b32_e32 v4, v12
-; GCN-NEXT: v_mov_b32_e32 v5, v13
-; GCN-NEXT: v_mov_b32_e32 v6, v14
-; GCN-NEXT: v_mov_b32_e32 v7, v15
-; GCN-NEXT: v_mov_b32_e32 v8, v16
-; GCN-NEXT: v_mov_b32_e32 v9, v17
-; GCN-NEXT: v_mov_b32_e32 v10, v18
-; GCN-NEXT: v_mov_b32_e32 v11, v19
-; GCN-NEXT: v_mov_b32_e32 v12, v20
-; GCN-NEXT: v_mov_b32_e32 v13, v21
-; GCN-NEXT: v_mov_b32_e32 v14, v22
-; GCN-NEXT: v_mov_b32_e32 v15, v23
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v4i32(<4 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -2141,22 +1605,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__cbsz4__blgp4__cons
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[8:23], v[0:3], v[4:7], v[8:23] cbsz:4 blgp:4
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v8
-; GCN-NEXT: v_mov_b32_e32 v1, v9
-; GCN-NEXT: v_mov_b32_e32 v2, v10
-; GCN-NEXT: v_mov_b32_e32 v3, v11
-; GCN-NEXT: v_mov_b32_e32 v4, v12
-; GCN-NEXT: v_mov_b32_e32 v5, v13
-; GCN-NEXT: v_mov_b32_e32 v6, v14
-; GCN-NEXT: v_mov_b32_e32 v7, v15
-; GCN-NEXT: v_mov_b32_e32 v8, v16
-; GCN-NEXT: v_mov_b32_e32 v9, v17
-; GCN-NEXT: v_mov_b32_e32 v10, v18
-; GCN-NEXT: v_mov_b32_e32 v11, v19
-; GCN-NEXT: v_mov_b32_e32 v12, v20
-; GCN-NEXT: v_mov_b32_e32 v13, v21
-; GCN-NEXT: v_mov_b32_e32 v14, v22
-; GCN-NEXT: v_mov_b32_e32 v15, v23
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v4i32.v4i32(<4 x i32> %arg0, <4 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -2174,29 +1630,20 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__sgpr_scaleA__sgpr_
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: scratch_load_dword v31, off, s32
-; GCN-NEXT: v_mov_b32_e32 v32, s0
-; GCN-NEXT: v_mov_b32_e32 v33, s1
+; GCN-NEXT: v_mov_b64_e32 v[32:33], s[0:1]
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: s_nop 0
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0]
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 %scale0, i32 0, i32 %scale1)
ret <16 x float> %result
@@ -2214,22 +1661,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__sgpr_scaleA__vgpr_
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0]
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 %scale0, i32 0, i32 %scale1)
ret <16 x float> %result
@@ -2247,22 +1686,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__vgpr_scaleA__sgpr_
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0]
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 %scale0, i32 0, i32 %scale1)
ret <16 x float> %result
@@ -2272,14 +1703,10 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgprs(<8 x i32> inr
; SDAG-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgprs:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
-; SDAG-NEXT: v_mov_b32_e32 v30, s16
-; SDAG-NEXT: v_mov_b32_e32 v31, s17
-; SDAG-NEXT: v_mov_b32_e32 v32, s18
-; SDAG-NEXT: v_mov_b32_e32 v33, s19
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[18:19]
; SDAG-NEXT: v_readfirstlane_b32 s4, v13
; SDAG-NEXT: v_readfirstlane_b32 s5, v12
; SDAG-NEXT: v_readfirstlane_b32 s6, v11
@@ -2294,10 +1721,8 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgprs(<8 x i32> inr
; SDAG-NEXT: v_readfirstlane_b32 s15, v2
; SDAG-NEXT: v_readfirstlane_b32 s40, v1
; SDAG-NEXT: v_readfirstlane_b32 s41, v0
-; SDAG-NEXT: v_mov_b32_e32 v16, v15
-; SDAG-NEXT: v_mov_b32_e32 v17, v14
-; SDAG-NEXT: v_mov_b32_e32 v0, s28
-; SDAG-NEXT: v_mov_b32_e32 v1, s29
+; SDAG-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[1,0]
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v2, s41
; SDAG-NEXT: v_mov_b32_e32 v3, s40
; SDAG-NEXT: v_mov_b32_e32 v4, s15
@@ -2312,14 +1737,10 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgprs(<8 x i32> inr
; SDAG-NEXT: v_mov_b32_e32 v13, s6
; SDAG-NEXT: v_mov_b32_e32 v14, s5
; SDAG-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-NEXT: v_mov_b32_e32 v18, s20
-; SDAG-NEXT: v_mov_b32_e32 v19, s21
-; SDAG-NEXT: v_mov_b32_e32 v20, s22
-; SDAG-NEXT: v_mov_b32_e32 v21, s23
-; SDAG-NEXT: v_mov_b32_e32 v22, s24
-; SDAG-NEXT: v_mov_b32_e32 v23, s25
-; SDAG-NEXT: v_mov_b32_e32 v24, s26
-; SDAG-NEXT: v_mov_b32_e32 v25, s27
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[26:27]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[0:15], v[26:33], v[18:25], v[0:15], v17, v16 op_sel_hi:[0,0,0]
; SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -2348,8 +1769,7 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgprs(<8 x i32> inr
; GISEL-NEXT: s_mov_b32 s36, s28
; GISEL-NEXT: s_mov_b32 s37, s29
; GISEL-NEXT: v_writelane_b32 v34, s51, 7
-; GISEL-NEXT: v_mov_b32_e32 v16, v14
-; GISEL-NEXT: v_mov_b32_e32 v17, v15
+; GISEL-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GISEL-NEXT: v_readfirstlane_b32 s38, v0
; GISEL-NEXT: v_readfirstlane_b32 s39, v1
; GISEL-NEXT: v_readfirstlane_b32 s40, v2
@@ -2398,35 +1818,23 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_vgpr__sgp
; SDAG-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_vgpr__sgpr_vgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
-; SDAG-NEXT: v_mov_b32_e32 v30, s16
-; SDAG-NEXT: v_mov_b32_e32 v31, s17
-; SDAG-NEXT: v_mov_b32_e32 v32, s18
-; SDAG-NEXT: v_mov_b32_e32 v33, s19
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[18:19]
; SDAG-NEXT: v_mov_b32_e32 v25, s20
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[8:23], v[26:33], v[0:7], v[8:23], v25, v24 op_sel_hi:[0,0,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v8
-; SDAG-NEXT: v_mov_b32_e32 v1, v9
-; SDAG-NEXT: v_mov_b32_e32 v2, v10
-; SDAG-NEXT: v_mov_b32_e32 v3, v11
-; SDAG-NEXT: v_mov_b32_e32 v4, v12
-; SDAG-NEXT: v_mov_b32_e32 v5, v13
-; SDAG-NEXT: v_mov_b32_e32 v6, v14
-; SDAG-NEXT: v_mov_b32_e32 v7, v15
-; SDAG-NEXT: v_mov_b32_e32 v8, v16
-; SDAG-NEXT: v_mov_b32_e32 v9, v17
-; SDAG-NEXT: v_mov_b32_e32 v10, v18
-; SDAG-NEXT: v_mov_b32_e32 v11, v19
-; SDAG-NEXT: v_mov_b32_e32 v12, v20
-; SDAG-NEXT: v_mov_b32_e32 v13, v21
-; SDAG-NEXT: v_mov_b32_e32 v14, v22
-; SDAG-NEXT: v_mov_b32_e32 v15, v23
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_vgpr__sgpr_vgpr:
@@ -2445,22 +1853,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_vgpr__sgp
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[8:23], v[26:33], v[0:7], v[8:23], v25, v24 op_sel_hi:[0,0,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v8
-; GISEL-NEXT: v_mov_b32_e32 v1, v9
-; GISEL-NEXT: v_mov_b32_e32 v2, v10
-; GISEL-NEXT: v_mov_b32_e32 v3, v11
-; GISEL-NEXT: v_mov_b32_e32 v4, v12
-; GISEL-NEXT: v_mov_b32_e32 v5, v13
-; GISEL-NEXT: v_mov_b32_e32 v6, v14
-; GISEL-NEXT: v_mov_b32_e32 v7, v15
-; GISEL-NEXT: v_mov_b32_e32 v8, v16
-; GISEL-NEXT: v_mov_b32_e32 v9, v17
-; GISEL-NEXT: v_mov_b32_e32 v10, v18
-; GISEL-NEXT: v_mov_b32_e32 v11, v19
-; GISEL-NEXT: v_mov_b32_e32 v12, v20
-; GISEL-NEXT: v_mov_b32_e32 v13, v21
-; GISEL-NEXT: v_mov_b32_e32 v14, v22
-; GISEL-NEXT: v_mov_b32_e32 v15, v23
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 %scale0, i32 0, i32 %scale1)
ret <16 x float> %result
@@ -2470,35 +1870,23 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_vgpr__vgp
; SDAG-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_vgpr__vgpr_sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
-; SDAG-NEXT: v_mov_b32_e32 v30, s16
-; SDAG-NEXT: v_mov_b32_e32 v31, s17
-; SDAG-NEXT: v_mov_b32_e32 v32, s18
-; SDAG-NEXT: v_mov_b32_e32 v33, s19
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[18:19]
; SDAG-NEXT: v_mov_b32_e32 v25, s20
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[8:23], v[26:33], v[0:7], v[8:23], v24, v25 op_sel_hi:[0,0,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v8
-; SDAG-NEXT: v_mov_b32_e32 v1, v9
-; SDAG-NEXT: v_mov_b32_e32 v2, v10
-; SDAG-NEXT: v_mov_b32_e32 v3, v11
-; SDAG-NEXT: v_mov_b32_e32 v4, v12
-; SDAG-NEXT: v_mov_b32_e32 v5, v13
-; SDAG-NEXT: v_mov_b32_e32 v6, v14
-; SDAG-NEXT: v_mov_b32_e32 v7, v15
-; SDAG-NEXT: v_mov_b32_e32 v8, v16
-; SDAG-NEXT: v_mov_b32_e32 v9, v17
-; SDAG-NEXT: v_mov_b32_e32 v10, v18
-; SDAG-NEXT: v_mov_b32_e32 v11, v19
-; SDAG-NEXT: v_mov_b32_e32 v12, v20
-; SDAG-NEXT: v_mov_b32_e32 v13, v21
-; SDAG-NEXT: v_mov_b32_e32 v14, v22
-; SDAG-NEXT: v_mov_b32_e32 v15, v23
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_vgpr__vgpr_sgpr:
@@ -2517,22 +1905,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_vgpr__vgp
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[8:23], v[26:33], v[0:7], v[8:23], v24, v25 op_sel_hi:[0,0,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v8
-; GISEL-NEXT: v_mov_b32_e32 v1, v9
-; GISEL-NEXT: v_mov_b32_e32 v2, v10
-; GISEL-NEXT: v_mov_b32_e32 v3, v11
-; GISEL-NEXT: v_mov_b32_e32 v4, v12
-; GISEL-NEXT: v_mov_b32_e32 v5, v13
-; GISEL-NEXT: v_mov_b32_e32 v6, v14
-; GISEL-NEXT: v_mov_b32_e32 v7, v15
-; GISEL-NEXT: v_mov_b32_e32 v8, v16
-; GISEL-NEXT: v_mov_b32_e32 v9, v17
-; GISEL-NEXT: v_mov_b32_e32 v10, v18
-; GISEL-NEXT: v_mov_b32_e32 v11, v19
-; GISEL-NEXT: v_mov_b32_e32 v12, v20
-; GISEL-NEXT: v_mov_b32_e32 v13, v21
-; GISEL-NEXT: v_mov_b32_e32 v14, v22
-; GISEL-NEXT: v_mov_b32_e32 v15, v23
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 %scale0, i32 0, i32 %scale1)
ret <16 x float> %result
@@ -2542,35 +1922,23 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_vgpr_sgpr_vgpr__vgp
; SDAG-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_vgpr_sgpr_vgpr__vgpr_sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
-; SDAG-NEXT: v_mov_b32_e32 v30, s16
-; SDAG-NEXT: v_mov_b32_e32 v31, s17
-; SDAG-NEXT: v_mov_b32_e32 v32, s18
-; SDAG-NEXT: v_mov_b32_e32 v33, s19
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[18:19]
; SDAG-NEXT: v_mov_b32_e32 v25, s20
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[8:23], v[0:7], v[26:33], v[8:23], v24, v25 op_sel_hi:[0,0,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v8
-; SDAG-NEXT: v_mov_b32_e32 v1, v9
-; SDAG-NEXT: v_mov_b32_e32 v2, v10
-; SDAG-NEXT: v_mov_b32_e32 v3, v11
-; SDAG-NEXT: v_mov_b32_e32 v4, v12
-; SDAG-NEXT: v_mov_b32_e32 v5, v13
-; SDAG-NEXT: v_mov_b32_e32 v6, v14
-; SDAG-NEXT: v_mov_b32_e32 v7, v15
-; SDAG-NEXT: v_mov_b32_e32 v8, v16
-; SDAG-NEXT: v_mov_b32_e32 v9, v17
-; SDAG-NEXT: v_mov_b32_e32 v10, v18
-; SDAG-NEXT: v_mov_b32_e32 v11, v19
-; SDAG-NEXT: v_mov_b32_e32 v12, v20
-; SDAG-NEXT: v_mov_b32_e32 v13, v21
-; SDAG-NEXT: v_mov_b32_e32 v14, v22
-; SDAG-NEXT: v_mov_b32_e32 v15, v23
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_vgpr_sgpr_vgpr__vgpr_sgpr:
@@ -2589,22 +1957,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_vgpr_sgpr_vgpr__vgp
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[8:23], v[0:7], v[26:33], v[8:23], v24, v25 op_sel_hi:[0,0,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v8
-; GISEL-NEXT: v_mov_b32_e32 v1, v9
-; GISEL-NEXT: v_mov_b32_e32 v2, v10
-; GISEL-NEXT: v_mov_b32_e32 v3, v11
-; GISEL-NEXT: v_mov_b32_e32 v4, v12
-; GISEL-NEXT: v_mov_b32_e32 v5, v13
-; GISEL-NEXT: v_mov_b32_e32 v6, v14
-; GISEL-NEXT: v_mov_b32_e32 v7, v15
-; GISEL-NEXT: v_mov_b32_e32 v8, v16
-; GISEL-NEXT: v_mov_b32_e32 v9, v17
-; GISEL-NEXT: v_mov_b32_e32 v10, v18
-; GISEL-NEXT: v_mov_b32_e32 v11, v19
-; GISEL-NEXT: v_mov_b32_e32 v12, v20
-; GISEL-NEXT: v_mov_b32_e32 v13, v21
-; GISEL-NEXT: v_mov_b32_e32 v14, v22
-; GISEL-NEXT: v_mov_b32_e32 v15, v23
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 %scale0, i32 0, i32 %scale1)
ret <16 x float> %result
@@ -2614,38 +1974,22 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_vgpr_vgpr_sgpr__vgp
; SDAG-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_vgpr_vgpr_sgpr__vgpr_sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v33, v7
-; SDAG-NEXT: v_mov_b32_e32 v32, v6
-; SDAG-NEXT: v_mov_b32_e32 v31, v5
-; SDAG-NEXT: v_mov_b32_e32 v30, v4
-; SDAG-NEXT: v_mov_b32_e32 v29, v3
-; SDAG-NEXT: v_mov_b32_e32 v28, v2
-; SDAG-NEXT: v_mov_b32_e32 v27, v1
-; SDAG-NEXT: v_mov_b32_e32 v26, v0
-; SDAG-NEXT: v_mov_b32_e32 v25, v15
-; SDAG-NEXT: v_mov_b32_e32 v24, v14
-; SDAG-NEXT: v_mov_b32_e32 v23, v13
-; SDAG-NEXT: v_mov_b32_e32 v22, v12
-; SDAG-NEXT: v_mov_b32_e32 v21, v11
-; SDAG-NEXT: v_mov_b32_e32 v20, v10
-; SDAG-NEXT: v_mov_b32_e32 v19, v9
-; SDAG-NEXT: v_mov_b32_e32 v18, v8
-; SDAG-NEXT: v_mov_b32_e32 v0, s0
-; SDAG-NEXT: v_mov_b32_e32 v1, s1
-; SDAG-NEXT: v_mov_b32_e32 v2, s2
-; SDAG-NEXT: v_mov_b32_e32 v3, s3
-; SDAG-NEXT: v_mov_b32_e32 v4, s16
-; SDAG-NEXT: v_mov_b32_e32 v5, s17
-; SDAG-NEXT: v_mov_b32_e32 v6, s18
-; SDAG-NEXT: v_mov_b32_e32 v7, s19
-; SDAG-NEXT: v_mov_b32_e32 v8, s20
-; SDAG-NEXT: v_mov_b32_e32 v9, s21
-; SDAG-NEXT: v_mov_b32_e32 v10, s22
-; SDAG-NEXT: v_mov_b32_e32 v11, s23
-; SDAG-NEXT: v_mov_b32_e32 v12, s24
-; SDAG-NEXT: v_mov_b32_e32 v13, s25
-; SDAG-NEXT: v_mov_b32_e32 v14, s26
-; SDAG-NEXT: v_mov_b32_e32 v15, s27
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], v[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], v[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], v[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], v[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[26:27]
; SDAG-NEXT: v_mov_b32_e32 v17, s28
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[0:15], v[26:33], v[18:25], v[0:15], v16, v17 op_sel_hi:[0,0,0]
@@ -2654,24 +1998,16 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_vgpr_vgpr_sgpr__vgp
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_vgpr_vgpr_sgpr__vgpr_sgpr:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v18, v0
-; GISEL-NEXT: v_mov_b32_e32 v19, v1
-; GISEL-NEXT: v_mov_b32_e32 v20, v2
-; GISEL-NEXT: v_mov_b32_e32 v21, v3
-; GISEL-NEXT: v_mov_b32_e32 v22, v4
-; GISEL-NEXT: v_mov_b32_e32 v23, v5
-; GISEL-NEXT: v_mov_b32_e32 v24, v6
-; GISEL-NEXT: v_mov_b32_e32 v25, v7
+; GISEL-NEXT: v_mov_b64_e32 v[18:19], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[20:21], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[22:23], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[24:25], v[6:7]
; GISEL-NEXT: s_mov_b32 s12, s0
; GISEL-NEXT: s_mov_b32 s13, s1
-; GISEL-NEXT: v_mov_b32_e32 v26, v8
-; GISEL-NEXT: v_mov_b32_e32 v27, v9
-; GISEL-NEXT: v_mov_b32_e32 v28, v10
-; GISEL-NEXT: v_mov_b32_e32 v29, v11
-; GISEL-NEXT: v_mov_b32_e32 v30, v12
-; GISEL-NEXT: v_mov_b32_e32 v31, v13
-; GISEL-NEXT: v_mov_b32_e32 v32, v14
-; GISEL-NEXT: v_mov_b32_e32 v33, v15
+; GISEL-NEXT: v_mov_b64_e32 v[26:27], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[28:29], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[14:15]
; GISEL-NEXT: s_mov_b32 s14, s2
; GISEL-NEXT: s_mov_b32 s15, s3
; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
@@ -2694,15 +2030,11 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_sgpr__vgp
; SDAG-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_sgpr__vgpr_sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
-; SDAG-NEXT: v_mov_b32_e32 v30, s16
-; SDAG-NEXT: v_mov_b32_e32 v31, s17
-; SDAG-NEXT: v_mov_b32_e32 v32, s18
-; SDAG-NEXT: v_mov_b32_e32 v33, s19
-; SDAG-NEXT: v_mov_b32_e32 v16, v15
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[18:19]
+; SDAG-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[1,0]
; SDAG-NEXT: v_readfirstlane_b32 s4, v13
; SDAG-NEXT: v_readfirstlane_b32 s5, v12
; SDAG-NEXT: v_readfirstlane_b32 s6, v11
@@ -2710,25 +2042,15 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_sgpr__vgp
; SDAG-NEXT: v_readfirstlane_b32 s8, v9
; SDAG-NEXT: v_readfirstlane_b32 s9, v8
; SDAG-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-NEXT: v_mov_b32_e32 v17, v14
-; SDAG-NEXT: v_mov_b32_e32 v25, v7
-; SDAG-NEXT: v_mov_b32_e32 v24, v6
-; SDAG-NEXT: v_mov_b32_e32 v23, v5
-; SDAG-NEXT: v_mov_b32_e32 v22, v4
-; SDAG-NEXT: v_mov_b32_e32 v21, v3
-; SDAG-NEXT: v_mov_b32_e32 v20, v2
-; SDAG-NEXT: v_mov_b32_e32 v19, v1
-; SDAG-NEXT: v_mov_b32_e32 v18, v0
-; SDAG-NEXT: v_mov_b32_e32 v0, s20
-; SDAG-NEXT: v_mov_b32_e32 v1, s21
-; SDAG-NEXT: v_mov_b32_e32 v2, s22
-; SDAG-NEXT: v_mov_b32_e32 v3, s23
-; SDAG-NEXT: v_mov_b32_e32 v4, s24
-; SDAG-NEXT: v_mov_b32_e32 v5, s25
-; SDAG-NEXT: v_mov_b32_e32 v6, s26
-; SDAG-NEXT: v_mov_b32_e32 v7, s27
-; SDAG-NEXT: v_mov_b32_e32 v8, s28
-; SDAG-NEXT: v_mov_b32_e32 v9, s29
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], v[6:7]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], v[4:5]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], v[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], v[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v10, s9
; SDAG-NEXT: v_mov_b32_e32 v11, s8
; SDAG-NEXT: v_mov_b32_e32 v12, s7
@@ -2764,14 +2086,10 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0_sgpr_vgpr_sgpr__vgp
; GISEL-NEXT: s_mov_b32 s36, s20
; GISEL-NEXT: s_mov_b32 s37, s21
; GISEL-NEXT: v_writelane_b32 v34, s51, 7
-; GISEL-NEXT: v_mov_b32_e32 v18, v0
-; GISEL-NEXT: v_mov_b32_e32 v19, v1
-; GISEL-NEXT: v_mov_b32_e32 v20, v2
-; GISEL-NEXT: v_mov_b32_e32 v21, v3
-; GISEL-NEXT: v_mov_b32_e32 v22, v4
-; GISEL-NEXT: v_mov_b32_e32 v23, v5
-; GISEL-NEXT: v_mov_b32_e32 v24, v6
-; GISEL-NEXT: v_mov_b32_e32 v25, v7
+; GISEL-NEXT: v_mov_b64_e32 v[18:19], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[20:21], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[22:23], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[24:25], v[6:7]
; GISEL-NEXT: s_mov_b32 s38, s22
; GISEL-NEXT: s_mov_b32 s39, s23
; GISEL-NEXT: s_mov_b32 s40, s24
@@ -2827,22 +2145,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_inlineimm__
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_inlineimm__scaleB_inlineimm:
@@ -2856,22 +2166,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_inlineimm__
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 2, i32 33, i32 2, i32 -2)
ret <16 x float> %result
@@ -2889,22 +2191,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scale
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scaleB_inlineimm:
@@ -2918,22 +2212,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scale
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 2, i32 65, i32 2, i32 -2)
ret <16 x float> %result
@@ -2951,22 +2237,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scale
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scaleB_FP_literal:
@@ -2980,22 +2258,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scale
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 2, i32 65, i32 2, i32 1065353216)
ret <16 x float> %result
@@ -3013,22 +2283,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_FP_literal_
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_FP_literal__scaleB_inlineimm:
@@ -3042,22 +2304,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_FP_literal_
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 2, i32 1065353216, i32 2, i32 -2)
ret <16 x float> %result
@@ -3075,22 +2329,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_FP_literal_
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_FP_literal__scaleB_FP_literal:
@@ -3104,22 +2350,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_FP_literal_
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 2, i32 1042479491, i32 2, i32 1065353216)
ret <16 x float> %result
@@ -3137,22 +2375,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scale
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[1,1,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scaleB_kimm:
@@ -3166,22 +2396,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__scaleA_kimm__scale
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[1,1,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 2, i32 65, i32 2, i32 77)
ret <16 x float> %result
@@ -3195,22 +2417,15 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4__vgprcd(<8 x i32>
; SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x80
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[36:37]
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
-; SDAG-NEXT: v_mov_b32_e32 v20, s12
-; SDAG-NEXT: v_mov_b32_e32 v21, s13
-; SDAG-NEXT: v_mov_b32_e32 v22, s14
-; SDAG-NEXT: v_mov_b32_e32 v23, s15
-; SDAG-NEXT: v_mov_b32_e32 v24, s16
-; SDAG-NEXT: v_mov_b32_e32 v25, s17
-; SDAG-NEXT: v_mov_b32_e32 v26, s18
-; SDAG-NEXT: v_mov_b32_e32 v27, s19
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[18:19]
; SDAG-NEXT: v_mov_b32_e32 v28, s20
; SDAG-NEXT: v_mov_b32_e32 v29, s21
-; SDAG-NEXT: v_mov_b32_e32 v30, s22
-; SDAG-NEXT: v_mov_b32_e32 v31, s23
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[38:39]
; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[40:41]
; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[42:43]
@@ -3218,8 +2433,7 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4__vgprcd(<8 x i32>
; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[46:47]
; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[48:49]
; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[50:51]
-; SDAG-NEXT: v_mov_b32_e32 v32, s0
-; SDAG-NEXT: v_mov_b32_e32 v33, s1
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[0:1]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[0:15], v[16:23], v[24:31], v[0:15], v32, v33 op_sel:[1,1,0] op_sel_hi:[1,0,0] blgp:2
; SDAG-NEXT: v_mov_b32_e32 v16, 0
@@ -3253,8 +2467,7 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4__vgprcd(<8 x i32>
; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[46:47]
; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[48:49]
; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[50:51]
-; GISEL-NEXT: v_mov_b32_e32 v32, s0
-; GISEL-NEXT: v_mov_b32_e32 v33, s1
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], s[0:1]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[0:15], v[16:23], v[24:31], v[0:15], v32, v33 op_sel:[1,1,0] op_sel_hi:[1,0,0] blgp:2
; GISEL-NEXT: v_mov_b32_e32 v16, 0
@@ -3279,21 +2492,14 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4__vgprcd___scaleA_
; SDAG-NEXT: v_mov_b32_e32 v33, 0x41
; SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x80
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
-; SDAG-NEXT: v_mov_b32_e32 v20, s12
-; SDAG-NEXT: v_mov_b32_e32 v21, s13
-; SDAG-NEXT: v_mov_b32_e32 v22, s14
-; SDAG-NEXT: v_mov_b32_e32 v23, s15
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[14:15]
; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[36:37]
-; SDAG-NEXT: v_mov_b32_e32 v24, s16
-; SDAG-NEXT: v_mov_b32_e32 v25, s17
-; SDAG-NEXT: v_mov_b32_e32 v26, s18
-; SDAG-NEXT: v_mov_b32_e32 v27, s19
-; SDAG-NEXT: v_mov_b32_e32 v28, s20
-; SDAG-NEXT: v_mov_b32_e32 v29, s21
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
; SDAG-NEXT: v_mov_b32_e32 v30, s22
; SDAG-NEXT: v_mov_b32_e32 v31, s23
; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[38:39]
@@ -3358,26 +2564,19 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__nonmac(<8 x
; SDAG: ; %bb.0:
; SDAG-NEXT: s_load_dwordx16 s[12:27], s[4:5], 0x0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v18, s12
-; SDAG-NEXT: v_mov_b32_e32 v19, s13
-; SDAG-NEXT: v_mov_b32_e32 v20, s14
-; SDAG-NEXT: v_mov_b32_e32 v21, s15
-; SDAG-NEXT: v_mov_b32_e32 v22, s16
-; SDAG-NEXT: v_mov_b32_e32 v23, s17
-; SDAG-NEXT: v_mov_b32_e32 v24, s18
-; SDAG-NEXT: v_mov_b32_e32 v25, s19
-; SDAG-NEXT: v_mov_b32_e32 v26, s20
-; SDAG-NEXT: v_mov_b32_e32 v27, s21
-; SDAG-NEXT: v_mov_b32_e32 v28, s22
-; SDAG-NEXT: v_mov_b32_e32 v29, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[22:23]
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x40
; SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x80
; SDAG-NEXT: v_mov_b32_e32 v30, s24
; SDAG-NEXT: v_mov_b32_e32 v31, s25
-; SDAG-NEXT: v_mov_b32_e32 v32, s26
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[26:27]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
-; SDAG-NEXT: v_mov_b32_e32 v33, s27
; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[12:13]
; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[14:15]
@@ -3385,35 +2584,27 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__nonmac(<8 x
; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[20:21]
; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
-; SDAG-NEXT: v_mov_b32_e32 v16, s0
-; SDAG-NEXT: v_mov_b32_e32 v17, s1
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[0:15], v[18:25], v[26:33], v[0:15], v16, v17 op_sel_hi:[0,0,0]
-; SDAG-NEXT: v_mov_b32_e32 v18, s20
-; SDAG-NEXT: v_mov_b32_e32 v19, s21
-; SDAG-NEXT: v_mov_b32_e32 v20, s22
-; SDAG-NEXT: v_mov_b32_e32 v21, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[16:17], 48
; SDAG-NEXT: global_store_dwordx4 v[16:17], v[18:21], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v22, s18
-; SDAG-NEXT: v_mov_b32_e32 v23, s19
-; SDAG-NEXT: v_mov_b32_e32 v20, s16
-; SDAG-NEXT: v_mov_b32_e32 v21, s17
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; SDAG-NEXT: v_mov_b64_e32 v[18:19], 32
; SDAG-NEXT: global_store_dwordx4 v[18:19], v[20:23], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v24, s14
-; SDAG-NEXT: v_mov_b32_e32 v25, s15
-; SDAG-NEXT: v_mov_b32_e32 v22, s12
-; SDAG-NEXT: v_mov_b32_e32 v23, s13
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[12:13]
; SDAG-NEXT: v_mov_b64_e32 v[20:21], 16
; SDAG-NEXT: global_store_dwordx4 v[20:21], v[22:25], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-NEXT: v_mov_b32_e32 v25, s9
+; SDAG-NEXT: s_nop 0
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
; SDAG-NEXT: v_mov_b64_e32 v[22:23], 0
; SDAG-NEXT: global_store_dwordx4 v[22:23], v[24:27], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
@@ -3451,8 +2642,7 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__nonmac(<8 x
; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v36, s0
-; GISEL-NEXT: v_mov_b32_e32 v37, s1
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], s[0:1]
; GISEL-NEXT: v_mov_b64_e32 v[38:39], 48
; GISEL-NEXT: s_nop 0
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[0:15], v[16:23], v[24:31], v[0:15], v36, v37 op_sel_hi:[0,0,0]
@@ -3496,23 +2686,15 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_25_42__nonmac(<8
; SDAG-NEXT: v_mov_b32_e32 v16, 42
; SDAG-NEXT: v_mov_b32_e32 v17, 25
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v18, s12
-; SDAG-NEXT: v_mov_b32_e32 v19, s13
-; SDAG-NEXT: v_mov_b32_e32 v20, s14
-; SDAG-NEXT: v_mov_b32_e32 v21, s15
-; SDAG-NEXT: v_mov_b32_e32 v22, s16
-; SDAG-NEXT: v_mov_b32_e32 v23, s17
-; SDAG-NEXT: v_mov_b32_e32 v24, s18
-; SDAG-NEXT: v_mov_b32_e32 v25, s19
-; SDAG-NEXT: v_mov_b32_e32 v26, s20
-; SDAG-NEXT: v_mov_b32_e32 v27, s21
-; SDAG-NEXT: v_mov_b32_e32 v28, s22
-; SDAG-NEXT: v_mov_b32_e32 v29, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[22:23]
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x40
-; SDAG-NEXT: v_mov_b32_e32 v30, s24
-; SDAG-NEXT: v_mov_b32_e32 v31, s25
-; SDAG-NEXT: v_mov_b32_e32 v32, s26
-; SDAG-NEXT: v_mov_b32_e32 v33, s27
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[26:27]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
@@ -3524,31 +2706,24 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_25_42__nonmac(<8
; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[0:15], v[18:25], v[26:33], v[0:15], v17, v16 op_sel_hi:[0,0,0] blgp:2
-; SDAG-NEXT: v_mov_b32_e32 v18, s20
-; SDAG-NEXT: v_mov_b32_e32 v19, s21
-; SDAG-NEXT: v_mov_b32_e32 v20, s22
-; SDAG-NEXT: v_mov_b32_e32 v21, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[16:17], 48
; SDAG-NEXT: global_store_dwordx4 v[16:17], v[18:21], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v22, s18
-; SDAG-NEXT: v_mov_b32_e32 v23, s19
-; SDAG-NEXT: v_mov_b32_e32 v20, s16
-; SDAG-NEXT: v_mov_b32_e32 v21, s17
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
; SDAG-NEXT: v_mov_b64_e32 v[18:19], 32
; SDAG-NEXT: global_store_dwordx4 v[18:19], v[20:23], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v24, s14
-; SDAG-NEXT: v_mov_b32_e32 v25, s15
-; SDAG-NEXT: v_mov_b32_e32 v22, s12
-; SDAG-NEXT: v_mov_b32_e32 v23, s13
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[12:13]
; SDAG-NEXT: v_mov_b64_e32 v[20:21], 16
; SDAG-NEXT: global_store_dwordx4 v[20:21], v[22:25], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-NEXT: v_mov_b32_e32 v25, s9
+; SDAG-NEXT: s_nop 0
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
; SDAG-NEXT: v_mov_b64_e32 v[22:23], 0
; SDAG-NEXT: global_store_dwordx4 v[22:23], v[24:27], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
@@ -3627,23 +2802,15 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__vgprcd_nonma
; SDAG: ; %bb.0:
; SDAG-NEXT: s_load_dwordx16 s[12:27], s[4:5], 0x0
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v32, s12
-; SDAG-NEXT: v_mov_b32_e32 v33, s13
-; SDAG-NEXT: v_mov_b32_e32 v34, s14
-; SDAG-NEXT: v_mov_b32_e32 v35, s15
-; SDAG-NEXT: v_mov_b32_e32 v36, s16
-; SDAG-NEXT: v_mov_b32_e32 v37, s17
-; SDAG-NEXT: v_mov_b32_e32 v38, s18
-; SDAG-NEXT: v_mov_b32_e32 v39, s19
-; SDAG-NEXT: v_mov_b32_e32 v40, s20
-; SDAG-NEXT: v_mov_b32_e32 v41, s21
-; SDAG-NEXT: v_mov_b32_e32 v42, s22
-; SDAG-NEXT: v_mov_b32_e32 v43, s23
+; SDAG-NEXT: v_mov_b64_e32 v[32:33], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[34:35], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[36:37], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[38:39], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[40:41], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[42:43], s[22:23]
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x40
-; SDAG-NEXT: v_mov_b32_e32 v44, s24
-; SDAG-NEXT: v_mov_b32_e32 v45, s25
-; SDAG-NEXT: v_mov_b32_e32 v46, s26
-; SDAG-NEXT: v_mov_b32_e32 v47, s27
+; SDAG-NEXT: v_mov_b64_e32 v[44:45], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[46:47], s[26:27]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[20:21]
@@ -3656,33 +2823,25 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_0_0__vgprcd_nonma
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[0:15], v[32:39], v[40:47], v[16:31] blgp:2
; SDAG-NEXT: s_nop 14
-; SDAG-NEXT: v_mov_b32_e32 v16, s20
-; SDAG-NEXT: v_mov_b32_e32 v17, s21
-; SDAG-NEXT: v_mov_b32_e32 v18, s22
-; SDAG-NEXT: v_mov_b32_e32 v19, s23
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[20:21], 48
; SDAG-NEXT: global_store_dwordx4 v[20:21], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[22:23], 32
; SDAG-NEXT: v_mov_b64_e32 v[24:25], 16
-; SDAG-NEXT: v_mov_b32_e32 v16, s16
-; SDAG-NEXT: v_mov_b32_e32 v17, s17
-; SDAG-NEXT: v_mov_b32_e32 v18, s18
-; SDAG-NEXT: v_mov_b32_e32 v19, s19
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; SDAG-NEXT: global_store_dwordx4 v[22:23], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[26:27], 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v[24:25], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v[26:27], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v[22:23], v[8:11], off sc0 sc1
@@ -3753,23 +2912,15 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_25_42__vgprcd_non
; SDAG-NEXT: v_mov_b32_e32 v32, 42
; SDAG-NEXT: v_mov_b32_e32 v33, 25
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-NEXT: v_mov_b32_e32 v20, s16
-; SDAG-NEXT: v_mov_b32_e32 v21, s17
-; SDAG-NEXT: v_mov_b32_e32 v22, s18
-; SDAG-NEXT: v_mov_b32_e32 v23, s19
-; SDAG-NEXT: v_mov_b32_e32 v24, s20
-; SDAG-NEXT: v_mov_b32_e32 v25, s21
-; SDAG-NEXT: v_mov_b32_e32 v26, s22
-; SDAG-NEXT: v_mov_b32_e32 v27, s23
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[22:23]
; SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x40
-; SDAG-NEXT: v_mov_b32_e32 v28, s24
-; SDAG-NEXT: v_mov_b32_e32 v29, s25
-; SDAG-NEXT: v_mov_b32_e32 v30, s26
-; SDAG-NEXT: v_mov_b32_e32 v31, s27
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[30:31], s[26:27]
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
@@ -3781,33 +2932,25 @@ define amdgpu_kernel void @test_mfma_scale_f32_32x32x64_f8f6f4_25_42__vgprcd_non
; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[22:23]
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[0:15], v[16:23], v[24:31], v[0:15], v33, v32 op_sel_hi:[0,0,0] blgp:2
-; SDAG-NEXT: v_mov_b32_e32 v16, s20
-; SDAG-NEXT: v_mov_b32_e32 v17, s21
-; SDAG-NEXT: v_mov_b32_e32 v18, s22
-; SDAG-NEXT: v_mov_b32_e32 v19, s23
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[22:23]
; SDAG-NEXT: v_mov_b64_e32 v[20:21], 48
; SDAG-NEXT: global_store_dwordx4 v[20:21], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[22:23], 32
; SDAG-NEXT: v_mov_b64_e32 v[24:25], 16
-; SDAG-NEXT: v_mov_b32_e32 v16, s16
-; SDAG-NEXT: v_mov_b32_e32 v17, s17
-; SDAG-NEXT: v_mov_b32_e32 v18, s18
-; SDAG-NEXT: v_mov_b32_e32 v19, s19
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; SDAG-NEXT: global_store_dwordx4 v[22:23], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: v_mov_b64_e32 v[26:27], 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
; SDAG-NEXT: global_store_dwordx4 v[24:25], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
-; SDAG-NEXT: v_mov_b32_e32 v16, s8
-; SDAG-NEXT: v_mov_b32_e32 v17, s9
-; SDAG-NEXT: v_mov_b32_e32 v18, s10
-; SDAG-NEXT: v_mov_b32_e32 v19, s11
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[10:11]
; SDAG-NEXT: global_store_dwordx4 v[26:27], v[16:19], off sc0 sc1
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: global_store_dwordx4 v[22:23], v[8:11], off sc0 sc1
@@ -3889,22 +3032,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___constant_scale_0_0_a(
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31]
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
ret <16 x float> %result
@@ -3919,22 +3054,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___constant_scale_0_0_b(
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31]
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 3, i32 0, i32 1, i32 0)
ret <16 x float> %result
@@ -3952,22 +3079,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___constant_scale_0_1(<8
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4___constant_scale_0_1:
@@ -3981,22 +3100,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___constant_scale_0_1(<8
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1)
ret <16 x float> %result
@@ -4014,22 +3125,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___constant_scale_1_0_a(
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0]
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4___constant_scale_1_0_a:
@@ -4043,22 +3146,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___constant_scale_1_0_a(
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0]
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0)
ret <16 x float> %result
@@ -4079,22 +3174,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp8__v8i32_fp6(
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] blgp:2
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp8__v8i32_fp6:
@@ -4107,22 +3194,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp8__v8i32_fp6(
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] blgp:2
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -4142,22 +3221,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp6__v8i32_fp8(
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] cbsz:2
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp6__v8i32_fp8:
@@ -4170,22 +3241,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp6__v8i32_fp8(
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] cbsz:2
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -4204,22 +3267,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp6__v8i32_fp6(
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] cbsz:2 blgp:2
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp6__v8i32_fp6:
@@ -4231,22 +3286,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp6__v8i32_fp6(
; GISEL-NEXT: s_waitcnt vmcnt(0)
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] cbsz:2 blgp:2
; GISEL-NEXT: s_nop 11
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -4263,22 +3310,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp6__v8i32_fp6_
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31] cbsz:2 blgp:2
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 2, ; cbsz
@@ -4298,22 +3337,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp8__v8i32_fp4(
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] blgp:4
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp8__v8i32_fp4:
@@ -4326,22 +3357,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp8__v8i32_fp4(
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] blgp:4
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -4361,22 +3384,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp4__v8i32_fp8(
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] cbsz:4
; SDAG-NEXT: s_nop 15
; SDAG-NEXT: s_nop 3
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp4__v8i32_fp8:
@@ -4389,22 +3404,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp4__v8i32_fp8(
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] cbsz:4
; GISEL-NEXT: s_nop 15
; GISEL-NEXT: s_nop 3
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -4422,22 +3429,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp8__v6i32_fp4(
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:7], v[8:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] blgp:4
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v6i32(<8 x i32> %arg0, <6 x i32> %arg1, <16 x float> %arg2,
i32 0, ; cbsz
@@ -4455,22 +3454,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v6i32_fp4__v8i32_fp8(
; GCN-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[14:29], v[0:5], v[6:13], v[14:29], v30, v31 op_sel_hi:[0,0,0] cbsz:4
; GCN-NEXT: s_nop 15
; GCN-NEXT: s_nop 3
-; GCN-NEXT: v_mov_b32_e32 v0, v14
-; GCN-NEXT: v_mov_b32_e32 v1, v15
-; GCN-NEXT: v_mov_b32_e32 v2, v16
-; GCN-NEXT: v_mov_b32_e32 v3, v17
-; GCN-NEXT: v_mov_b32_e32 v4, v18
-; GCN-NEXT: v_mov_b32_e32 v5, v19
-; GCN-NEXT: v_mov_b32_e32 v6, v20
-; GCN-NEXT: v_mov_b32_e32 v7, v21
-; GCN-NEXT: v_mov_b32_e32 v8, v22
-; GCN-NEXT: v_mov_b32_e32 v9, v23
-; GCN-NEXT: v_mov_b32_e32 v10, v24
-; GCN-NEXT: v_mov_b32_e32 v11, v25
-; GCN-NEXT: v_mov_b32_e32 v12, v26
-; GCN-NEXT: v_mov_b32_e32 v13, v27
-; GCN-NEXT: v_mov_b32_e32 v14, v28
-; GCN-NEXT: v_mov_b32_e32 v15, v29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v6i32.v8i32(<6 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -4489,22 +3480,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp4__v8i32_fp4(
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v33, v32 op_sel_hi:[0,0,0] cbsz:4 blgp:4
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v16
-; SDAG-NEXT: v_mov_b32_e32 v1, v17
-; SDAG-NEXT: v_mov_b32_e32 v2, v18
-; SDAG-NEXT: v_mov_b32_e32 v3, v19
-; SDAG-NEXT: v_mov_b32_e32 v4, v20
-; SDAG-NEXT: v_mov_b32_e32 v5, v21
-; SDAG-NEXT: v_mov_b32_e32 v6, v22
-; SDAG-NEXT: v_mov_b32_e32 v7, v23
-; SDAG-NEXT: v_mov_b32_e32 v8, v24
-; SDAG-NEXT: v_mov_b32_e32 v9, v25
-; SDAG-NEXT: v_mov_b32_e32 v10, v26
-; SDAG-NEXT: v_mov_b32_e32 v11, v27
-; SDAG-NEXT: v_mov_b32_e32 v12, v28
-; SDAG-NEXT: v_mov_b32_e32 v13, v29
-; SDAG-NEXT: v_mov_b32_e32 v14, v30
-; SDAG-NEXT: v_mov_b32_e32 v15, v31
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp4__v8i32_fp4:
@@ -4516,22 +3499,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp4__v8i32_fp4(
; GISEL-NEXT: s_waitcnt vmcnt(0)
; GISEL-NEXT: v_mfma_scale_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31], v32, v33 op_sel_hi:[0,0,0] cbsz:4 blgp:4
; GISEL-NEXT: s_nop 11
-; GISEL-NEXT: v_mov_b32_e32 v0, v16
-; GISEL-NEXT: v_mov_b32_e32 v1, v17
-; GISEL-NEXT: v_mov_b32_e32 v2, v18
-; GISEL-NEXT: v_mov_b32_e32 v3, v19
-; GISEL-NEXT: v_mov_b32_e32 v4, v20
-; GISEL-NEXT: v_mov_b32_e32 v5, v21
-; GISEL-NEXT: v_mov_b32_e32 v6, v22
-; GISEL-NEXT: v_mov_b32_e32 v7, v23
-; GISEL-NEXT: v_mov_b32_e32 v8, v24
-; GISEL-NEXT: v_mov_b32_e32 v9, v25
-; GISEL-NEXT: v_mov_b32_e32 v10, v26
-; GISEL-NEXT: v_mov_b32_e32 v11, v27
-; GISEL-NEXT: v_mov_b32_e32 v12, v28
-; GISEL-NEXT: v_mov_b32_e32 v13, v29
-; GISEL-NEXT: v_mov_b32_e32 v14, v30
-; GISEL-NEXT: v_mov_b32_e32 v15, v31
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GISEL-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
@@ -4548,22 +3523,14 @@ define <16 x float> @test_mfma_scale_f32_32x32x64_f8f6f4___v8i32_fp4__v8i32_fp4_
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_mfma_f32_32x32x64_f8f6f4 v[16:31], v[0:7], v[8:15], v[16:31] cbsz:4 blgp:4
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v16
-; GCN-NEXT: v_mov_b32_e32 v1, v17
-; GCN-NEXT: v_mov_b32_e32 v2, v18
-; GCN-NEXT: v_mov_b32_e32 v3, v19
-; GCN-NEXT: v_mov_b32_e32 v4, v20
-; GCN-NEXT: v_mov_b32_e32 v5, v21
-; GCN-NEXT: v_mov_b32_e32 v6, v22
-; GCN-NEXT: v_mov_b32_e32 v7, v23
-; GCN-NEXT: v_mov_b32_e32 v8, v24
-; GCN-NEXT: v_mov_b32_e32 v9, v25
-; GCN-NEXT: v_mov_b32_e32 v10, v26
-; GCN-NEXT: v_mov_b32_e32 v11, v27
-; GCN-NEXT: v_mov_b32_e32 v12, v28
-; GCN-NEXT: v_mov_b32_e32 v13, v29
-; GCN-NEXT: v_mov_b32_e32 v14, v30
-; GCN-NEXT: v_mov_b32_e32 v15, v31
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[28:29]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[30:31]
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.v8i32.v8i32(<8 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2,
i32 4, ; cbsz
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
index 9ec3314847fe1..7600126900dcd 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
@@ -133,8 +133,7 @@ define { i32, i32 } @v_permlane16_swap_b32_ss(i32 inreg %vdst_old, i32 inreg %sr
; GFX950-LABEL: v_permlane16_swap_b32_ss:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_mov_b32_e32 v0, s0
-; GFX950-NEXT: v_mov_b32_e32 v1, s1
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX950-NEXT: s_nop 1
; GFX950-NEXT: v_permlane16_swap_b32_e32 v0, v1
; GFX950-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
index cbfcf7d937e0d..452a69bdca4f1 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
@@ -62,8 +62,7 @@ define { i32, i32 } @v_permlane32_swap_b32_ss(i32 inreg %vdst_old, i32 inreg %sr
; GCN-LABEL: v_permlane32_swap_b32_ss:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v0, s0
-; GCN-NEXT: v_mov_b32_e32 v1, s1
+; GCN-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GCN-NEXT: s_nop 1
; GCN-NEXT: v_permlane32_swap_b32_e32 v0, v1
; GCN-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
index 6132baceb1ce3..24ddcaead395e 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
@@ -126,10 +126,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16(<8 x half> %arg0, <16 x half> %
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x64_f16 v[12:15], v[0:3], v[4:11], v16
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x64_f16:
@@ -137,10 +135,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16(<8 x half> %arg0, <16 x half> %
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x64_f16 v[12:15], v[0:3], v[4:11], v16
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x64.f16(<8 x half> %arg0, <16 x half> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <4 x float> %result
@@ -152,10 +148,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16__flags0(<8 x half> %arg0, <16 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x64_f16 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x64_f16__flags0:
@@ -163,10 +157,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16__flags0(<8 x half> %arg0, <16 x
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x64_f16 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x64.f16(<8 x half> %arg0, <16 x half> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <4 x float> %result
@@ -178,10 +170,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16__flags1(<8 x half> %arg0, <16 x
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x64_f16 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x64_f16__flags1:
@@ -189,10 +179,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16__flags1(<8 x half> %arg0, <16 x
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x64_f16 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x64.f16(<8 x half> %arg0, <16 x half> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <4 x float> %result
@@ -202,22 +190,15 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16__sgpr(<8 x half> inreg %arg0, <
; SDAG-LABEL: test_smfmac_f32_16x16x64_f16__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v0, s24
; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-NEXT: v_mov_b32_e32 v4, s28
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_16x16x64_f16 v[0:3], v[14:17], v[6:13], v4
@@ -232,10 +213,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16__sgpr(<8 x half> inreg %arg0, <
; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; GISEL-NEXT: v_mov_b32_e32 v16, s28
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_16x16x64_f16 v[0:3], v[12:15], v[4:11], v16
@@ -244,22 +223,15 @@ define <4 x float> @test_smfmac_f32_16x16x64_f16__sgpr(<8 x half> inreg %arg0, <
; SDAG-VGPR-LABEL: test_smfmac_f32_16x16x64_f16__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_16x16x64_f16 v[0:3], v[14:17], v[6:13], v4
@@ -429,55 +401,33 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16(<8 x half> %arg0, <16 x half>
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x32_f16 v[12:27], v[0:3], v[4:11], v28
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x32_f16:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x32_f16 v[0:15], v[48:51], v[30:37], v28
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -487,22 +437,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16(<8 x half> %arg0, <16 x half>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x32_f16 v[12:27], v[0:3], v[4:11], v28
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x32.f16(<8 x half> %arg0, <16 x half> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <16 x float> %result
@@ -514,55 +456,33 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__flags0(<8 x half> %arg0, <16
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x32_f16 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x32_f16__flags0:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x32_f16 v[0:15], v[48:51], v[30:37], v28 cbsz:1 abid:3
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -572,22 +492,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__flags0(<8 x half> %arg0, <16
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x32_f16 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x32.f16(<8 x half> %arg0, <16 x half> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <16 x float> %result
@@ -599,55 +511,33 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__flags1(<8 x half> %arg0, <16
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x32_f16 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x32_f16__flags1:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x32_f16 v[0:15], v[48:51], v[30:37], v28 cbsz:3 abid:1
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -657,22 +547,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__flags1(<8 x half> %arg0, <16
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x32_f16 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x32.f16(<8 x half> %arg0, <16 x half> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <16 x float> %result
@@ -682,10 +564,8 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__sgpr(<8 x half> inreg %arg0,
; SDAG-LABEL: test_smfmac_f32_32x32x32_f16__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v16, v10
; SDAG-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-NEXT: v_readfirstlane_b32 s5, v8
@@ -698,12 +578,9 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__sgpr(<8 x half> inreg %arg0,
; SDAG-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v6, s13
; SDAG-NEXT: v_mov_b32_e32 v7, s12
; SDAG-NEXT: v_mov_b32_e32 v8, s11
@@ -714,14 +591,10 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__sgpr(<8 x half> inreg %arg0,
; SDAG-NEXT: v_mov_b32_e32 v13, s6
; SDAG-NEXT: v_mov_b32_e32 v14, s5
; SDAG-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v16, s0
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_32x32x32_f16 v[0:15], v[26:29], v[18:25], v16
@@ -747,22 +620,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__sgpr(<8 x half> inreg %arg0,
; GISEL-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[22:23], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
-; GISEL-NEXT: v_mov_b32_e32 v4, s28
-; GISEL-NEXT: v_mov_b32_e32 v5, s29
-; GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GISEL-NEXT: v_mov_b32_e32 v15, s13
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
; GISEL-NEXT: v_mov_b32_e32 v28, s14
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x32_f16 v[0:15], v[24:27], v[16:23], v28
@@ -771,10 +636,8 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__sgpr(<8 x half> inreg %arg0,
; SDAG-VGPR-LABEL: test_smfmac_f32_32x32x32_f16__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, v10
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s5, v8
@@ -787,12 +650,9 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__sgpr(<8 x half> inreg %arg0,
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s13
; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s12
; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s11
@@ -803,14 +663,10 @@ define <16 x float> @test_smfmac_f32_32x32x32_f16__sgpr(<8 x half> inreg %arg0,
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s6
; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s5
; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s0
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_32x32x32_f16 v[0:15], v[26:29], v[18:25], v16
@@ -949,10 +805,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_bf16(<8 x bfloat> %arg0, <16 x bflo
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x64_bf16 v[12:15], v[0:3], v[4:11], v16
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x64_bf16:
@@ -960,10 +814,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_bf16(<8 x bfloat> %arg0, <16 x bflo
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x64_bf16 v[12:15], v[0:3], v[4:11], v16
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x64.bf16(<8 x bfloat> %arg0, <16 x bfloat> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <4 x float> %result
@@ -975,10 +827,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_bf16__flags0(<8 x bfloat> %arg0, <1
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x64_bf16 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x64_bf16__flags0:
@@ -986,10 +836,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_bf16__flags0(<8 x bfloat> %arg0, <1
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x64_bf16 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x64.bf16(<8 x bfloat> %arg0, <16 x bfloat> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <4 x float> %result
@@ -1001,10 +849,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_bf16__flags1(<8 x bfloat> %arg0, <1
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x64_bf16 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x64_bf16__flags1:
@@ -1012,10 +858,8 @@ define <4 x float> @test_smfmac_f32_16x16x64_bf16__flags1(<8 x bfloat> %arg0, <1
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x64_bf16 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x64.bf16(<8 x bfloat> %arg0, <16 x bfloat> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <4 x float> %result
@@ -1025,22 +869,15 @@ define <4 x float> @test_smfmac_f32_16x16x64_bf16__sgpr(<8 x bfloat> inreg %arg0
; GCN-LABEL: test_smfmac_f32_16x16x64_bf16__sgpr:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v14, s0
-; GCN-NEXT: v_mov_b32_e32 v15, s1
-; GCN-NEXT: v_mov_b32_e32 v16, s2
-; GCN-NEXT: v_mov_b32_e32 v17, s3
-; GCN-NEXT: v_mov_b32_e32 v6, s16
-; GCN-NEXT: v_mov_b32_e32 v7, s17
-; GCN-NEXT: v_mov_b32_e32 v8, s18
-; GCN-NEXT: v_mov_b32_e32 v9, s19
-; GCN-NEXT: v_mov_b32_e32 v10, s20
-; GCN-NEXT: v_mov_b32_e32 v11, s21
-; GCN-NEXT: v_mov_b32_e32 v12, s22
-; GCN-NEXT: v_mov_b32_e32 v13, s23
+; GCN-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; GCN-NEXT: v_mov_b32_e32 v0, s24
; GCN-NEXT: v_mov_b32_e32 v1, s25
-; GCN-NEXT: v_mov_b32_e32 v2, s26
-; GCN-NEXT: v_mov_b32_e32 v3, s27
+; GCN-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; GCN-NEXT: v_mov_b32_e32 v4, s28
; GCN-NEXT: s_nop 1
; GCN-NEXT: v_smfmac_f32_16x16x64_bf16 v[0:3], v[14:17], v[6:13], v4
@@ -1049,22 +886,15 @@ define <4 x float> @test_smfmac_f32_16x16x64_bf16__sgpr(<8 x bfloat> inreg %arg0
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x64_bf16__sgpr:
; GCN-VGPR: ; %bb.0:
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, s0
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, s1
-; GCN-VGPR-NEXT: v_mov_b32_e32 v16, s2
-; GCN-VGPR-NEXT: v_mov_b32_e32 v17, s3
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, s16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, s17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, s18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, s19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, s20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, s21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, s22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, s23
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; GCN-VGPR-NEXT: v_mov_b32_e32 v0, s24
; GCN-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, s27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; GCN-VGPR-NEXT: v_mov_b32_e32 v4, s28
; GCN-VGPR-NEXT: s_nop 1
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x64_bf16 v[0:3], v[14:17], v[6:13], v4
@@ -1156,22 +986,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16(<8 x bfloat> %arg0, <16 x bfl
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_32x32x32_bf16 v[12:27], v[0:3], v[4:11], v28
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_32x32x32_bf16:
@@ -1179,22 +1001,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16(<8 x bfloat> %arg0, <16 x bfl
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x32_bf16 v[12:27], v[0:3], v[4:11], v28
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x32.bf16(<8 x bfloat> %arg0, <16 x bfloat> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <16 x float> %result
@@ -1206,22 +1020,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__flags0(<8 x bfloat> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_32x32x32_bf16 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_32x32x32_bf16__flags0:
@@ -1229,22 +1035,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__flags0(<8 x bfloat> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x32_bf16 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x32.bf16(<8 x bfloat> %arg0, <16 x bfloat> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <16 x float> %result
@@ -1256,22 +1054,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__flags1(<8 x bfloat> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_32x32x32_bf16 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; GCN-NEXT: s_nop 11
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
-; GCN-NEXT: v_mov_b32_e32 v4, v16
-; GCN-NEXT: v_mov_b32_e32 v5, v17
-; GCN-NEXT: v_mov_b32_e32 v6, v18
-; GCN-NEXT: v_mov_b32_e32 v7, v19
-; GCN-NEXT: v_mov_b32_e32 v8, v20
-; GCN-NEXT: v_mov_b32_e32 v9, v21
-; GCN-NEXT: v_mov_b32_e32 v10, v22
-; GCN-NEXT: v_mov_b32_e32 v11, v23
-; GCN-NEXT: v_mov_b32_e32 v12, v24
-; GCN-NEXT: v_mov_b32_e32 v13, v25
-; GCN-NEXT: v_mov_b32_e32 v14, v26
-; GCN-NEXT: v_mov_b32_e32 v15, v27
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_32x32x32_bf16__flags1:
@@ -1279,22 +1069,14 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__flags1(<8 x bfloat> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x32_bf16 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x32.bf16(<8 x bfloat> %arg0, <16 x bfloat> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <16 x float> %result
@@ -1304,10 +1086,8 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__sgpr(<8 x bfloat> inreg %arg
; GCN-LABEL: test_smfmac_f32_32x32x32_bf16__sgpr:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: v_mov_b32_e32 v26, s0
-; GCN-NEXT: v_mov_b32_e32 v27, s1
-; GCN-NEXT: v_mov_b32_e32 v28, s2
-; GCN-NEXT: v_mov_b32_e32 v29, s3
+; GCN-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; GCN-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; GCN-NEXT: v_mov_b32_e32 v16, v10
; GCN-NEXT: v_readfirstlane_b32 s4, v9
; GCN-NEXT: v_readfirstlane_b32 s5, v8
@@ -1320,12 +1100,9 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__sgpr(<8 x bfloat> inreg %arg
; GCN-NEXT: v_readfirstlane_b32 s12, v1
; GCN-NEXT: v_readfirstlane_b32 s13, v0
; GCN-NEXT: v_readfirstlane_b32 s0, v16
-; GCN-NEXT: v_mov_b32_e32 v0, s24
-; GCN-NEXT: v_mov_b32_e32 v1, s25
-; GCN-NEXT: v_mov_b32_e32 v2, s26
-; GCN-NEXT: v_mov_b32_e32 v3, s27
-; GCN-NEXT: v_mov_b32_e32 v4, s28
-; GCN-NEXT: v_mov_b32_e32 v5, s29
+; GCN-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; GCN-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; GCN-NEXT: v_mov_b32_e32 v6, s13
; GCN-NEXT: v_mov_b32_e32 v7, s12
; GCN-NEXT: v_mov_b32_e32 v8, s11
@@ -1336,14 +1113,10 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__sgpr(<8 x bfloat> inreg %arg
; GCN-NEXT: v_mov_b32_e32 v13, s6
; GCN-NEXT: v_mov_b32_e32 v14, s5
; GCN-NEXT: v_mov_b32_e32 v15, s4
-; GCN-NEXT: v_mov_b32_e32 v18, s16
-; GCN-NEXT: v_mov_b32_e32 v19, s17
-; GCN-NEXT: v_mov_b32_e32 v20, s18
-; GCN-NEXT: v_mov_b32_e32 v21, s19
-; GCN-NEXT: v_mov_b32_e32 v22, s20
-; GCN-NEXT: v_mov_b32_e32 v23, s21
-; GCN-NEXT: v_mov_b32_e32 v24, s22
-; GCN-NEXT: v_mov_b32_e32 v25, s23
+; GCN-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; GCN-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; GCN-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; GCN-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; GCN-NEXT: v_mov_b32_e32 v16, s0
; GCN-NEXT: s_nop 1
; GCN-NEXT: v_smfmac_f32_32x32x32_bf16 v[0:15], v[26:29], v[18:25], v16
@@ -1352,10 +1125,8 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__sgpr(<8 x bfloat> inreg %arg
; GCN-VGPR-LABEL: test_smfmac_f32_32x32x32_bf16__sgpr:
; GCN-VGPR: ; %bb.0:
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-VGPR-NEXT: v_mov_b32_e32 v26, s0
-; GCN-VGPR-NEXT: v_mov_b32_e32 v27, s1
-; GCN-VGPR-NEXT: v_mov_b32_e32 v28, s2
-; GCN-VGPR-NEXT: v_mov_b32_e32 v29, s3
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; GCN-VGPR-NEXT: v_mov_b32_e32 v16, v10
; GCN-VGPR-NEXT: v_readfirstlane_b32 s4, v9
; GCN-VGPR-NEXT: v_readfirstlane_b32 s5, v8
@@ -1368,12 +1139,9 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__sgpr(<8 x bfloat> inreg %arg
; GCN-VGPR-NEXT: v_readfirstlane_b32 s12, v1
; GCN-VGPR-NEXT: v_readfirstlane_b32 s13, v0
; GCN-VGPR-NEXT: v_readfirstlane_b32 s0, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, s24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, s27
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, s28
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, s29
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; GCN-VGPR-NEXT: v_mov_b32_e32 v6, s13
; GCN-VGPR-NEXT: v_mov_b32_e32 v7, s12
; GCN-VGPR-NEXT: v_mov_b32_e32 v8, s11
@@ -1384,14 +1152,10 @@ define <16 x float> @test_smfmac_f32_32x32x32_bf16__sgpr(<8 x bfloat> inreg %arg
; GCN-VGPR-NEXT: v_mov_b32_e32 v13, s6
; GCN-VGPR-NEXT: v_mov_b32_e32 v14, s5
; GCN-VGPR-NEXT: v_mov_b32_e32 v15, s4
-; GCN-VGPR-NEXT: v_mov_b32_e32 v18, s16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v19, s17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v20, s18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v21, s19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v22, s20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v23, s21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v24, s22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v25, s23
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; GCN-VGPR-NEXT: v_mov_b32_e32 v16, s0
; GCN-VGPR-NEXT: s_nop 1
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x32_bf16 v[0:15], v[26:29], v[18:25], v16
@@ -1418,18 +1182,12 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x128_i8__vgpr(ptr addrspace(1) %
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v13, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -1474,18 +1232,12 @@ define amdgpu_kernel void @test_smfmac_i32_16x16x128_i8__vgpr(ptr addrspace(1) %
; SDAG-VGPR-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-VGPR-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -1533,10 +1285,8 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8(<4 x i32> %arg0, <8 x i32> %arg1,
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_i32_16x16x128_i8 v[12:15], v[0:3], v[4:11], v16
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_i32_16x16x128_i8:
@@ -1544,10 +1294,8 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8(<4 x i32> %arg0, <8 x i32> %arg1,
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_i32_16x16x128_i8 v[12:15], v[0:3], v[4:11], v16
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x i32> @llvm.amdgcn.smfmac.i32.16x16x128.i8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x i32> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <4 x i32> %result
@@ -1559,10 +1307,8 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8__flags0(<4 x i32> %arg0, <8 x i32
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_i32_16x16x128_i8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_i32_16x16x128_i8__flags0:
@@ -1570,10 +1316,8 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8__flags0(<4 x i32> %arg0, <8 x i32
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_i32_16x16x128_i8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x i32> @llvm.amdgcn.smfmac.i32.16x16x128.i8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x i32> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <4 x i32> %result
@@ -1585,10 +1329,8 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8__flags1(<4 x i32> %arg0, <8 x i32
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_i32_16x16x128_i8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_i32_16x16x128_i8__flags1:
@@ -1596,10 +1338,8 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8__flags1(<4 x i32> %arg0, <8 x i32
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_i32_16x16x128_i8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x i32> @llvm.amdgcn.smfmac.i32.16x16x128.i8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x i32> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <4 x i32> %result
@@ -1609,22 +1349,15 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; SDAG-LABEL: test_smfmac_i32_16x16x128_i8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v0, s24
; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-NEXT: v_mov_b32_e32 v4, s28
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_i32_16x16x128_i8 v[0:3], v[14:17], v[6:13], v4
@@ -1639,10 +1372,8 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; GISEL-NEXT: v_mov_b32_e32 v16, s28
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_i32_16x16x128_i8 v[0:3], v[12:15], v[4:11], v16
@@ -1651,22 +1382,15 @@ define <4 x i32> @test_smfmac_i32_16x16x128_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; SDAG-VGPR-LABEL: test_smfmac_i32_16x16x128_i8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_i32_16x16x128_i8 v[0:3], v[14:17], v[6:13], v4
@@ -1711,18 +1435,12 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x64_i8__vgpr(ptr addrspace(1) %a
; SDAG-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v28, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -1779,18 +1497,12 @@ define amdgpu_kernel void @test_smfmac_i32_32x32x64_i8__vgpr(ptr addrspace(1) %a
; SDAG-VGPR-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-VGPR-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-VGPR-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -1848,55 +1560,33 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8(<4 x i32> %arg0, <8 x i32> %arg1,
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_i32_32x32x64_i8 v[12:27], v[0:3], v[4:11], v28
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_i32_32x32x64_i8:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_i32_32x32x64_i8 v[0:15], v[48:51], v[30:37], v28
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -1906,22 +1596,14 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8(<4 x i32> %arg0, <8 x i32> %arg1,
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_i32_32x32x64_i8 v[12:27], v[0:3], v[4:11], v28
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x i32> @llvm.amdgcn.smfmac.i32.32x32x64.i8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x i32> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <16 x i32> %result
@@ -1933,55 +1615,33 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__flags0(<4 x i32> %arg0, <8 x i32
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_i32_32x32x64_i8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_i32_32x32x64_i8__flags0:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_i32_32x32x64_i8 v[0:15], v[48:51], v[30:37], v28 cbsz:1 abid:3
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -1991,22 +1651,14 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__flags0(<4 x i32> %arg0, <8 x i32
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_i32_32x32x64_i8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x i32> @llvm.amdgcn.smfmac.i32.32x32x64.i8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x i32> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <16 x i32> %result
@@ -2018,55 +1670,33 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__flags1(<4 x i32> %arg0, <8 x i32
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_i32_32x32x64_i8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_i32_32x32x64_i8__flags1:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_i32_32x32x64_i8 v[0:15], v[48:51], v[30:37], v28 cbsz:3 abid:1
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -2076,22 +1706,14 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__flags1(<4 x i32> %arg0, <8 x i32
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_i32_32x32x64_i8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x i32> @llvm.amdgcn.smfmac.i32.32x32x64.i8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x i32> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <16 x i32> %result
@@ -2101,10 +1723,8 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; SDAG-LABEL: test_smfmac_i32_32x32x64_i8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v16, v10
; SDAG-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-NEXT: v_readfirstlane_b32 s5, v8
@@ -2117,12 +1737,9 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; SDAG-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v6, s13
; SDAG-NEXT: v_mov_b32_e32 v7, s12
; SDAG-NEXT: v_mov_b32_e32 v8, s11
@@ -2133,14 +1750,10 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; SDAG-NEXT: v_mov_b32_e32 v13, s6
; SDAG-NEXT: v_mov_b32_e32 v14, s5
; SDAG-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v16, s0
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_i32_32x32x64_i8 v[0:15], v[26:29], v[18:25], v16
@@ -2166,22 +1779,14 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; GISEL-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[22:23], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
-; GISEL-NEXT: v_mov_b32_e32 v4, s28
-; GISEL-NEXT: v_mov_b32_e32 v5, s29
-; GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GISEL-NEXT: v_mov_b32_e32 v15, s13
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
; GISEL-NEXT: v_mov_b32_e32 v28, s14
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_i32_32x32x64_i8 v[0:15], v[24:27], v[16:23], v28
@@ -2190,10 +1795,8 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; SDAG-VGPR-LABEL: test_smfmac_i32_32x32x64_i8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, v10
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s5, v8
@@ -2206,12 +1809,9 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s13
; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s12
; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s11
@@ -2222,14 +1822,10 @@ define <16 x i32> @test_smfmac_i32_32x32x64_i8__sgpr(<4 x i32> inreg %arg0, <8 x
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s6
; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s5
; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s0
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_i32_32x32x64_i8 v[0:15], v[26:29], v[18:25], v16
@@ -2317,18 +1913,12 @@ define amdgpu_kernel void @test_smfmac_f32_16x16x128_bf8_bf8__vgpr(ptr addrspace
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v13, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -2373,18 +1963,12 @@ define amdgpu_kernel void @test_smfmac_f32_16x16x128_bf8_bf8__vgpr(ptr addrspace
; SDAG-VGPR-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-VGPR-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -2432,10 +2016,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8(<4 x i32> %arg0, <8 x i32>
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[12:15], v[0:3], v[4:11], v16
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_bf8_bf8:
@@ -2443,10 +2025,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8(<4 x i32> %arg0, <8 x i32>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[12:15], v[0:3], v[4:11], v16
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.bf8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <4 x float> %result
@@ -2458,10 +2038,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8__flags0(<4 x i32> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_bf8_bf8__flags0:
@@ -2469,10 +2047,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8__flags0(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.bf8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <4 x float> %result
@@ -2484,10 +2060,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8__flags1(<4 x i32> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_bf8_bf8__flags1:
@@ -2495,10 +2069,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8__flags1(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.bf8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <4 x float> %result
@@ -2508,22 +2080,15 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-LABEL: test_smfmac_f32_16x16x128_bf8_bf8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v0, s24
; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-NEXT: v_mov_b32_e32 v4, s28
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[0:3], v[14:17], v[6:13], v4
@@ -2538,10 +2103,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8__sgpr(<4 x i32> inreg %arg
; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; GISEL-NEXT: v_mov_b32_e32 v16, s28
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[0:3], v[12:15], v[4:11], v16
@@ -2550,22 +2113,15 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-LABEL: test_smfmac_f32_16x16x128_bf8_bf8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_16x16x128_bf8_bf8 v[0:3], v[14:17], v[6:13], v4
@@ -2608,18 +2164,12 @@ define amdgpu_kernel void @test_smfmac_f32_16x16x128_bf8_fp8__vgpr(ptr addrspace
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v13, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -2664,18 +2214,12 @@ define amdgpu_kernel void @test_smfmac_f32_16x16x128_bf8_fp8__vgpr(ptr addrspace
; SDAG-VGPR-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-VGPR-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -2723,10 +2267,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8(<4 x i32> %arg0, <8 x i32>
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[12:15], v[0:3], v[4:11], v16
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_bf8_fp8:
@@ -2734,10 +2276,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8(<4 x i32> %arg0, <8 x i32>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[12:15], v[0:3], v[4:11], v16
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.bf8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <4 x float> %result
@@ -2749,10 +2289,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8__flags0(<4 x i32> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_bf8_fp8__flags0:
@@ -2760,10 +2298,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8__flags0(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.bf8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <4 x float> %result
@@ -2775,10 +2311,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8__flags1(<4 x i32> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_bf8_fp8__flags1:
@@ -2786,10 +2320,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8__flags1(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.bf8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <4 x float> %result
@@ -2799,22 +2331,15 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-LABEL: test_smfmac_f32_16x16x128_bf8_fp8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v0, s24
; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-NEXT: v_mov_b32_e32 v4, s28
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[0:3], v[14:17], v[6:13], v4
@@ -2829,10 +2354,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8__sgpr(<4 x i32> inreg %arg
; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; GISEL-NEXT: v_mov_b32_e32 v16, s28
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[0:3], v[12:15], v[4:11], v16
@@ -2841,22 +2364,15 @@ define <4 x float> @test_smfmac_f32_16x16x128_bf8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-LABEL: test_smfmac_f32_16x16x128_bf8_fp8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_16x16x128_bf8_fp8 v[0:3], v[14:17], v[6:13], v4
@@ -2899,18 +2415,12 @@ define amdgpu_kernel void @test_smfmac_f32_16x16x128_fp8_bf8__vgpr(ptr addrspace
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v13, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -2955,18 +2465,12 @@ define amdgpu_kernel void @test_smfmac_f32_16x16x128_fp8_bf8__vgpr(ptr addrspace
; SDAG-VGPR-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-VGPR-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -3014,10 +2518,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8(<4 x i32> %arg0, <8 x i32>
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[12:15], v[0:3], v[4:11], v16
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_fp8_bf8:
@@ -3025,10 +2527,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8(<4 x i32> %arg0, <8 x i32>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[12:15], v[0:3], v[4:11], v16
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.fp8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <4 x float> %result
@@ -3040,10 +2540,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8__flags0(<4 x i32> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_fp8_bf8__flags0:
@@ -3051,10 +2549,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8__flags0(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.fp8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <4 x float> %result
@@ -3066,10 +2562,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8__flags1(<4 x i32> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_fp8_bf8__flags1:
@@ -3077,10 +2571,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8__flags1(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.fp8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <4 x float> %result
@@ -3090,22 +2582,15 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-LABEL: test_smfmac_f32_16x16x128_fp8_bf8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v0, s24
; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-NEXT: v_mov_b32_e32 v4, s28
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[0:3], v[14:17], v[6:13], v4
@@ -3120,10 +2605,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8__sgpr(<4 x i32> inreg %arg
; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; GISEL-NEXT: v_mov_b32_e32 v16, s28
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[0:3], v[12:15], v[4:11], v16
@@ -3132,22 +2615,15 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-LABEL: test_smfmac_f32_16x16x128_fp8_bf8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_16x16x128_fp8_bf8 v[0:3], v[14:17], v[6:13], v4
@@ -3190,18 +2666,12 @@ define amdgpu_kernel void @test_smfmac_f32_16x16x128_fp8_fp8__vgpr(ptr addrspace
; SDAG-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v13, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -3246,18 +2716,12 @@ define amdgpu_kernel void @test_smfmac_f32_16x16x128_fp8_fp8__vgpr(ptr addrspace
; SDAG-VGPR-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-VGPR-NEXT: global_load_dwordx4 v[14:17], v0, s[6:7]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, 0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -3305,10 +2769,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8(<4 x i32> %arg0, <8 x i32>
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[12:15], v[0:3], v[4:11], v16
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_fp8_fp8:
@@ -3316,10 +2778,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8(<4 x i32> %arg0, <8 x i32>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[12:15], v[0:3], v[4:11], v16
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.fp8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <4 x float> %result
@@ -3331,10 +2791,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8__flags0(<4 x i32> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_fp8_fp8__flags0:
@@ -3342,10 +2800,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8__flags0(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[12:15], v[0:3], v[4:11], v16 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.fp8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <4 x float> %result
@@ -3357,10 +2813,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8__flags1(<4 x i32> %arg0, <
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-NEXT: s_nop 7
-; GCN-NEXT: v_mov_b32_e32 v0, v12
-; GCN-NEXT: v_mov_b32_e32 v1, v13
-; GCN-NEXT: v_mov_b32_e32 v2, v14
-; GCN-NEXT: v_mov_b32_e32 v3, v15
+; GCN-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GCN-VGPR-LABEL: test_smfmac_f32_16x16x128_fp8_fp8__flags1:
@@ -3368,10 +2822,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8__flags1(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[12:15], v[0:3], v[4:11], v16 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 7
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <4 x float> @llvm.amdgcn.smfmac.f32.16x16x128.fp8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <4 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <4 x float> %result
@@ -3381,22 +2833,15 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-LABEL: test_smfmac_f32_16x16x128_fp8_fp8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v0, s24
; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-NEXT: v_mov_b32_e32 v4, s28
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[0:3], v[14:17], v[6:13], v4
@@ -3411,10 +2856,8 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8__sgpr(<4 x i32> inreg %arg
; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; GISEL-NEXT: v_mov_b32_e32 v16, s28
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[0:3], v[12:15], v[4:11], v16
@@ -3423,22 +2866,15 @@ define <4 x float> @test_smfmac_f32_16x16x128_fp8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-LABEL: test_smfmac_f32_16x16x128_fp8_fp8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s3
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v9, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v10, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v11, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v12, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[14:15], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[2:3]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[6:7], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[8:9], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[10:11], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[12:13], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_16x16x128_fp8_fp8 v[0:3], v[14:17], v[6:13], v4
@@ -3483,18 +2919,12 @@ define amdgpu_kernel void @test_smfmac_f32_32x32x64_bf8_bf8__vgpr(ptr addrspace(
; SDAG-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v28, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -3551,18 +2981,12 @@ define amdgpu_kernel void @test_smfmac_f32_32x32x64_bf8_bf8__vgpr(ptr addrspace(
; SDAG-VGPR-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-VGPR-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-VGPR-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -3620,55 +3044,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8(<4 x i32> %arg0, <8 x i32>
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[12:27], v[0:3], v[4:11], v28
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_bf8_bf8:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[0:15], v[48:51], v[30:37], v28
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -3678,22 +3080,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8(<4 x i32> %arg0, <8 x i32>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[12:27], v[0:3], v[4:11], v28
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.bf8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <16 x float> %result
@@ -3705,55 +3099,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__flags0(<4 x i32> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_bf8_bf8__flags0:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[0:15], v[48:51], v[30:37], v28 cbsz:1 abid:3
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -3763,22 +3135,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__flags0(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.bf8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <16 x float> %result
@@ -3790,55 +3154,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__flags1(<4 x i32> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_bf8_bf8__flags1:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[0:15], v[48:51], v[30:37], v28 cbsz:3 abid:1
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -3848,22 +3190,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__flags1(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.bf8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <16 x float> %result
@@ -3873,10 +3207,8 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-LABEL: test_smfmac_f32_32x32x64_bf8_bf8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v16, v10
; SDAG-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-NEXT: v_readfirstlane_b32 s5, v8
@@ -3889,12 +3221,9 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v6, s13
; SDAG-NEXT: v_mov_b32_e32 v7, s12
; SDAG-NEXT: v_mov_b32_e32 v8, s11
@@ -3905,14 +3234,10 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-NEXT: v_mov_b32_e32 v13, s6
; SDAG-NEXT: v_mov_b32_e32 v14, s5
; SDAG-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v16, s0
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[0:15], v[26:29], v[18:25], v16
@@ -3938,22 +3263,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__sgpr(<4 x i32> inreg %arg
; GISEL-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[22:23], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
-; GISEL-NEXT: v_mov_b32_e32 v4, s28
-; GISEL-NEXT: v_mov_b32_e32 v5, s29
-; GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GISEL-NEXT: v_mov_b32_e32 v15, s13
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
; GISEL-NEXT: v_mov_b32_e32 v28, s14
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[0:15], v[24:27], v[16:23], v28
@@ -3962,10 +3279,8 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-LABEL: test_smfmac_f32_32x32x64_bf8_bf8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, v10
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s5, v8
@@ -3978,12 +3293,9 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s13
; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s12
; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s11
@@ -3994,14 +3306,10 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s6
; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s5
; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s0
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_32x32x64_bf8_bf8 v[0:15], v[26:29], v[18:25], v16
@@ -4091,18 +3399,12 @@ define amdgpu_kernel void @test_smfmac_f32_32x32x64_bf8_fp8__vgpr(ptr addrspace(
; SDAG-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v28, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -4159,18 +3461,12 @@ define amdgpu_kernel void @test_smfmac_f32_32x32x64_bf8_fp8__vgpr(ptr addrspace(
; SDAG-VGPR-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-VGPR-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-VGPR-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -4228,55 +3524,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8(<4 x i32> %arg0, <8 x i32>
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[12:27], v[0:3], v[4:11], v28
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_bf8_fp8:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[0:15], v[48:51], v[30:37], v28
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -4286,22 +3560,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8(<4 x i32> %arg0, <8 x i32>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[12:27], v[0:3], v[4:11], v28
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.bf8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <16 x float> %result
@@ -4313,55 +3579,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__flags0(<4 x i32> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_bf8_fp8__flags0:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[0:15], v[48:51], v[30:37], v28 cbsz:1 abid:3
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -4371,22 +3615,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__flags0(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.bf8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <16 x float> %result
@@ -4398,55 +3634,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__flags1(<4 x i32> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_bf8_fp8__flags1:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[0:15], v[48:51], v[30:37], v28 cbsz:3 abid:1
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -4456,22 +3670,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__flags1(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.bf8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <16 x float> %result
@@ -4481,10 +3687,8 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-LABEL: test_smfmac_f32_32x32x64_bf8_fp8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v16, v10
; SDAG-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-NEXT: v_readfirstlane_b32 s5, v8
@@ -4497,12 +3701,9 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v6, s13
; SDAG-NEXT: v_mov_b32_e32 v7, s12
; SDAG-NEXT: v_mov_b32_e32 v8, s11
@@ -4513,14 +3714,10 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-NEXT: v_mov_b32_e32 v13, s6
; SDAG-NEXT: v_mov_b32_e32 v14, s5
; SDAG-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v16, s0
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[0:15], v[26:29], v[18:25], v16
@@ -4546,22 +3743,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__sgpr(<4 x i32> inreg %arg
; GISEL-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[22:23], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
-; GISEL-NEXT: v_mov_b32_e32 v4, s28
-; GISEL-NEXT: v_mov_b32_e32 v5, s29
-; GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GISEL-NEXT: v_mov_b32_e32 v15, s13
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
; GISEL-NEXT: v_mov_b32_e32 v28, s14
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[0:15], v[24:27], v[16:23], v28
@@ -4570,10 +3759,8 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-LABEL: test_smfmac_f32_32x32x64_bf8_fp8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, v10
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s5, v8
@@ -4586,12 +3773,9 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s13
; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s12
; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s11
@@ -4602,14 +3786,10 @@ define <16 x float> @test_smfmac_f32_32x32x64_bf8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s6
; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s5
; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s0
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_32x32x64_bf8_fp8 v[0:15], v[26:29], v[18:25], v16
@@ -4699,18 +3879,12 @@ define amdgpu_kernel void @test_smfmac_f32_32x32x64_fp8_bf8__vgpr(ptr addrspace(
; SDAG-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v28, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -4767,18 +3941,12 @@ define amdgpu_kernel void @test_smfmac_f32_32x32x64_fp8_bf8__vgpr(ptr addrspace(
; SDAG-VGPR-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-VGPR-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-VGPR-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -4836,55 +4004,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8(<4 x i32> %arg0, <8 x i32>
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[12:27], v[0:3], v[4:11], v28
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_fp8_bf8:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[0:15], v[48:51], v[30:37], v28
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -4894,22 +4040,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8(<4 x i32> %arg0, <8 x i32>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[12:27], v[0:3], v[4:11], v28
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.fp8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <16 x float> %result
@@ -4921,55 +4059,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__flags0(<4 x i32> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_fp8_bf8__flags0:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[0:15], v[48:51], v[30:37], v28 cbsz:1 abid:3
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -4979,22 +4095,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__flags0(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.fp8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <16 x float> %result
@@ -5006,55 +4114,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__flags1(<4 x i32> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_fp8_bf8__flags1:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[0:15], v[48:51], v[30:37], v28 cbsz:3 abid:1
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -5064,22 +4150,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__flags1(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.fp8.bf8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <16 x float> %result
@@ -5089,10 +4167,8 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-LABEL: test_smfmac_f32_32x32x64_fp8_bf8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v16, v10
; SDAG-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-NEXT: v_readfirstlane_b32 s5, v8
@@ -5105,12 +4181,9 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v6, s13
; SDAG-NEXT: v_mov_b32_e32 v7, s12
; SDAG-NEXT: v_mov_b32_e32 v8, s11
@@ -5121,14 +4194,10 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-NEXT: v_mov_b32_e32 v13, s6
; SDAG-NEXT: v_mov_b32_e32 v14, s5
; SDAG-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v16, s0
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[0:15], v[26:29], v[18:25], v16
@@ -5154,22 +4223,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__sgpr(<4 x i32> inreg %arg
; GISEL-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[22:23], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
-; GISEL-NEXT: v_mov_b32_e32 v4, s28
-; GISEL-NEXT: v_mov_b32_e32 v5, s29
-; GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GISEL-NEXT: v_mov_b32_e32 v15, s13
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
; GISEL-NEXT: v_mov_b32_e32 v28, s14
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[0:15], v[24:27], v[16:23], v28
@@ -5178,10 +4239,8 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-LABEL: test_smfmac_f32_32x32x64_fp8_bf8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, v10
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s5, v8
@@ -5194,12 +4253,9 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s13
; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s12
; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s11
@@ -5210,14 +4266,10 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_bf8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s6
; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s5
; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s0
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_32x32x64_fp8_bf8 v[0:15], v[26:29], v[18:25], v16
@@ -5307,18 +4359,12 @@ define amdgpu_kernel void @test_smfmac_f32_32x32x64_fp8_fp8__vgpr(ptr addrspace(
; SDAG-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v28, s16
; SDAG-NEXT: s_waitcnt vmcnt(0)
; SDAG-NEXT: s_nop 0
@@ -5375,18 +4421,12 @@ define amdgpu_kernel void @test_smfmac_f32_32x32x64_fp8_fp8__vgpr(ptr addrspace(
; SDAG-VGPR-NEXT: global_load_dwordx4 v[8:11], v16, s[6:7] offset:32
; SDAG-VGPR-NEXT: global_load_dwordx4 v[4:7], v16, s[6:7] offset:16
; SDAG-VGPR-NEXT: global_load_dwordx4 v[0:3], v16, s[6:7]
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s8
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s9
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s10
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s11
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s12
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v17, s13
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s14
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s15
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[16:17], s[12:13]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[14:15]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s16
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0)
; SDAG-VGPR-NEXT: s_nop 0
@@ -5444,55 +4484,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8(<4 x i32> %arg0, <8 x i32>
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[12:27], v[0:3], v[4:11], v28
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_fp8_fp8:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[0:15], v[48:51], v[30:37], v28
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -5502,22 +4520,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8(<4 x i32> %arg0, <8 x i32>
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[12:27], v[0:3], v[4:11], v28
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.fp8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 0, i32 immarg 0)
ret <16 x float> %result
@@ -5529,55 +4539,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__flags0(<4 x i32> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_fp8_fp8__flags0:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[0:15], v[48:51], v[30:37], v28 cbsz:1 abid:3
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -5587,22 +4575,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__flags0(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[12:27], v[0:3], v[4:11], v28 cbsz:1 abid:3
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.fp8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 1, i32 immarg 3)
ret <16 x float> %result
@@ -5614,55 +4594,33 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__flags1(<4 x i32> %arg0, <
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SDAG-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; SDAG-NEXT: s_nop 11
-; SDAG-NEXT: v_mov_b32_e32 v0, v12
-; SDAG-NEXT: v_mov_b32_e32 v1, v13
-; SDAG-NEXT: v_mov_b32_e32 v2, v14
-; SDAG-NEXT: v_mov_b32_e32 v3, v15
-; SDAG-NEXT: v_mov_b32_e32 v4, v16
-; SDAG-NEXT: v_mov_b32_e32 v5, v17
-; SDAG-NEXT: v_mov_b32_e32 v6, v18
-; SDAG-NEXT: v_mov_b32_e32 v7, v19
-; SDAG-NEXT: v_mov_b32_e32 v8, v20
-; SDAG-NEXT: v_mov_b32_e32 v9, v21
-; SDAG-NEXT: v_mov_b32_e32 v10, v22
-; SDAG-NEXT: v_mov_b32_e32 v11, v23
-; SDAG-NEXT: v_mov_b32_e32 v12, v24
-; SDAG-NEXT: v_mov_b32_e32 v13, v25
-; SDAG-NEXT: v_mov_b32_e32 v14, v26
-; SDAG-NEXT: v_mov_b32_e32 v15, v27
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; SDAG-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GISEL-LABEL: test_smfmac_f32_32x32x64_fp8_fp8__flags1:
; GISEL: ; %bb.0:
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-NEXT: v_mov_b32_e32 v48, v0
-; GISEL-NEXT: v_mov_b32_e32 v49, v1
-; GISEL-NEXT: v_mov_b32_e32 v50, v2
-; GISEL-NEXT: v_mov_b32_e32 v51, v3
-; GISEL-NEXT: v_mov_b32_e32 v30, v4
-; GISEL-NEXT: v_mov_b32_e32 v31, v5
-; GISEL-NEXT: v_mov_b32_e32 v32, v6
-; GISEL-NEXT: v_mov_b32_e32 v33, v7
-; GISEL-NEXT: v_mov_b32_e32 v34, v8
-; GISEL-NEXT: v_mov_b32_e32 v35, v9
-; GISEL-NEXT: v_mov_b32_e32 v36, v10
-; GISEL-NEXT: v_mov_b32_e32 v37, v11
-; GISEL-NEXT: v_mov_b32_e32 v0, v12
-; GISEL-NEXT: v_mov_b32_e32 v1, v13
-; GISEL-NEXT: v_mov_b32_e32 v2, v14
-; GISEL-NEXT: v_mov_b32_e32 v3, v15
-; GISEL-NEXT: v_mov_b32_e32 v4, v16
-; GISEL-NEXT: v_mov_b32_e32 v5, v17
-; GISEL-NEXT: v_mov_b32_e32 v6, v18
-; GISEL-NEXT: v_mov_b32_e32 v7, v19
-; GISEL-NEXT: v_mov_b32_e32 v8, v20
-; GISEL-NEXT: v_mov_b32_e32 v9, v21
-; GISEL-NEXT: v_mov_b32_e32 v10, v22
-; GISEL-NEXT: v_mov_b32_e32 v11, v23
-; GISEL-NEXT: v_mov_b32_e32 v12, v24
-; GISEL-NEXT: v_mov_b32_e32 v13, v25
-; GISEL-NEXT: v_mov_b32_e32 v14, v26
-; GISEL-NEXT: v_mov_b32_e32 v15, v27
+; GISEL-NEXT: v_mov_b64_e32 v[48:49], v[0:1]
+; GISEL-NEXT: v_mov_b64_e32 v[50:51], v[2:3]
+; GISEL-NEXT: v_mov_b64_e32 v[30:31], v[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[32:33], v[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[34:35], v[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[36:37], v[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[0:15], v[48:51], v[30:37], v28 cbsz:3 abid:1
; GISEL-NEXT: s_setpc_b64 s[30:31]
@@ -5672,22 +4630,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__flags1(<4 x i32> %arg0, <
; GCN-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-VGPR-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[12:27], v[0:3], v[4:11], v28 cbsz:3 abid:1
; GCN-VGPR-NEXT: s_nop 11
-; GCN-VGPR-NEXT: v_mov_b32_e32 v0, v12
-; GCN-VGPR-NEXT: v_mov_b32_e32 v1, v13
-; GCN-VGPR-NEXT: v_mov_b32_e32 v2, v14
-; GCN-VGPR-NEXT: v_mov_b32_e32 v3, v15
-; GCN-VGPR-NEXT: v_mov_b32_e32 v4, v16
-; GCN-VGPR-NEXT: v_mov_b32_e32 v5, v17
-; GCN-VGPR-NEXT: v_mov_b32_e32 v6, v18
-; GCN-VGPR-NEXT: v_mov_b32_e32 v7, v19
-; GCN-VGPR-NEXT: v_mov_b32_e32 v8, v20
-; GCN-VGPR-NEXT: v_mov_b32_e32 v9, v21
-; GCN-VGPR-NEXT: v_mov_b32_e32 v10, v22
-; GCN-VGPR-NEXT: v_mov_b32_e32 v11, v23
-; GCN-VGPR-NEXT: v_mov_b32_e32 v12, v24
-; GCN-VGPR-NEXT: v_mov_b32_e32 v13, v25
-; GCN-VGPR-NEXT: v_mov_b32_e32 v14, v26
-; GCN-VGPR-NEXT: v_mov_b32_e32 v15, v27
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[0:1], v[12:13]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
+; GCN-VGPR-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GCN-VGPR-NEXT: s_setpc_b64 s[30:31]
%result = call <16 x float> @llvm.amdgcn.smfmac.f32.32x32x64.fp8.fp8(<4 x i32> %arg0, <8 x i32> %arg1, <16 x float> %arg2, i32 %arg3, i32 immarg 3, i32 immarg 1)
ret <16 x float> %result
@@ -5697,10 +4647,8 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-LABEL: test_smfmac_f32_32x32x64_fp8_fp8__sgpr:
; SDAG: ; %bb.0:
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-NEXT: v_mov_b32_e32 v16, v10
; SDAG-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-NEXT: v_readfirstlane_b32 s5, v8
@@ -5713,12 +4661,9 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-NEXT: v_mov_b32_e32 v6, s13
; SDAG-NEXT: v_mov_b32_e32 v7, s12
; SDAG-NEXT: v_mov_b32_e32 v8, s11
@@ -5729,14 +4674,10 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-NEXT: v_mov_b32_e32 v13, s6
; SDAG-NEXT: v_mov_b32_e32 v14, s5
; SDAG-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-NEXT: v_mov_b32_e32 v16, s0
; SDAG-NEXT: s_nop 1
; SDAG-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[0:15], v[26:29], v[18:25], v16
@@ -5762,22 +4703,14 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__sgpr(<4 x i32> inreg %arg
; GISEL-NEXT: v_mov_b64_e32 v[18:19], s[18:19]
; GISEL-NEXT: v_mov_b64_e32 v[20:21], s[20:21]
; GISEL-NEXT: v_mov_b64_e32 v[22:23], s[22:23]
-; GISEL-NEXT: v_mov_b32_e32 v0, s24
-; GISEL-NEXT: v_mov_b32_e32 v1, s25
-; GISEL-NEXT: v_mov_b32_e32 v2, s26
-; GISEL-NEXT: v_mov_b32_e32 v3, s27
-; GISEL-NEXT: v_mov_b32_e32 v4, s28
-; GISEL-NEXT: v_mov_b32_e32 v5, s29
-; GISEL-NEXT: v_mov_b32_e32 v6, s4
-; GISEL-NEXT: v_mov_b32_e32 v7, s5
-; GISEL-NEXT: v_mov_b32_e32 v8, s6
-; GISEL-NEXT: v_mov_b32_e32 v9, s7
-; GISEL-NEXT: v_mov_b32_e32 v10, s8
-; GISEL-NEXT: v_mov_b32_e32 v11, s9
-; GISEL-NEXT: v_mov_b32_e32 v12, s10
-; GISEL-NEXT: v_mov_b32_e32 v13, s11
-; GISEL-NEXT: v_mov_b32_e32 v14, s12
-; GISEL-NEXT: v_mov_b32_e32 v15, s13
+; GISEL-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; GISEL-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; GISEL-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
+; GISEL-NEXT: v_mov_b64_e32 v[6:7], s[4:5]
+; GISEL-NEXT: v_mov_b64_e32 v[8:9], s[6:7]
+; GISEL-NEXT: v_mov_b64_e32 v[10:11], s[8:9]
+; GISEL-NEXT: v_mov_b64_e32 v[12:13], s[10:11]
+; GISEL-NEXT: v_mov_b64_e32 v[14:15], s[12:13]
; GISEL-NEXT: v_mov_b32_e32 v28, s14
; GISEL-NEXT: s_nop 1
; GISEL-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[0:15], v[24:27], v[16:23], v28
@@ -5786,10 +4719,8 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-LABEL: test_smfmac_f32_32x32x64_fp8_fp8__sgpr:
; SDAG-VGPR: ; %bb.0:
; SDAG-VGPR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v26, s0
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v27, s1
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v28, s2
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v29, s3
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[26:27], s[0:1]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[28:29], s[2:3]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, v10
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s4, v9
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s5, v8
@@ -5802,12 +4733,9 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s12, v1
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s13, v0
; SDAG-VGPR-NEXT: v_readfirstlane_b32 s0, v16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v0, s24
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v1, s25
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v2, s26
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v3, s27
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v4, s28
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v5, s29
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[0:1], s[24:25]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[2:3], s[26:27]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[4:5], s[28:29]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v6, s13
; SDAG-VGPR-NEXT: v_mov_b32_e32 v7, s12
; SDAG-VGPR-NEXT: v_mov_b32_e32 v8, s11
@@ -5818,14 +4746,10 @@ define <16 x float> @test_smfmac_f32_32x32x64_fp8_fp8__sgpr(<4 x i32> inreg %arg
; SDAG-VGPR-NEXT: v_mov_b32_e32 v13, s6
; SDAG-VGPR-NEXT: v_mov_b32_e32 v14, s5
; SDAG-VGPR-NEXT: v_mov_b32_e32 v15, s4
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v18, s16
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v19, s17
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v20, s18
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v21, s19
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v22, s20
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v23, s21
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v24, s22
-; SDAG-VGPR-NEXT: v_mov_b32_e32 v25, s23
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[18:19], s[16:17]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[20:21], s[18:19]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[22:23], s[20:21]
+; SDAG-VGPR-NEXT: v_mov_b64_e32 v[24:25], s[22:23]
; SDAG-VGPR-NEXT: v_mov_b32_e32 v16, s0
; SDAG-VGPR-NEXT: s_nop 1
; SDAG-VGPR-NEXT: v_smfmac_f32_32x32x64_fp8_fp8 v[0:15], v[26:29], v[18:25], v16
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
index a98f22fdf72f2..61ddf3adb563e 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
@@ -2681,8 +2681,7 @@ define <16 x double> @v_maximum_v16f64(<16 x double> %src0, <16 x double> %src1)
; GFX950-NEXT: s_nop 1
; GFX950-NEXT: v_cndmask_b32_e64 v30, v0, 0, vcc
; GFX950-NEXT: v_cndmask_b32_e32 v31, v1, v2, vcc
-; GFX950-NEXT: v_mov_b32_e32 v0, v58
-; GFX950-NEXT: v_mov_b32_e32 v1, v59
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], v[58:59]
; GFX950-NEXT: v_mov_b32_e32 v2, v60
; GFX950-NEXT: v_accvgpr_read_b32 v60, a12 ; Reload Reuse
; GFX950-NEXT: v_accvgpr_read_b32 v59, a11 ; Reload Reuse
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
index 1d7678779b8be..d0734906ea7b2 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
@@ -2681,8 +2681,7 @@ define <16 x double> @v_minimum_v16f64(<16 x double> %src0, <16 x double> %src1)
; GFX950-NEXT: s_nop 1
; GFX950-NEXT: v_cndmask_b32_e64 v30, v0, 0, vcc
; GFX950-NEXT: v_cndmask_b32_e32 v31, v1, v2, vcc
-; GFX950-NEXT: v_mov_b32_e32 v0, v58
-; GFX950-NEXT: v_mov_b32_e32 v1, v59
+; GFX950-NEXT: v_mov_b64_e32 v[0:1], v[58:59]
; GFX950-NEXT: v_mov_b32_e32 v2, v60
; GFX950-NEXT: v_accvgpr_read_b32 v60, a12 ; Reload Reuse
; GFX950-NEXT: v_accvgpr_read_b32 v59, a11 ; Reload Reuse
diff --git a/llvm/test/CodeGen/AMDGPU/mad_64_32.ll b/llvm/test/CodeGen/AMDGPU/mad_64_32.ll
index c95f6f8349402..6354e773ed339 100644
--- a/llvm/test/CodeGen/AMDGPU/mad_64_32.ll
+++ b/llvm/test/CodeGen/AMDGPU/mad_64_32.ll
@@ -1493,8 +1493,7 @@ define i48 @mad_i48_i48(i48 %arg0, i48 %arg1, i48 %arg2) #0 {
; GFX9-LABEL: mad_i48_i48:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v6, v1
-; GFX9-NEXT: v_mov_b32_e32 v7, v0
+; GFX9-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[1,0]
; GFX9-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v7, v2, v[4:5]
; GFX9-NEXT: v_mul_lo_u32 v3, v7, v3
; GFX9-NEXT: v_mul_lo_u32 v2, v6, v2
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll b/llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
index aaa295992c361..1d7f3d6bf73ce 100644
--- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
@@ -2110,8 +2110,7 @@ define amdgpu_kernel void @lds_wg_st_release_single64(ptr addrspace(3) %p, i32 %
; GFX942-NEXT: liveins: $sgpr4_sgpr5
; GFX942-NEXT: {{ $}}
; GFX942-NEXT: early-clobber renamable $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM_ec killed renamable $sgpr4_sgpr5, 36, 0 :: (dereferenceable invariant load (s64) from %ir.p.kernarg.offset, align 4, addrspace 4)
- ; GFX942-NEXT: $vgpr0 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
- ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $exec
+ ; GFX942-NEXT: $vgpr0_vgpr1 = V_MOV_B64_e32 killed $sgpr0_sgpr1, implicit $exec, implicit $exec
; GFX942-NEXT: DS_WRITE_B32_gfx9 killed renamable $vgpr0, killed renamable $vgpr1, 0, 0, implicit $exec :: (store syncscope("workgroup") release (s32) into %ir.2, addrspace 3)
; GFX942-NEXT: S_ENDPGM 0
;
@@ -2394,8 +2393,7 @@ define amdgpu_kernel void @lds_wg_cmpxchg_acq_rel_monotonic_single64(ptr addrspa
; GFX942-NEXT: liveins: $sgpr4_sgpr5
; GFX942-NEXT: {{ $}}
; GFX942-NEXT: early-clobber renamable $sgpr0_sgpr1_sgpr2_sgpr3 = S_LOAD_DWORDX4_IMM_ec killed renamable $sgpr4_sgpr5, 36, 0 :: (dereferenceable invariant load (s128) from %ir.p.kernarg.offset, align 4, addrspace 4)
- ; GFX942-NEXT: $vgpr0 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
- ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $exec
+ ; GFX942-NEXT: $vgpr0_vgpr1 = V_MOV_B64_e32 killed $sgpr0_sgpr1, implicit $exec, implicit $exec
; GFX942-NEXT: $vgpr2 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec
; GFX942-NEXT: DS_CMPST_B32_gfx9 killed renamable $vgpr0, killed renamable $vgpr1, killed renamable $vgpr2, 0, 0, implicit $exec :: (load store syncscope("workgroup") acq_rel monotonic (s32) on %ir.2, addrspace 3)
; GFX942-NEXT: S_ENDPGM 0
@@ -2516,8 +2514,7 @@ define amdgpu_kernel void @lds_wg_cmpxchg_monotonic_acquire_single64(ptr addrspa
; GFX942-NEXT: liveins: $sgpr4_sgpr5
; GFX942-NEXT: {{ $}}
; GFX942-NEXT: early-clobber renamable $sgpr0_sgpr1_sgpr2_sgpr3 = S_LOAD_DWORDX4_IMM_ec killed renamable $sgpr4_sgpr5, 36, 0 :: (dereferenceable invariant load (s128) from %ir.p.kernarg.offset, align 4, addrspace 4)
- ; GFX942-NEXT: $vgpr0 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
- ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $exec
+ ; GFX942-NEXT: $vgpr0_vgpr1 = V_MOV_B64_e32 killed $sgpr0_sgpr1, implicit $exec, implicit $exec
; GFX942-NEXT: $vgpr2 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec
; GFX942-NEXT: DS_CMPST_B32_gfx9 killed renamable $vgpr0, killed renamable $vgpr1, killed renamable $vgpr2, 0, 0, implicit $exec :: (load store syncscope("workgroup") monotonic acquire (s32) on %ir.2, addrspace 3)
; GFX942-NEXT: S_ENDPGM 0
diff --git a/llvm/test/CodeGen/AMDGPU/memset-pattern.ll b/llvm/test/CodeGen/AMDGPU/memset-pattern.ll
index a881b83986f8d..251cd5dc514b6 100644
--- a/llvm/test/CodeGen/AMDGPU/memset-pattern.ll
+++ b/llvm/test/CodeGen/AMDGPU/memset-pattern.ll
@@ -760,8 +760,7 @@ define void @memset_pattern_i64_as7_dynlen(ptr addrspace(7) inreg align 16 %a, i
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, 0xccccdddd
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, 0xaaaabbbb
; GFX942-SDAG-NEXT: v_add_u32_e32 v1, s16, v0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-SDAG-NEXT: s_mov_b64 s[8:9], 0
; GFX942-SDAG-NEXT: .LBB12_2: ; %memset.pattern-expansion-main-body
; GFX942-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -885,8 +884,7 @@ define void @memset_pattern_i64_as7_dynlen_dynval(ptr addrspace(7) inreg align 1
; GFX942-SDAG-NEXT: s_cbranch_execz .LBB13_3
; GFX942-SDAG-NEXT: ; %bb.1: ; %memset.pattern-expansion-main-body.preheader
; GFX942-SDAG-NEXT: v_add_u32_e32 v1, s16, v0
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-SDAG-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-SDAG-NEXT: s_mov_b64 s[8:9], 0
; GFX942-SDAG-NEXT: .LBB13_2: ; %memset.pattern-expansion-main-body
; GFX942-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
diff --git a/llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll b/llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
index 85b076f636187..76b8352ace65a 100644
--- a/llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
+++ b/llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
@@ -262,36 +262,21 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY90A-NEXT: v_mfma_f32_32x32x1f32 v[32:63], v64, v65, v[0:31]
; GREEDY90A-NEXT: s_nop 15
; GREEDY90A-NEXT: s_nop 2
-; GREEDY90A-NEXT: v_mov_b32_e32 v2, v32
-; GREEDY90A-NEXT: v_mov_b32_e32 v3, v33
-; GREEDY90A-NEXT: v_mov_b32_e32 v4, v34
-; GREEDY90A-NEXT: v_mov_b32_e32 v5, v35
-; GREEDY90A-NEXT: v_mov_b32_e32 v6, v36
-; GREEDY90A-NEXT: v_mov_b32_e32 v7, v37
-; GREEDY90A-NEXT: v_mov_b32_e32 v8, v38
-; GREEDY90A-NEXT: v_mov_b32_e32 v9, v39
-; GREEDY90A-NEXT: v_mov_b32_e32 v10, v40
-; GREEDY90A-NEXT: v_mov_b32_e32 v11, v41
-; GREEDY90A-NEXT: v_mov_b32_e32 v12, v42
-; GREEDY90A-NEXT: v_mov_b32_e32 v13, v43
-; GREEDY90A-NEXT: v_mov_b32_e32 v14, v44
-; GREEDY90A-NEXT: v_mov_b32_e32 v15, v45
-; GREEDY90A-NEXT: v_mov_b32_e32 v16, v46
-; GREEDY90A-NEXT: v_mov_b32_e32 v17, v47
-; GREEDY90A-NEXT: v_mov_b32_e32 v18, v48
-; GREEDY90A-NEXT: v_mov_b32_e32 v19, v49
-; GREEDY90A-NEXT: v_mov_b32_e32 v20, v50
-; GREEDY90A-NEXT: v_mov_b32_e32 v21, v51
-; GREEDY90A-NEXT: v_mov_b32_e32 v22, v52
-; GREEDY90A-NEXT: v_mov_b32_e32 v23, v53
-; GREEDY90A-NEXT: v_mov_b32_e32 v24, v54
-; GREEDY90A-NEXT: v_mov_b32_e32 v25, v55
-; GREEDY90A-NEXT: v_mov_b32_e32 v26, v56
-; GREEDY90A-NEXT: v_mov_b32_e32 v27, v57
-; GREEDY90A-NEXT: v_mov_b32_e32 v28, v58
-; GREEDY90A-NEXT: v_mov_b32_e32 v29, v59
-; GREEDY90A-NEXT: v_mov_b32_e32 v30, v60
-; GREEDY90A-NEXT: v_mov_b32_e32 v31, v61
+; GREEDY90A-NEXT: v_pk_mov_b32 v[2:3], v[32:33], v[32:33] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[4:5], v[34:35], v[34:35] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[6:7], v[36:37], v[36:37] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[8:9], v[38:39], v[38:39] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[10:11], v[40:41], v[40:41] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[12:13], v[42:43], v[42:43] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[14:15], v[44:45], v[44:45] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[16:17], v[46:47], v[46:47] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[18:19], v[48:49], v[48:49] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[20:21], v[50:51], v[50:51] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[22:23], v[52:53], v[52:53] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[24:25], v[54:55], v[54:55] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[26:27], v[56:57], v[56:57] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[28:29], v[58:59], v[58:59] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[30:31], v[60:61], v[60:61] op_sel:[0,1]
; GREEDY90A-NEXT: v_mov_b32_e32 v32, 0
; GREEDY90A-NEXT: s_nop 0
; GREEDY90A-NEXT: v_mfma_f32_32x32x1f32 v[0:31], v64, v65, v[0:31]
@@ -316,73 +301,43 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY942-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GREEDY942-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GREEDY942-NEXT: s_waitcnt lgkmcnt(0)
-; GREEDY942-NEXT: v_mov_b32_e32 v0, s16
-; GREEDY942-NEXT: v_mov_b32_e32 v1, s17
-; GREEDY942-NEXT: v_mov_b32_e32 v2, s18
-; GREEDY942-NEXT: v_mov_b32_e32 v3, s19
-; GREEDY942-NEXT: v_mov_b32_e32 v4, s20
-; GREEDY942-NEXT: v_mov_b32_e32 v5, s21
-; GREEDY942-NEXT: v_mov_b32_e32 v6, s22
-; GREEDY942-NEXT: v_mov_b32_e32 v7, s23
-; GREEDY942-NEXT: v_mov_b32_e32 v8, s24
-; GREEDY942-NEXT: v_mov_b32_e32 v9, s25
-; GREEDY942-NEXT: v_mov_b32_e32 v10, s26
-; GREEDY942-NEXT: v_mov_b32_e32 v11, s27
-; GREEDY942-NEXT: v_mov_b32_e32 v12, s28
-; GREEDY942-NEXT: v_mov_b32_e32 v13, s29
-; GREEDY942-NEXT: v_mov_b32_e32 v14, s30
-; GREEDY942-NEXT: v_mov_b32_e32 v15, s31
-; GREEDY942-NEXT: v_mov_b32_e32 v16, s0
-; GREEDY942-NEXT: v_mov_b32_e32 v17, s1
-; GREEDY942-NEXT: v_mov_b32_e32 v18, s2
-; GREEDY942-NEXT: v_mov_b32_e32 v19, s3
-; GREEDY942-NEXT: v_mov_b32_e32 v20, s4
-; GREEDY942-NEXT: v_mov_b32_e32 v21, s5
-; GREEDY942-NEXT: v_mov_b32_e32 v22, s6
-; GREEDY942-NEXT: v_mov_b32_e32 v23, s7
-; GREEDY942-NEXT: v_mov_b32_e32 v24, s8
-; GREEDY942-NEXT: v_mov_b32_e32 v25, s9
-; GREEDY942-NEXT: v_mov_b32_e32 v26, s10
-; GREEDY942-NEXT: v_mov_b32_e32 v27, s11
+; GREEDY942-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GREEDY942-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GREEDY942-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GREEDY942-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GREEDY942-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GREEDY942-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GREEDY942-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GREEDY942-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GREEDY942-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GREEDY942-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GREEDY942-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GREEDY942-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GREEDY942-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GREEDY942-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
; GREEDY942-NEXT: v_mov_b32_e32 v28, s12
; GREEDY942-NEXT: v_mov_b32_e32 v29, s13
-; GREEDY942-NEXT: v_mov_b32_e32 v30, s14
-; GREEDY942-NEXT: v_mov_b32_e32 v31, s15
+; GREEDY942-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v64, v65, v[0:31]
; GREEDY942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[32:63], v64, v65, v[0:31]
; GREEDY942-NEXT: s_nop 15
; GREEDY942-NEXT: s_nop 1
-; GREEDY942-NEXT: v_mov_b32_e32 v2, v32
-; GREEDY942-NEXT: v_mov_b32_e32 v3, v33
-; GREEDY942-NEXT: v_mov_b32_e32 v4, v34
-; GREEDY942-NEXT: v_mov_b32_e32 v5, v35
-; GREEDY942-NEXT: v_mov_b32_e32 v6, v36
-; GREEDY942-NEXT: v_mov_b32_e32 v7, v37
-; GREEDY942-NEXT: v_mov_b32_e32 v8, v38
-; GREEDY942-NEXT: v_mov_b32_e32 v9, v39
-; GREEDY942-NEXT: v_mov_b32_e32 v10, v40
-; GREEDY942-NEXT: v_mov_b32_e32 v11, v41
-; GREEDY942-NEXT: v_mov_b32_e32 v12, v42
-; GREEDY942-NEXT: v_mov_b32_e32 v13, v43
-; GREEDY942-NEXT: v_mov_b32_e32 v14, v44
-; GREEDY942-NEXT: v_mov_b32_e32 v15, v45
-; GREEDY942-NEXT: v_mov_b32_e32 v16, v46
-; GREEDY942-NEXT: v_mov_b32_e32 v17, v47
-; GREEDY942-NEXT: v_mov_b32_e32 v18, v48
-; GREEDY942-NEXT: v_mov_b32_e32 v19, v49
-; GREEDY942-NEXT: v_mov_b32_e32 v20, v50
-; GREEDY942-NEXT: v_mov_b32_e32 v21, v51
-; GREEDY942-NEXT: v_mov_b32_e32 v22, v52
-; GREEDY942-NEXT: v_mov_b32_e32 v23, v53
-; GREEDY942-NEXT: v_mov_b32_e32 v24, v54
-; GREEDY942-NEXT: v_mov_b32_e32 v25, v55
-; GREEDY942-NEXT: v_mov_b32_e32 v26, v56
-; GREEDY942-NEXT: v_mov_b32_e32 v27, v57
-; GREEDY942-NEXT: v_mov_b32_e32 v28, v58
-; GREEDY942-NEXT: v_mov_b32_e32 v29, v59
-; GREEDY942-NEXT: v_mov_b32_e32 v30, v60
-; GREEDY942-NEXT: v_mov_b32_e32 v31, v61
+; GREEDY942-NEXT: v_mov_b64_e32 v[2:3], v[32:33]
+; GREEDY942-NEXT: v_mov_b64_e32 v[4:5], v[34:35]
+; GREEDY942-NEXT: v_mov_b64_e32 v[6:7], v[36:37]
+; GREEDY942-NEXT: v_mov_b64_e32 v[8:9], v[38:39]
+; GREEDY942-NEXT: v_mov_b64_e32 v[10:11], v[40:41]
+; GREEDY942-NEXT: v_mov_b64_e32 v[12:13], v[42:43]
+; GREEDY942-NEXT: v_mov_b64_e32 v[14:15], v[44:45]
+; GREEDY942-NEXT: v_mov_b64_e32 v[16:17], v[46:47]
+; GREEDY942-NEXT: v_mov_b64_e32 v[18:19], v[48:49]
+; GREEDY942-NEXT: v_mov_b64_e32 v[20:21], v[50:51]
+; GREEDY942-NEXT: v_mov_b64_e32 v[22:23], v[52:53]
+; GREEDY942-NEXT: v_mov_b64_e32 v[24:25], v[54:55]
+; GREEDY942-NEXT: v_mov_b64_e32 v[26:27], v[56:57]
+; GREEDY942-NEXT: v_mov_b64_e32 v[28:29], v[58:59]
+; GREEDY942-NEXT: v_mov_b64_e32 v[30:31], v[60:61]
; GREEDY942-NEXT: v_mov_b32_e32 v32, 0
; GREEDY942-NEXT: s_nop 0
; GREEDY942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v64, v65, v[0:31]
@@ -428,36 +383,21 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY90A-GISEL-NEXT: v_mfma_f32_32x32x1f32 v[32:63], v64, v65, v[0:31]
; GREEDY90A-GISEL-NEXT: s_nop 15
; GREEDY90A-GISEL-NEXT: s_nop 2
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v2, v32
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v3, v33
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v4, v34
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v5, v35
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v6, v36
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v7, v37
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v8, v38
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v9, v39
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v10, v40
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v11, v41
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v12, v42
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v13, v43
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v14, v44
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v15, v45
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v16, v46
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v17, v47
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v18, v48
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v19, v49
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v20, v50
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v21, v51
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v22, v52
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v23, v53
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v24, v54
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v25, v55
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v26, v56
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v27, v57
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v28, v58
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v29, v59
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v30, v60
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v31, v61
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[2:3], v[32:33], v[32:33] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[4:5], v[34:35], v[34:35] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[6:7], v[36:37], v[36:37] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[8:9], v[38:39], v[38:39] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[10:11], v[40:41], v[40:41] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[12:13], v[42:43], v[42:43] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[14:15], v[44:45], v[44:45] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[16:17], v[46:47], v[46:47] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[18:19], v[48:49], v[48:49] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[20:21], v[50:51], v[50:51] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[22:23], v[52:53], v[52:53] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[24:25], v[54:55], v[54:55] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[26:27], v[56:57], v[56:57] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[28:29], v[58:59], v[58:59] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[30:31], v[60:61], v[60:61] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v32, 0
; GREEDY90A-GISEL-NEXT: s_nop 0
; GREEDY90A-GISEL-NEXT: v_mfma_f32_32x32x1f32 v[0:31], v64, v65, v[0:31]
@@ -520,36 +460,21 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 {
; FAST90A-NEXT: v_mfma_f32_32x32x1f32 v[36:67], v1, v34, v[2:33]
; FAST90A-NEXT: s_nop 15
; FAST90A-NEXT: s_nop 2
-; FAST90A-NEXT: v_mov_b32_e32 v4, v36
-; FAST90A-NEXT: v_mov_b32_e32 v5, v37
-; FAST90A-NEXT: v_mov_b32_e32 v6, v38
-; FAST90A-NEXT: v_mov_b32_e32 v7, v39
-; FAST90A-NEXT: v_mov_b32_e32 v8, v40
-; FAST90A-NEXT: v_mov_b32_e32 v9, v41
-; FAST90A-NEXT: v_mov_b32_e32 v10, v42
-; FAST90A-NEXT: v_mov_b32_e32 v11, v43
-; FAST90A-NEXT: v_mov_b32_e32 v12, v44
-; FAST90A-NEXT: v_mov_b32_e32 v13, v45
-; FAST90A-NEXT: v_mov_b32_e32 v14, v46
-; FAST90A-NEXT: v_mov_b32_e32 v15, v47
-; FAST90A-NEXT: v_mov_b32_e32 v16, v48
-; FAST90A-NEXT: v_mov_b32_e32 v17, v49
-; FAST90A-NEXT: v_mov_b32_e32 v18, v50
-; FAST90A-NEXT: v_mov_b32_e32 v19, v51
-; FAST90A-NEXT: v_mov_b32_e32 v20, v52
-; FAST90A-NEXT: v_mov_b32_e32 v21, v53
-; FAST90A-NEXT: v_mov_b32_e32 v22, v54
-; FAST90A-NEXT: v_mov_b32_e32 v23, v55
-; FAST90A-NEXT: v_mov_b32_e32 v24, v56
-; FAST90A-NEXT: v_mov_b32_e32 v25, v57
-; FAST90A-NEXT: v_mov_b32_e32 v26, v58
-; FAST90A-NEXT: v_mov_b32_e32 v27, v59
-; FAST90A-NEXT: v_mov_b32_e32 v28, v60
-; FAST90A-NEXT: v_mov_b32_e32 v29, v61
-; FAST90A-NEXT: v_mov_b32_e32 v30, v62
-; FAST90A-NEXT: v_mov_b32_e32 v31, v63
-; FAST90A-NEXT: v_mov_b32_e32 v32, v64
-; FAST90A-NEXT: v_mov_b32_e32 v33, v65
+; FAST90A-NEXT: v_pk_mov_b32 v[4:5], v[36:37], v[36:37] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[6:7], v[38:39], v[38:39] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[8:9], v[40:41], v[40:41] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[10:11], v[42:43], v[42:43] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[12:13], v[44:45], v[44:45] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[14:15], v[46:47], v[46:47] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[16:17], v[48:49], v[48:49] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[18:19], v[50:51], v[50:51] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[20:21], v[52:53], v[52:53] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[22:23], v[54:55], v[54:55] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[24:25], v[56:57], v[56:57] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[26:27], v[58:59], v[58:59] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[28:29], v[60:61], v[60:61] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[30:31], v[62:63], v[62:63] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[32:33], v[64:65], v[64:65] op_sel:[0,1]
; FAST90A-NEXT: s_nop 1
; FAST90A-NEXT: v_mfma_f32_32x32x1f32 v[2:33], v1, v34, v[2:33]
; FAST90A-NEXT: s_nop 15
@@ -676,20 +601,13 @@ define amdgpu_kernel void @test_mfma_f32_16x16x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY90A-NEXT: v_mfma_f32_16x16x1f32 v[0:15], v32, v33, v[0:15]
; GREEDY90A-NEXT: v_mfma_f32_16x16x1f32 v[16:31], v32, v33, v[0:15]
; GREEDY90A-NEXT: s_nop 10
-; GREEDY90A-NEXT: v_mov_b32_e32 v2, v16
-; GREEDY90A-NEXT: v_mov_b32_e32 v3, v17
-; GREEDY90A-NEXT: v_mov_b32_e32 v4, v18
-; GREEDY90A-NEXT: v_mov_b32_e32 v5, v19
-; GREEDY90A-NEXT: v_mov_b32_e32 v6, v20
-; GREEDY90A-NEXT: v_mov_b32_e32 v7, v21
-; GREEDY90A-NEXT: v_mov_b32_e32 v8, v22
-; GREEDY90A-NEXT: v_mov_b32_e32 v9, v23
-; GREEDY90A-NEXT: v_mov_b32_e32 v10, v24
-; GREEDY90A-NEXT: v_mov_b32_e32 v11, v25
-; GREEDY90A-NEXT: v_mov_b32_e32 v12, v26
-; GREEDY90A-NEXT: v_mov_b32_e32 v13, v27
-; GREEDY90A-NEXT: v_mov_b32_e32 v14, v28
-; GREEDY90A-NEXT: v_mov_b32_e32 v15, v29
+; GREEDY90A-NEXT: v_pk_mov_b32 v[2:3], v[16:17], v[16:17] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[4:5], v[18:19], v[18:19] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[6:7], v[20:21], v[20:21] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[8:9], v[22:23], v[22:23] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[10:11], v[24:25], v[24:25] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[12:13], v[26:27], v[26:27] op_sel:[0,1]
+; GREEDY90A-NEXT: v_pk_mov_b32 v[14:15], v[28:29], v[28:29] op_sel:[0,1]
; GREEDY90A-NEXT: v_mov_b32_e32 v16, 0
; GREEDY90A-NEXT: s_nop 0
; GREEDY90A-NEXT: v_mfma_f32_16x16x1f32 v[0:15], v32, v33, v[0:15]
@@ -720,20 +638,13 @@ define amdgpu_kernel void @test_mfma_f32_16x16x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY942-NEXT: v_mfma_f32_16x16x1_4b_f32 v[0:15], v32, v33, v[0:15]
; GREEDY942-NEXT: v_mfma_f32_16x16x1_4b_f32 v[16:31], v32, v33, v[0:15]
; GREEDY942-NEXT: s_nop 9
-; GREEDY942-NEXT: v_mov_b32_e32 v2, v16
-; GREEDY942-NEXT: v_mov_b32_e32 v3, v17
-; GREEDY942-NEXT: v_mov_b32_e32 v4, v18
-; GREEDY942-NEXT: v_mov_b32_e32 v5, v19
-; GREEDY942-NEXT: v_mov_b32_e32 v6, v20
-; GREEDY942-NEXT: v_mov_b32_e32 v7, v21
-; GREEDY942-NEXT: v_mov_b32_e32 v8, v22
-; GREEDY942-NEXT: v_mov_b32_e32 v9, v23
-; GREEDY942-NEXT: v_mov_b32_e32 v10, v24
-; GREEDY942-NEXT: v_mov_b32_e32 v11, v25
-; GREEDY942-NEXT: v_mov_b32_e32 v12, v26
-; GREEDY942-NEXT: v_mov_b32_e32 v13, v27
-; GREEDY942-NEXT: v_mov_b32_e32 v14, v28
-; GREEDY942-NEXT: v_mov_b32_e32 v15, v29
+; GREEDY942-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
+; GREEDY942-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
+; GREEDY942-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
+; GREEDY942-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
+; GREEDY942-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
+; GREEDY942-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
+; GREEDY942-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GREEDY942-NEXT: v_mov_b32_e32 v16, 0
; GREEDY942-NEXT: s_nop 0
; GREEDY942-NEXT: v_mfma_f32_16x16x1_4b_f32 v[0:15], v32, v33, v[0:15]
@@ -764,20 +675,13 @@ define amdgpu_kernel void @test_mfma_f32_16x16x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY90A-GISEL-NEXT: v_mfma_f32_16x16x1f32 v[0:15], v32, v33, v[0:15]
; GREEDY90A-GISEL-NEXT: v_mfma_f32_16x16x1f32 v[16:31], v32, v33, v[0:15]
; GREEDY90A-GISEL-NEXT: s_nop 10
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v2, v16
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v3, v17
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v4, v18
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v5, v19
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v6, v20
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v7, v21
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v8, v22
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v9, v23
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v10, v24
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v11, v25
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v12, v26
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v13, v27
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v14, v28
-; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v15, v29
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[2:3], v[16:17], v[16:17] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[4:5], v[18:19], v[18:19] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[6:7], v[20:21], v[20:21] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[8:9], v[22:23], v[22:23] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[10:11], v[24:25], v[24:25] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[12:13], v[26:27], v[26:27] op_sel:[0,1]
+; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[14:15], v[28:29], v[28:29] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v16, 0
; GREEDY90A-GISEL-NEXT: s_nop 0
; GREEDY90A-GISEL-NEXT: v_mfma_f32_16x16x1f32 v[0:15], v32, v33, v[0:15]
@@ -808,20 +712,13 @@ define amdgpu_kernel void @test_mfma_f32_16x16x1f32(ptr addrspace(1) %arg) #0 {
; FAST90A-NEXT: v_mfma_f32_16x16x1f32 v[2:17], v0, v1, v[2:17]
; FAST90A-NEXT: v_mfma_f32_16x16x1f32 v[18:33], v0, v1, v[2:17]
; FAST90A-NEXT: s_nop 10
-; FAST90A-NEXT: v_mov_b32_e32 v4, v18
-; FAST90A-NEXT: v_mov_b32_e32 v5, v19
-; FAST90A-NEXT: v_mov_b32_e32 v6, v20
-; FAST90A-NEXT: v_mov_b32_e32 v7, v21
-; FAST90A-NEXT: v_mov_b32_e32 v8, v22
-; FAST90A-NEXT: v_mov_b32_e32 v9, v23
-; FAST90A-NEXT: v_mov_b32_e32 v10, v24
-; FAST90A-NEXT: v_mov_b32_e32 v11, v25
-; FAST90A-NEXT: v_mov_b32_e32 v12, v26
-; FAST90A-NEXT: v_mov_b32_e32 v13, v27
-; FAST90A-NEXT: v_mov_b32_e32 v14, v28
-; FAST90A-NEXT: v_mov_b32_e32 v15, v29
-; FAST90A-NEXT: v_mov_b32_e32 v16, v30
-; FAST90A-NEXT: v_mov_b32_e32 v17, v31
+; FAST90A-NEXT: v_pk_mov_b32 v[4:5], v[18:19], v[18:19] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[6:7], v[20:21], v[20:21] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[8:9], v[22:23], v[22:23] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[10:11], v[24:25], v[24:25] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[12:13], v[26:27], v[26:27] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[14:15], v[28:29], v[28:29] op_sel:[0,1]
+; FAST90A-NEXT: v_pk_mov_b32 v[16:17], v[30:31], v[30:31] op_sel:[0,1]
; FAST90A-NEXT: s_nop 1
; FAST90A-NEXT: v_mfma_f32_16x16x1f32 v[2:17], v0, v1, v[2:17]
; FAST90A-NEXT: v_mov_b32_e32 v0, 0
diff --git a/llvm/test/CodeGen/AMDGPU/packed-fp32.ll b/llvm/test/CodeGen/AMDGPU/packed-fp32.ll
index 9cf59be504cc5..032fea76b5378 100644
--- a/llvm/test/CodeGen/AMDGPU/packed-fp32.ll
+++ b/llvm/test/CodeGen/AMDGPU/packed-fp32.ll
@@ -3810,17 +3810,17 @@ define amdgpu_kernel void @fneg_v2f32_scalar(ptr addrspace(1) %a, <2 x float> %x
; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
; GFX900-NEXT: s_endpgm
;
-; PACKED-SDAG-LABEL: fneg_v2f32_scalar:
-; PACKED-SDAG: ; %bb.0:
-; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; PACKED-SDAG-NEXT: v_mov_b32_e32 v0, 0
-; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; PACKED-SDAG-NEXT: s_xor_b32 s3, s3, 0x80000000
-; PACKED-SDAG-NEXT: s_xor_b32 s2, s2, 0x80000000
-; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, s2
-; PACKED-SDAG-NEXT: v_mov_b32_e32 v3, s3
-; PACKED-SDAG-NEXT: global_store_dwordx2 v0, v[2:3], s[0:1]
-; PACKED-SDAG-NEXT: s_endpgm
+; GFX90A-SDAG-LABEL: fneg_v2f32_scalar:
+; GFX90A-SDAG: ; %bb.0:
+; GFX90A-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX90A-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX90A-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX90A-SDAG-NEXT: s_xor_b32 s3, s3, 0x80000000
+; GFX90A-SDAG-NEXT: s_xor_b32 s2, s2, 0x80000000
+; GFX90A-SDAG-NEXT: v_mov_b32_e32 v2, s2
+; GFX90A-SDAG-NEXT: v_mov_b32_e32 v3, s3
+; GFX90A-SDAG-NEXT: global_store_dwordx2 v0, v[2:3], s[0:1]
+; GFX90A-SDAG-NEXT: s_endpgm
;
; PACKED-GISEL-LABEL: fneg_v2f32_scalar:
; PACKED-GISEL: ; %bb.0:
@@ -3831,6 +3831,17 @@ define amdgpu_kernel void @fneg_v2f32_scalar(ptr addrspace(1) %a, <2 x float> %x
; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
; PACKED-GISEL-NEXT: s_endpgm
;
+; GFX942-SDAG-LABEL: fneg_v2f32_scalar:
+; GFX942-SDAG: ; %bb.0:
+; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX942-SDAG-NEXT: s_xor_b32 s3, s3, 0x80000000
+; GFX942-SDAG-NEXT: s_xor_b32 s2, s2, 0x80000000
+; GFX942-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
+; GFX942-SDAG-NEXT: global_store_dwordx2 v0, v[2:3], s[0:1]
+; GFX942-SDAG-NEXT: s_endpgm
+;
; GFX1250-SDAG-LABEL: fneg_v2f32_scalar:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
@@ -3863,6 +3874,3 @@ declare i32 @llvm.amdgcn.workitem.id.x()
declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>)
declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>)
declare <32 x float> @llvm.fma.v32f32(<32 x float>, <32 x float>, <32 x float>)
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX90A-SDAG: {{.*}}
-; GFX942-SDAG: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll b/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
index 344d1f5d0b854..e83e130ebd376 100644
--- a/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
+++ b/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
@@ -498,8 +498,7 @@ define amdgpu_kernel void @preload_block_count_xyz(ptr addrspace(1) inreg %out)
; GFX942-NEXT: ; %bb.2:
; GFX942-NEXT: .LBB11_0:
; GFX942-NEXT: v_mov_b32_e32 v3, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, s4
-; GFX942-NEXT: v_mov_b32_e32 v1, s5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[4:5]
; GFX942-NEXT: v_mov_b32_e32 v2, s6
; GFX942-NEXT: global_store_dwordx3 v3, v[0:2], s[2:3]
; GFX942-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/preload-kernargs.ll b/llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
index 70d08930e3b9c..833d391012847 100644
--- a/llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
+++ b/llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
@@ -443,16 +443,12 @@ define amdgpu_kernel void @v8i32_arg(ptr addrspace(1) nocapture inreg %out, <8 x
; GFX942-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x20
; GFX942-NEXT: v_mov_b32_e32 v4, 0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, s8
-; GFX942-NEXT: v_mov_b32_e32 v1, s9
-; GFX942-NEXT: v_mov_b32_e32 v2, s10
-; GFX942-NEXT: v_mov_b32_e32 v3, s11
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v0, s4
-; GFX942-NEXT: v_mov_b32_e32 v1, s5
-; GFX942-NEXT: v_mov_b32_e32 v2, s6
-; GFX942-NEXT: v_mov_b32_e32 v3, s7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[6:7]
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
; GFX942-NEXT: s_endpgm
;
@@ -552,8 +548,7 @@ define amdgpu_kernel void @v3i32_preload_arg(ptr addrspace(1) nocapture inreg %o
; GFX942-NEXT: .p2align 8
; GFX942-NEXT: ; %bb.2:
; GFX942-NEXT: .LBB11_0:
-; GFX942-NEXT: v_mov_b32_e32 v0, s6
-; GFX942-NEXT: v_mov_b32_e32 v1, s7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[6:7]
; GFX942-NEXT: v_mov_b32_e32 v2, s8
; GFX942-NEXT: v_mov_b32_e32 v3, 0
; GFX942-NEXT: global_store_dwordx3 v3, v[0:2], s[2:3]
@@ -597,8 +592,7 @@ define amdgpu_kernel void @v3f32_preload_arg(ptr addrspace(1) nocapture inreg %o
; GFX942-NEXT: ; %bb.2:
; GFX942-NEXT: .LBB12_0:
; GFX942-NEXT: v_mov_b32_e32 v3, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, s6
-; GFX942-NEXT: v_mov_b32_e32 v1, s7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[6:7]
; GFX942-NEXT: v_mov_b32_e32 v2, s8
; GFX942-NEXT: global_store_dwordx3 v3, v[0:2], s[2:3]
; GFX942-NEXT: s_endpgm
@@ -709,14 +703,11 @@ define amdgpu_kernel void @v5f64_arg(ptr addrspace(1) nocapture inreg %out, <5 x
; GFX942-NEXT: v_mov_b32_e32 v0, s8
; GFX942-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3] offset:32
; GFX942-NEXT: v_mov_b32_e32 v1, s9
-; GFX942-NEXT: v_mov_b32_e32 v2, s10
-; GFX942-NEXT: v_mov_b32_e32 v3, s11
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[10:11]
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v0, s4
-; GFX942-NEXT: v_mov_b32_e32 v1, s5
-; GFX942-NEXT: v_mov_b32_e32 v2, s6
-; GFX942-NEXT: v_mov_b32_e32 v3, s7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[6:7]
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
; GFX942-NEXT: s_endpgm
;
@@ -1096,8 +1087,7 @@ define amdgpu_kernel void @v6bfloat_kernel_preload_arg(ptr addrspace(1) inreg %o
; GFX942-NEXT: .p2align 8
; GFX942-NEXT: ; %bb.2:
; GFX942-NEXT: .LBB22_0:
-; GFX942-NEXT: v_mov_b32_e32 v0, s6
-; GFX942-NEXT: v_mov_b32_e32 v1, s7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[6:7]
; GFX942-NEXT: v_mov_b32_e32 v2, s8
; GFX942-NEXT: v_mov_b32_e32 v3, 0
; GFX942-NEXT: global_store_dwordx3 v3, v[0:2], s[2:3]
@@ -1145,8 +1135,7 @@ define amdgpu_kernel void @half_v7bfloat_kernel_preload_arg(ptr addrspace(1) inr
; GFX942-NEXT: v_mov_b32_e32 v0, s9
; GFX942-NEXT: global_store_short v3, v0, s[10:11] offset:12
; GFX942-NEXT: v_mov_b32_e32 v2, s8
-; GFX942-NEXT: v_mov_b32_e32 v0, s6
-; GFX942-NEXT: v_mov_b32_e32 v1, s7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[6:7]
; GFX942-NEXT: global_store_dwordx3 v3, v[0:2], s[10:11]
; GFX942-NEXT: s_endpgm
;
@@ -1241,10 +1230,8 @@ define amdgpu_kernel void @fp128_kernel_preload_arg(ptr addrspace(1) inreg %out,
; GFX942-NEXT: .p2align 8
; GFX942-NEXT: ; %bb.2:
; GFX942-NEXT: .LBB25_0:
-; GFX942-NEXT: v_mov_b32_e32 v0, s6
-; GFX942-NEXT: v_mov_b32_e32 v1, s7
-; GFX942-NEXT: v_mov_b32_e32 v2, s8
-; GFX942-NEXT: v_mov_b32_e32 v3, s9
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[8:9]
; GFX942-NEXT: v_mov_b32_e32 v4, 0
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
; GFX942-NEXT: s_endpgm
@@ -1358,8 +1345,7 @@ define amdgpu_kernel void @v7half_kernel_preload_arg(ptr addrspace(1) inreg %out
; GFX942-NEXT: v_mov_b32_e32 v0, s9
; GFX942-NEXT: global_store_short v3, v0, s[2:3] offset:12
; GFX942-NEXT: v_mov_b32_e32 v2, s8
-; GFX942-NEXT: v_mov_b32_e32 v0, s6
-; GFX942-NEXT: v_mov_b32_e32 v1, s7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[6:7]
; GFX942-NEXT: global_store_dwordx3 v3, v[0:2], s[2:3]
; GFX942-NEXT: s_endpgm
;
@@ -1453,8 +1439,7 @@ define amdgpu_kernel void @i16_v3i32_kernel_preload_arg(ptr addrspace(1) inreg %
; GFX942-NEXT: .LBB29_0:
; GFX942-NEXT: v_mov_b32_e32 v3, 0
; GFX942-NEXT: v_mov_b32_e32 v4, s4
-; GFX942-NEXT: v_mov_b32_e32 v0, s6
-; GFX942-NEXT: v_mov_b32_e32 v1, s7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[6:7]
; GFX942-NEXT: v_mov_b32_e32 v2, s8
; GFX942-NEXT: global_store_short v3, v4, s[2:3]
; GFX942-NEXT: global_store_dwordx3 v3, v[0:2], s[10:11]
diff --git a/llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll b/llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
index fba7720b37bf6..0523c4e867d00 100644
--- a/llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
+++ b/llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
@@ -46,28 +46,20 @@ define amdgpu_kernel void @store_v16i32(ptr addrspace(1) %out, <16 x i32> %a) {
; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX942-NEXT: v_mov_b32_e32 v0, 0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v2, s20
-; GFX942-NEXT: v_mov_b32_e32 v3, s21
-; GFX942-NEXT: v_mov_b32_e32 v4, s22
-; GFX942-NEXT: v_mov_b32_e32 v5, s23
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[20:21]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[22:23]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:48
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v2, s16
-; GFX942-NEXT: v_mov_b32_e32 v3, s17
-; GFX942-NEXT: v_mov_b32_e32 v4, s18
-; GFX942-NEXT: v_mov_b32_e32 v5, s19
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[16:17]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[18:19]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:32
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v2, s12
-; GFX942-NEXT: v_mov_b32_e32 v3, s13
-; GFX942-NEXT: v_mov_b32_e32 v4, s14
-; GFX942-NEXT: v_mov_b32_e32 v5, s15
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[14:15]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v2, s8
-; GFX942-NEXT: v_mov_b32_e32 v3, s9
-; GFX942-NEXT: v_mov_b32_e32 v4, s10
-; GFX942-NEXT: v_mov_b32_e32 v5, s11
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[10:11]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1]
; GFX942-NEXT: s_endpgm
entry:
diff --git a/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll b/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
index 5aa2cc713a4ec..c79e38a91eca8 100644
--- a/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
+++ b/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
@@ -70,36 +70,21 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_rewrite_vgpr_mfma(ptr addrsp
; CHECK-NEXT: v_mfma_f32_32x32x1_2b_f32 v[32:63], a0, a1, v[0:31]
; CHECK-NEXT: s_nop 15
; CHECK-NEXT: s_nop 1
-; CHECK-NEXT: v_mov_b32_e32 v2, v32
-; CHECK-NEXT: v_mov_b32_e32 v3, v33
-; CHECK-NEXT: v_mov_b32_e32 v4, v34
-; CHECK-NEXT: v_mov_b32_e32 v5, v35
-; CHECK-NEXT: v_mov_b32_e32 v6, v36
-; CHECK-NEXT: v_mov_b32_e32 v7, v37
-; CHECK-NEXT: v_mov_b32_e32 v8, v38
-; CHECK-NEXT: v_mov_b32_e32 v9, v39
-; CHECK-NEXT: v_mov_b32_e32 v10, v40
-; CHECK-NEXT: v_mov_b32_e32 v11, v41
-; CHECK-NEXT: v_mov_b32_e32 v12, v42
-; CHECK-NEXT: v_mov_b32_e32 v13, v43
-; CHECK-NEXT: v_mov_b32_e32 v14, v44
-; CHECK-NEXT: v_mov_b32_e32 v15, v45
-; CHECK-NEXT: v_mov_b32_e32 v16, v46
-; CHECK-NEXT: v_mov_b32_e32 v17, v47
-; CHECK-NEXT: v_mov_b32_e32 v18, v48
-; CHECK-NEXT: v_mov_b32_e32 v19, v49
-; CHECK-NEXT: v_mov_b32_e32 v20, v50
-; CHECK-NEXT: v_mov_b32_e32 v21, v51
-; CHECK-NEXT: v_mov_b32_e32 v22, v52
-; CHECK-NEXT: v_mov_b32_e32 v23, v53
-; CHECK-NEXT: v_mov_b32_e32 v24, v54
-; CHECK-NEXT: v_mov_b32_e32 v25, v55
-; CHECK-NEXT: v_mov_b32_e32 v26, v56
-; CHECK-NEXT: v_mov_b32_e32 v27, v57
-; CHECK-NEXT: v_mov_b32_e32 v28, v58
-; CHECK-NEXT: v_mov_b32_e32 v29, v59
-; CHECK-NEXT: v_mov_b32_e32 v30, v60
-; CHECK-NEXT: v_mov_b32_e32 v31, v61
+; CHECK-NEXT: v_mov_b64_e32 v[2:3], v[32:33]
+; CHECK-NEXT: v_mov_b64_e32 v[4:5], v[34:35]
+; CHECK-NEXT: v_mov_b64_e32 v[6:7], v[36:37]
+; CHECK-NEXT: v_mov_b64_e32 v[8:9], v[38:39]
+; CHECK-NEXT: v_mov_b64_e32 v[10:11], v[40:41]
+; CHECK-NEXT: v_mov_b64_e32 v[12:13], v[42:43]
+; CHECK-NEXT: v_mov_b64_e32 v[14:15], v[44:45]
+; CHECK-NEXT: v_mov_b64_e32 v[16:17], v[46:47]
+; CHECK-NEXT: v_mov_b64_e32 v[18:19], v[48:49]
+; CHECK-NEXT: v_mov_b64_e32 v[20:21], v[50:51]
+; CHECK-NEXT: v_mov_b64_e32 v[22:23], v[52:53]
+; CHECK-NEXT: v_mov_b64_e32 v[24:25], v[54:55]
+; CHECK-NEXT: v_mov_b64_e32 v[26:27], v[56:57]
+; CHECK-NEXT: v_mov_b64_e32 v[28:29], v[58:59]
+; CHECK-NEXT: v_mov_b64_e32 v[30:31], v[60:61]
; CHECK-NEXT: v_mov_b32_e32 v32, 0
; CHECK-NEXT: s_nop 0
; CHECK-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], a0, a1, v[0:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll b/llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
index 58c8462ec795c..748ef4280fd82 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
@@ -29,8 +29,7 @@ define void @shufflevector_v2i32_10_physreg_even_vgpr_pair_copy(ptr addrspace(1)
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v4, v5
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v2, v5
-; GFX90A-NEXT: v_mov_b32_e32 v3, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx2 v0, v[2:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -43,8 +42,7 @@ define void @shufflevector_v2i32_10_physreg_even_vgpr_pair_copy(ptr addrspace(1)
; GFX940-NEXT: ; def v4, v5
; GFX940-NEXT: ;;#ASMEND
; GFX940-NEXT: s_nop 0
-; GFX940-NEXT: v_mov_b32_e32 v2, v5
-; GFX940-NEXT: v_mov_b32_e32 v3, v4
+; GFX940-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[1,0]
; GFX940-NEXT: global_store_dwordx2 v0, v[2:3], s[0:1]
; GFX940-NEXT: s_waitcnt vmcnt(0)
; GFX940-NEXT: s_setpc_b64 s[30:31]
@@ -270,8 +268,7 @@ define void @shufflevector_v4i32_3210_physreg_even_vgpr_quad_copy(ptr addrspace(
; GFX90A-NEXT: ; def v4, v5, v6, v7
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, v5
-; GFX90A-NEXT: v_mov_b32_e32 v9, v6
-; GFX90A-NEXT: v_mov_b32_e32 v8, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v11, v4
; GFX90A-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -286,8 +283,7 @@ define void @shufflevector_v4i32_3210_physreg_even_vgpr_quad_copy(ptr addrspace(
; GFX940-NEXT: ;;#ASMEND
; GFX940-NEXT: s_nop 0
; GFX940-NEXT: v_mov_b32_e32 v10, v5
-; GFX940-NEXT: v_mov_b32_e32 v9, v6
-; GFX940-NEXT: v_mov_b32_e32 v8, v7
+; GFX940-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[1,0]
; GFX940-NEXT: v_mov_b32_e32 v11, v4
; GFX940-NEXT: global_store_dwordx4 v0, v[8:11], s[0:1]
; GFX940-NEXT: s_waitcnt vmcnt(0)
@@ -332,8 +328,7 @@ define void @shufflevector_v4i32_1032_physreg_even_vgpr_quad_copy(ptr addrspace(
; GFX90A-NEXT: ; def v4, v5, v6, v7
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, v5
-; GFX90A-NEXT: v_mov_b32_e32 v11, v6
-; GFX90A-NEXT: v_mov_b32_e32 v10, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v9, v4
; GFX90A-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -348,8 +343,7 @@ define void @shufflevector_v4i32_1032_physreg_even_vgpr_quad_copy(ptr addrspace(
; GFX940-NEXT: ;;#ASMEND
; GFX940-NEXT: s_nop 0
; GFX940-NEXT: v_mov_b32_e32 v8, v5
-; GFX940-NEXT: v_mov_b32_e32 v11, v6
-; GFX940-NEXT: v_mov_b32_e32 v10, v7
+; GFX940-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[1,0]
; GFX940-NEXT: v_mov_b32_e32 v9, v4
; GFX940-NEXT: global_store_dwordx4 v0, v[8:11], s[0:1]
; GFX940-NEXT: s_waitcnt vmcnt(0)
@@ -449,8 +443,7 @@ define void @shufflevector_v4i32_3201_physreg_even_vgpr_quad_copy(ptr addrspace(
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v4, v5, v6, v7
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v3, v6
-; GFX90A-NEXT: v_mov_b32_e32 v2, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -463,8 +456,7 @@ define void @shufflevector_v4i32_3201_physreg_even_vgpr_quad_copy(ptr addrspace(
; GFX940-NEXT: ; def v4, v5, v6, v7
; GFX940-NEXT: ;;#ASMEND
; GFX940-NEXT: s_nop 0
-; GFX940-NEXT: v_mov_b32_e32 v3, v6
-; GFX940-NEXT: v_mov_b32_e32 v2, v7
+; GFX940-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[1,0]
; GFX940-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1]
; GFX940-NEXT: s_waitcnt vmcnt(0)
; GFX940-NEXT: s_setpc_b64 s[30:31]
@@ -751,8 +743,7 @@ define i32 @shufflevector_v4i32_3210_physreg_even_vgpr_quad_copy_other_use_elt(p
; GFX90A-NEXT: ; def v4, v5, v6, v7
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, v5
-; GFX90A-NEXT: v_mov_b32_e32 v9, v6
-; GFX90A-NEXT: v_mov_b32_e32 v8, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v11, v4
; GFX90A-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17]
; GFX90A-NEXT: v_mov_b32_e32 v0, v6
@@ -768,8 +759,7 @@ define i32 @shufflevector_v4i32_3210_physreg_even_vgpr_quad_copy_other_use_elt(p
; GFX940-NEXT: ;;#ASMEND
; GFX940-NEXT: s_nop 0
; GFX940-NEXT: v_mov_b32_e32 v10, v5
-; GFX940-NEXT: v_mov_b32_e32 v9, v6
-; GFX940-NEXT: v_mov_b32_e32 v8, v7
+; GFX940-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[1,0]
; GFX940-NEXT: v_mov_b32_e32 v11, v4
; GFX940-NEXT: global_store_dwordx4 v0, v[8:11], s[0:1]
; GFX940-NEXT: v_mov_b32_e32 v0, v6
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
index 1df6f21f15594..2e7bd327a8b1c 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
@@ -264,8 +264,7 @@ define void @v_shuffle_v2i64_v2i64__3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -278,8 +277,7 @@ define void @v_shuffle_v2i64_v2i64__3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -311,8 +309,7 @@ define void @v_shuffle_v2i64_v2i64__3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -325,8 +322,7 @@ define void @v_shuffle_v2i64_v2i64__3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -397,8 +393,7 @@ define void @v_shuffle_v2i64_v2i64__0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -410,8 +405,7 @@ define void @v_shuffle_v2i64_v2i64__0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -442,8 +436,7 @@ define void @v_shuffle_v2i64_v2i64__1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -456,8 +449,7 @@ define void @v_shuffle_v2i64_v2i64__1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -605,8 +597,7 @@ define void @v_shuffle_v2i64_v2i64__1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -619,8 +610,7 @@ define void @v_shuffle_v2i64_v2i64__1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -836,8 +826,7 @@ define void @v_shuffle_v2i64_v2i64__0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -853,8 +842,7 @@ define void @v_shuffle_v2i64_v2i64__0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -889,8 +877,7 @@ define void @v_shuffle_v2i64_v2i64__1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -905,8 +892,7 @@ define void @v_shuffle_v2i64_v2i64__1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v3i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v3i64.ll
index 13b16f778aa97..b3a74d3c9a4b8 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v3i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v3i64.ll
@@ -393,8 +393,7 @@ define void @v_shuffle_v2i64_v3i64__5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -407,8 +406,7 @@ define void @v_shuffle_v2i64_v3i64__5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -440,8 +438,7 @@ define void @v_shuffle_v2i64_v3i64__5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -454,8 +451,7 @@ define void @v_shuffle_v2i64_v3i64__5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -487,8 +483,7 @@ define void @v_shuffle_v2i64_v3i64__5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -501,8 +496,7 @@ define void @v_shuffle_v2i64_v3i64__5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -573,8 +567,7 @@ define void @v_shuffle_v2i64_v3i64__0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -586,8 +579,7 @@ define void @v_shuffle_v2i64_v3i64__0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -618,8 +610,7 @@ define void @v_shuffle_v2i64_v3i64__1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -631,8 +622,7 @@ define void @v_shuffle_v2i64_v3i64__1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -663,8 +653,7 @@ define void @v_shuffle_v2i64_v3i64__2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -677,8 +666,7 @@ define void @v_shuffle_v2i64_v3i64__2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -754,8 +742,7 @@ define void @v_shuffle_v2i64_v3i64__4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -771,8 +758,7 @@ define void @v_shuffle_v2i64_v3i64__4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -882,8 +868,7 @@ define void @v_shuffle_v2i64_v3i64__1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -895,8 +880,7 @@ define void @v_shuffle_v2i64_v3i64__1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -927,8 +911,7 @@ define void @v_shuffle_v2i64_v3i64__2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -941,8 +924,7 @@ define void @v_shuffle_v2i64_v3i64__2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1018,8 +1000,7 @@ define void @v_shuffle_v2i64_v3i64__4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1035,8 +1016,7 @@ define void @v_shuffle_v2i64_v3i64__4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1107,8 +1087,7 @@ define void @v_shuffle_v2i64_v3i64__0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1120,8 +1099,7 @@ define void @v_shuffle_v2i64_v3i64__0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1191,8 +1169,7 @@ define void @v_shuffle_v2i64_v3i64__2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1205,8 +1182,7 @@ define void @v_shuffle_v2i64_v3i64__2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1282,8 +1258,7 @@ define void @v_shuffle_v2i64_v3i64__4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1299,8 +1274,7 @@ define void @v_shuffle_v2i64_v3i64__4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1471,8 +1445,7 @@ define void @v_shuffle_v2i64_v3i64__4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1484,8 +1457,7 @@ define void @v_shuffle_v2i64_v3i64__4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1563,8 +1535,7 @@ define void @v_shuffle_v2i64_v3i64__0_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1580,8 +1551,7 @@ define void @v_shuffle_v2i64_v3i64__0_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1619,8 +1589,7 @@ define void @v_shuffle_v2i64_v3i64__1_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1636,8 +1605,7 @@ define void @v_shuffle_v2i64_v3i64__1_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1672,8 +1640,7 @@ define void @v_shuffle_v2i64_v3i64__2_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1688,8 +1655,7 @@ define void @v_shuffle_v2i64_v3i64__2_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -1764,8 +1730,7 @@ define void @v_shuffle_v2i64_v3i64__4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1777,8 +1742,7 @@ define void @v_shuffle_v2i64_v3i64__4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1856,8 +1820,7 @@ define void @v_shuffle_v2i64_v3i64__0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1873,8 +1836,7 @@ define void @v_shuffle_v2i64_v3i64__0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1912,8 +1874,7 @@ define void @v_shuffle_v2i64_v3i64__1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1929,8 +1890,7 @@ define void @v_shuffle_v2i64_v3i64__1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1965,8 +1925,7 @@ define void @v_shuffle_v2i64_v3i64__2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1981,8 +1940,7 @@ define void @v_shuffle_v2i64_v3i64__2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -2017,8 +1975,7 @@ define void @v_shuffle_v2i64_v3i64__3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2030,8 +1987,7 @@ define void @v_shuffle_v2i64_v3i64__3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
index e756a7ae1682d..0f87981fba05d 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
@@ -522,8 +522,7 @@ define void @v_shuffle_v2i64_v4i64__7_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -536,8 +535,7 @@ define void @v_shuffle_v2i64_v4i64__7_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -569,8 +567,7 @@ define void @v_shuffle_v2i64_v4i64__7_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -583,8 +580,7 @@ define void @v_shuffle_v2i64_v4i64__7_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -616,8 +612,7 @@ define void @v_shuffle_v2i64_v4i64__7_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -630,8 +625,7 @@ define void @v_shuffle_v2i64_v4i64__7_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -663,8 +657,7 @@ define void @v_shuffle_v2i64_v4i64__7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -677,8 +670,7 @@ define void @v_shuffle_v2i64_v4i64__7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -749,8 +741,7 @@ define void @v_shuffle_v2i64_v4i64__0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -762,8 +753,7 @@ define void @v_shuffle_v2i64_v4i64__0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -794,8 +784,7 @@ define void @v_shuffle_v2i64_v4i64__1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -807,8 +796,7 @@ define void @v_shuffle_v2i64_v4i64__1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -839,8 +827,7 @@ define void @v_shuffle_v2i64_v4i64__2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -852,8 +839,7 @@ define void @v_shuffle_v2i64_v4i64__2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -884,8 +870,7 @@ define void @v_shuffle_v2i64_v4i64__3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -898,8 +883,7 @@ define void @v_shuffle_v2i64_v4i64__3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -975,8 +959,7 @@ define void @v_shuffle_v2i64_v4i64__5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -992,8 +975,7 @@ define void @v_shuffle_v2i64_v4i64__5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1031,8 +1013,7 @@ define void @v_shuffle_v2i64_v4i64__6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1048,8 +1029,7 @@ define void @v_shuffle_v2i64_v4i64__6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1159,8 +1139,7 @@ define void @v_shuffle_v2i64_v4i64__1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1172,8 +1151,7 @@ define void @v_shuffle_v2i64_v4i64__1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1204,8 +1182,7 @@ define void @v_shuffle_v2i64_v4i64__2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1217,8 +1194,7 @@ define void @v_shuffle_v2i64_v4i64__2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1249,8 +1225,7 @@ define void @v_shuffle_v2i64_v4i64__3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1263,8 +1238,7 @@ define void @v_shuffle_v2i64_v4i64__3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1340,8 +1314,7 @@ define void @v_shuffle_v2i64_v4i64__5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1357,8 +1330,7 @@ define void @v_shuffle_v2i64_v4i64__5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1396,8 +1368,7 @@ define void @v_shuffle_v2i64_v4i64__6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1413,8 +1384,7 @@ define void @v_shuffle_v2i64_v4i64__6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1485,8 +1455,7 @@ define void @v_shuffle_v2i64_v4i64__0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1498,8 +1467,7 @@ define void @v_shuffle_v2i64_v4i64__0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1569,8 +1537,7 @@ define void @v_shuffle_v2i64_v4i64__2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1582,8 +1549,7 @@ define void @v_shuffle_v2i64_v4i64__2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1614,8 +1580,7 @@ define void @v_shuffle_v2i64_v4i64__3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1628,8 +1593,7 @@ define void @v_shuffle_v2i64_v4i64__3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1705,8 +1669,7 @@ define void @v_shuffle_v2i64_v4i64__5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1722,8 +1685,7 @@ define void @v_shuffle_v2i64_v4i64__5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1761,8 +1723,7 @@ define void @v_shuffle_v2i64_v4i64__6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1778,8 +1739,7 @@ define void @v_shuffle_v2i64_v4i64__6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1850,8 +1810,7 @@ define void @v_shuffle_v2i64_v4i64__0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1863,8 +1822,7 @@ define void @v_shuffle_v2i64_v4i64__0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1895,8 +1853,7 @@ define void @v_shuffle_v2i64_v4i64__1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1908,8 +1865,7 @@ define void @v_shuffle_v2i64_v4i64__1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1979,8 +1935,7 @@ define void @v_shuffle_v2i64_v4i64__3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1993,8 +1948,7 @@ define void @v_shuffle_v2i64_v4i64__3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2070,8 +2024,7 @@ define void @v_shuffle_v2i64_v4i64__5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2087,8 +2040,7 @@ define void @v_shuffle_v2i64_v4i64__5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2126,8 +2078,7 @@ define void @v_shuffle_v2i64_v4i64__6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2143,8 +2094,7 @@ define void @v_shuffle_v2i64_v4i64__6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2354,8 +2304,7 @@ define void @v_shuffle_v2i64_v4i64__5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2367,8 +2316,7 @@ define void @v_shuffle_v2i64_v4i64__5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2400,8 +2348,7 @@ define void @v_shuffle_v2i64_v4i64__6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2413,8 +2360,7 @@ define void @v_shuffle_v2i64_v4i64__6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2492,8 +2438,7 @@ define void @v_shuffle_v2i64_v4i64__0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2509,8 +2454,7 @@ define void @v_shuffle_v2i64_v4i64__0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2548,8 +2492,7 @@ define void @v_shuffle_v2i64_v4i64__1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2565,8 +2508,7 @@ define void @v_shuffle_v2i64_v4i64__1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2604,8 +2546,7 @@ define void @v_shuffle_v2i64_v4i64__2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2621,8 +2562,7 @@ define void @v_shuffle_v2i64_v4i64__2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2657,8 +2597,7 @@ define void @v_shuffle_v2i64_v4i64__3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -2673,8 +2612,7 @@ define void @v_shuffle_v2i64_v4i64__3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -2749,8 +2687,7 @@ define void @v_shuffle_v2i64_v4i64__5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2762,8 +2699,7 @@ define void @v_shuffle_v2i64_v4i64__5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2795,8 +2731,7 @@ define void @v_shuffle_v2i64_v4i64__6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2808,8 +2743,7 @@ define void @v_shuffle_v2i64_v4i64__6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2887,8 +2821,7 @@ define void @v_shuffle_v2i64_v4i64__0_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2904,8 +2837,7 @@ define void @v_shuffle_v2i64_v4i64__0_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2943,8 +2875,7 @@ define void @v_shuffle_v2i64_v4i64__1_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2960,8 +2891,7 @@ define void @v_shuffle_v2i64_v4i64__1_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2999,8 +2929,7 @@ define void @v_shuffle_v2i64_v4i64__2_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3016,8 +2945,7 @@ define void @v_shuffle_v2i64_v4i64__2_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3052,8 +2980,7 @@ define void @v_shuffle_v2i64_v4i64__3_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -3068,8 +2995,7 @@ define void @v_shuffle_v2i64_v4i64__3_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -3104,8 +3030,7 @@ define void @v_shuffle_v2i64_v4i64__4_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3117,8 +3042,7 @@ define void @v_shuffle_v2i64_v4i64__4_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3190,8 +3114,7 @@ define void @v_shuffle_v2i64_v4i64__6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3203,8 +3126,7 @@ define void @v_shuffle_v2i64_v4i64__6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3282,8 +3204,7 @@ define void @v_shuffle_v2i64_v4i64__0_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3299,8 +3220,7 @@ define void @v_shuffle_v2i64_v4i64__0_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3338,8 +3258,7 @@ define void @v_shuffle_v2i64_v4i64__1_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v10
-; GFX90A-NEXT: v_mov_b32_e32 v5, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3355,8 +3274,7 @@ define void @v_shuffle_v2i64_v4i64__1_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v10
-; GFX942-NEXT: v_mov_b32_e32 v5, v11
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3394,8 +3312,7 @@ define void @v_shuffle_v2i64_v4i64__2_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v12
-; GFX90A-NEXT: v_mov_b32_e32 v7, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3411,8 +3328,7 @@ define void @v_shuffle_v2i64_v4i64__2_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v12
-; GFX942-NEXT: v_mov_b32_e32 v7, v13
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3447,8 +3363,7 @@ define void @v_shuffle_v2i64_v4i64__3_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -3463,8 +3378,7 @@ define void @v_shuffle_v2i64_v4i64__3_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -3499,8 +3413,7 @@ define void @v_shuffle_v2i64_v4i64__4_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3512,8 +3425,7 @@ define void @v_shuffle_v2i64_v4i64__4_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3545,8 +3457,7 @@ define void @v_shuffle_v2i64_v4i64__5_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3558,8 +3469,7 @@ define void @v_shuffle_v2i64_v4i64__5_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
index 1c2215d39dc02..fbd910cbb5ac1 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
@@ -1038,8 +1038,7 @@ define void @v_shuffle_v2i64_v8i64__15_8(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v0
-; GFX90A-NEXT: v_mov_b32_e32 v17, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1052,8 +1051,7 @@ define void @v_shuffle_v2i64_v8i64__15_8(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v0
-; GFX942-NEXT: v_mov_b32_e32 v17, v1
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1085,8 +1083,7 @@ define void @v_shuffle_v2i64_v8i64__15_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v2
-; GFX90A-NEXT: v_mov_b32_e32 v17, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1099,8 +1096,7 @@ define void @v_shuffle_v2i64_v8i64__15_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v2
-; GFX942-NEXT: v_mov_b32_e32 v17, v3
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1132,8 +1128,7 @@ define void @v_shuffle_v2i64_v8i64__15_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v4
-; GFX90A-NEXT: v_mov_b32_e32 v17, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1146,8 +1141,7 @@ define void @v_shuffle_v2i64_v8i64__15_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v4
-; GFX942-NEXT: v_mov_b32_e32 v17, v5
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1179,8 +1173,7 @@ define void @v_shuffle_v2i64_v8i64__15_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v6
-; GFX90A-NEXT: v_mov_b32_e32 v17, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1193,8 +1186,7 @@ define void @v_shuffle_v2i64_v8i64__15_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v6
-; GFX942-NEXT: v_mov_b32_e32 v17, v7
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1226,8 +1218,7 @@ define void @v_shuffle_v2i64_v8i64__15_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v8
-; GFX90A-NEXT: v_mov_b32_e32 v17, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1240,8 +1231,7 @@ define void @v_shuffle_v2i64_v8i64__15_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v8
-; GFX942-NEXT: v_mov_b32_e32 v17, v9
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1273,8 +1263,7 @@ define void @v_shuffle_v2i64_v8i64__15_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v10
-; GFX90A-NEXT: v_mov_b32_e32 v17, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1287,8 +1276,7 @@ define void @v_shuffle_v2i64_v8i64__15_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v10
-; GFX942-NEXT: v_mov_b32_e32 v17, v11
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1320,8 +1308,7 @@ define void @v_shuffle_v2i64_v8i64__15_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v12
-; GFX90A-NEXT: v_mov_b32_e32 v17, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1334,8 +1321,7 @@ define void @v_shuffle_v2i64_v8i64__15_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v12
-; GFX942-NEXT: v_mov_b32_e32 v17, v13
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1367,8 +1353,7 @@ define void @v_shuffle_v2i64_v8i64__15_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1381,8 +1366,7 @@ define void @v_shuffle_v2i64_v8i64__15_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1453,8 +1437,7 @@ define void @v_shuffle_v2i64_v8i64__0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1466,8 +1449,7 @@ define void @v_shuffle_v2i64_v8i64__0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1498,8 +1480,7 @@ define void @v_shuffle_v2i64_v8i64__1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1511,8 +1492,7 @@ define void @v_shuffle_v2i64_v8i64__1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1543,8 +1523,7 @@ define void @v_shuffle_v2i64_v8i64__2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1556,8 +1535,7 @@ define void @v_shuffle_v2i64_v8i64__2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1588,8 +1566,7 @@ define void @v_shuffle_v2i64_v8i64__3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1601,8 +1578,7 @@ define void @v_shuffle_v2i64_v8i64__3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1633,8 +1609,7 @@ define void @v_shuffle_v2i64_v8i64__4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v0
-; GFX90A-NEXT: v_mov_b32_e32 v11, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1646,8 +1621,7 @@ define void @v_shuffle_v2i64_v8i64__4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v0
-; GFX942-NEXT: v_mov_b32_e32 v11, v1
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1678,8 +1652,7 @@ define void @v_shuffle_v2i64_v8i64__5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v0
-; GFX90A-NEXT: v_mov_b32_e32 v13, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1691,8 +1664,7 @@ define void @v_shuffle_v2i64_v8i64__5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v0
-; GFX942-NEXT: v_mov_b32_e32 v13, v1
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1723,8 +1695,7 @@ define void @v_shuffle_v2i64_v8i64__6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v0
-; GFX90A-NEXT: v_mov_b32_e32 v15, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1736,8 +1707,7 @@ define void @v_shuffle_v2i64_v8i64__6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v0
-; GFX942-NEXT: v_mov_b32_e32 v15, v1
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1768,8 +1738,7 @@ define void @v_shuffle_v2i64_v8i64__7_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v0
-; GFX90A-NEXT: v_mov_b32_e32 v17, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1782,8 +1751,7 @@ define void @v_shuffle_v2i64_v8i64__7_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v0
-; GFX942-NEXT: v_mov_b32_e32 v17, v1
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1859,8 +1827,7 @@ define void @v_shuffle_v2i64_v8i64__9_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1876,8 +1843,7 @@ define void @v_shuffle_v2i64_v8i64__9_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1915,8 +1881,7 @@ define void @v_shuffle_v2i64_v8i64__10_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1932,8 +1897,7 @@ define void @v_shuffle_v2i64_v8i64__10_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1971,8 +1935,7 @@ define void @v_shuffle_v2i64_v8i64__11_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v0
-; GFX90A-NEXT: v_mov_b32_e32 v11, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1988,8 +1951,7 @@ define void @v_shuffle_v2i64_v8i64__11_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v0
-; GFX942-NEXT: v_mov_b32_e32 v11, v1
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2027,8 +1989,7 @@ define void @v_shuffle_v2i64_v8i64__12_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v0
-; GFX90A-NEXT: v_mov_b32_e32 v13, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2044,8 +2005,7 @@ define void @v_shuffle_v2i64_v8i64__12_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v0
-; GFX942-NEXT: v_mov_b32_e32 v13, v1
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2083,8 +2043,7 @@ define void @v_shuffle_v2i64_v8i64__13_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v0
-; GFX90A-NEXT: v_mov_b32_e32 v15, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2100,8 +2059,7 @@ define void @v_shuffle_v2i64_v8i64__13_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v0
-; GFX942-NEXT: v_mov_b32_e32 v15, v1
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2139,8 +2097,7 @@ define void @v_shuffle_v2i64_v8i64__14_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v0
-; GFX90A-NEXT: v_mov_b32_e32 v17, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2156,8 +2113,7 @@ define void @v_shuffle_v2i64_v8i64__14_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v0
-; GFX942-NEXT: v_mov_b32_e32 v17, v1
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2267,8 +2223,7 @@ define void @v_shuffle_v2i64_v8i64__1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2280,8 +2235,7 @@ define void @v_shuffle_v2i64_v8i64__1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2312,8 +2266,7 @@ define void @v_shuffle_v2i64_v8i64__2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2325,8 +2278,7 @@ define void @v_shuffle_v2i64_v8i64__2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2357,8 +2309,7 @@ define void @v_shuffle_v2i64_v8i64__3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2370,8 +2321,7 @@ define void @v_shuffle_v2i64_v8i64__3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2402,8 +2352,7 @@ define void @v_shuffle_v2i64_v8i64__4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2415,8 +2364,7 @@ define void @v_shuffle_v2i64_v8i64__4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2447,8 +2395,7 @@ define void @v_shuffle_v2i64_v8i64__5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v2
-; GFX90A-NEXT: v_mov_b32_e32 v13, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2460,8 +2407,7 @@ define void @v_shuffle_v2i64_v8i64__5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v2
-; GFX942-NEXT: v_mov_b32_e32 v13, v3
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2492,8 +2438,7 @@ define void @v_shuffle_v2i64_v8i64__6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v2
-; GFX90A-NEXT: v_mov_b32_e32 v15, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2505,8 +2450,7 @@ define void @v_shuffle_v2i64_v8i64__6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v2
-; GFX942-NEXT: v_mov_b32_e32 v15, v3
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2537,8 +2481,7 @@ define void @v_shuffle_v2i64_v8i64__7_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v2
-; GFX90A-NEXT: v_mov_b32_e32 v17, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2551,8 +2494,7 @@ define void @v_shuffle_v2i64_v8i64__7_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v2
-; GFX942-NEXT: v_mov_b32_e32 v17, v3
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2628,8 +2570,7 @@ define void @v_shuffle_v2i64_v8i64__9_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2645,8 +2586,7 @@ define void @v_shuffle_v2i64_v8i64__9_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v20, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2684,8 +2624,7 @@ define void @v_shuffle_v2i64_v8i64__10_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2701,8 +2640,7 @@ define void @v_shuffle_v2i64_v8i64__10_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v20, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2740,8 +2678,7 @@ define void @v_shuffle_v2i64_v8i64__11_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v2
-; GFX90A-NEXT: v_mov_b32_e32 v13, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2757,8 +2694,7 @@ define void @v_shuffle_v2i64_v8i64__11_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v2
-; GFX942-NEXT: v_mov_b32_e32 v13, v3
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v20, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2796,8 +2732,7 @@ define void @v_shuffle_v2i64_v8i64__12_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v2
-; GFX90A-NEXT: v_mov_b32_e32 v15, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2813,8 +2748,7 @@ define void @v_shuffle_v2i64_v8i64__12_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v2
-; GFX942-NEXT: v_mov_b32_e32 v15, v3
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v20, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2852,8 +2786,7 @@ define void @v_shuffle_v2i64_v8i64__13_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v2
-; GFX90A-NEXT: v_mov_b32_e32 v17, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2869,8 +2802,7 @@ define void @v_shuffle_v2i64_v8i64__13_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v2
-; GFX942-NEXT: v_mov_b32_e32 v17, v3
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v20, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2908,8 +2840,7 @@ define void @v_shuffle_v2i64_v8i64__14_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v18, v2
-; GFX90A-NEXT: v_mov_b32_e32 v19, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[18:19], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[16:19], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2925,8 +2856,7 @@ define void @v_shuffle_v2i64_v8i64__14_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v18, v2
-; GFX942-NEXT: v_mov_b32_e32 v19, v3
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v20, v[16:19], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2997,8 +2927,7 @@ define void @v_shuffle_v2i64_v8i64__0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3010,8 +2939,7 @@ define void @v_shuffle_v2i64_v8i64__0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3081,8 +3009,7 @@ define void @v_shuffle_v2i64_v8i64__2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3094,8 +3021,7 @@ define void @v_shuffle_v2i64_v8i64__2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3126,8 +3052,7 @@ define void @v_shuffle_v2i64_v8i64__3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3139,8 +3064,7 @@ define void @v_shuffle_v2i64_v8i64__3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3171,8 +3095,7 @@ define void @v_shuffle_v2i64_v8i64__4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3184,8 +3107,7 @@ define void @v_shuffle_v2i64_v8i64__4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3216,8 +3138,7 @@ define void @v_shuffle_v2i64_v8i64__5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3229,8 +3150,7 @@ define void @v_shuffle_v2i64_v8i64__5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3261,8 +3181,7 @@ define void @v_shuffle_v2i64_v8i64__6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v4
-; GFX90A-NEXT: v_mov_b32_e32 v15, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3274,8 +3193,7 @@ define void @v_shuffle_v2i64_v8i64__6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v4
-; GFX942-NEXT: v_mov_b32_e32 v15, v5
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3306,8 +3224,7 @@ define void @v_shuffle_v2i64_v8i64__7_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v4
-; GFX90A-NEXT: v_mov_b32_e32 v17, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3320,8 +3237,7 @@ define void @v_shuffle_v2i64_v8i64__7_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v4
-; GFX942-NEXT: v_mov_b32_e32 v17, v5
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3397,8 +3313,7 @@ define void @v_shuffle_v2i64_v8i64__9_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3414,8 +3329,7 @@ define void @v_shuffle_v2i64_v8i64__9_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v22, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3453,8 +3367,7 @@ define void @v_shuffle_v2i64_v8i64__10_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3470,8 +3383,7 @@ define void @v_shuffle_v2i64_v8i64__10_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v22, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3509,8 +3421,7 @@ define void @v_shuffle_v2i64_v8i64__11_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v4
-; GFX90A-NEXT: v_mov_b32_e32 v15, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3526,8 +3437,7 @@ define void @v_shuffle_v2i64_v8i64__11_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v4
-; GFX942-NEXT: v_mov_b32_e32 v15, v5
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v22, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3565,8 +3475,7 @@ define void @v_shuffle_v2i64_v8i64__12_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v4
-; GFX90A-NEXT: v_mov_b32_e32 v17, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3582,8 +3491,7 @@ define void @v_shuffle_v2i64_v8i64__12_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v4
-; GFX942-NEXT: v_mov_b32_e32 v17, v5
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v22, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3621,8 +3529,7 @@ define void @v_shuffle_v2i64_v8i64__13_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v18, v4
-; GFX90A-NEXT: v_mov_b32_e32 v19, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[18:19], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[16:19], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3638,8 +3545,7 @@ define void @v_shuffle_v2i64_v8i64__13_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v18, v4
-; GFX942-NEXT: v_mov_b32_e32 v19, v5
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v22, v[16:19], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3677,8 +3583,7 @@ define void @v_shuffle_v2i64_v8i64__14_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v20, v4
-; GFX90A-NEXT: v_mov_b32_e32 v21, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[20:21], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[18:21], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3694,8 +3599,7 @@ define void @v_shuffle_v2i64_v8i64__14_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v20, v4
-; GFX942-NEXT: v_mov_b32_e32 v21, v5
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v22, v[18:21], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3766,8 +3670,7 @@ define void @v_shuffle_v2i64_v8i64__0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3779,8 +3682,7 @@ define void @v_shuffle_v2i64_v8i64__0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3811,8 +3713,7 @@ define void @v_shuffle_v2i64_v8i64__1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3824,8 +3725,7 @@ define void @v_shuffle_v2i64_v8i64__1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3895,8 +3795,7 @@ define void @v_shuffle_v2i64_v8i64__3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3908,8 +3807,7 @@ define void @v_shuffle_v2i64_v8i64__3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3940,8 +3838,7 @@ define void @v_shuffle_v2i64_v8i64__4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3953,8 +3850,7 @@ define void @v_shuffle_v2i64_v8i64__4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3985,8 +3881,7 @@ define void @v_shuffle_v2i64_v8i64__5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3998,8 +3893,7 @@ define void @v_shuffle_v2i64_v8i64__5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4030,8 +3924,7 @@ define void @v_shuffle_v2i64_v8i64__6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4043,8 +3936,7 @@ define void @v_shuffle_v2i64_v8i64__6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4075,8 +3967,7 @@ define void @v_shuffle_v2i64_v8i64__7_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v6
-; GFX90A-NEXT: v_mov_b32_e32 v17, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4089,8 +3980,7 @@ define void @v_shuffle_v2i64_v8i64__7_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v6
-; GFX942-NEXT: v_mov_b32_e32 v17, v7
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4166,8 +4056,7 @@ define void @v_shuffle_v2i64_v8i64__9_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4183,8 +4072,7 @@ define void @v_shuffle_v2i64_v8i64__9_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v24, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4222,8 +4110,7 @@ define void @v_shuffle_v2i64_v8i64__10_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4239,8 +4126,7 @@ define void @v_shuffle_v2i64_v8i64__10_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v24, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4278,8 +4164,7 @@ define void @v_shuffle_v2i64_v8i64__11_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v6
-; GFX90A-NEXT: v_mov_b32_e32 v17, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4295,8 +4180,7 @@ define void @v_shuffle_v2i64_v8i64__11_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v6
-; GFX942-NEXT: v_mov_b32_e32 v17, v7
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v24, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4334,8 +4218,7 @@ define void @v_shuffle_v2i64_v8i64__12_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v18, v6
-; GFX90A-NEXT: v_mov_b32_e32 v19, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[18:19], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[16:19], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4351,8 +4234,7 @@ define void @v_shuffle_v2i64_v8i64__12_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v18, v6
-; GFX942-NEXT: v_mov_b32_e32 v19, v7
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v24, v[16:19], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4390,8 +4272,7 @@ define void @v_shuffle_v2i64_v8i64__13_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v20, v6
-; GFX90A-NEXT: v_mov_b32_e32 v21, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[20:21], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[18:21], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4407,8 +4288,7 @@ define void @v_shuffle_v2i64_v8i64__13_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v20, v6
-; GFX942-NEXT: v_mov_b32_e32 v21, v7
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v24, v[18:21], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4446,8 +4326,7 @@ define void @v_shuffle_v2i64_v8i64__14_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v22, v6
-; GFX90A-NEXT: v_mov_b32_e32 v23, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[22:23], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[20:23], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4463,8 +4342,7 @@ define void @v_shuffle_v2i64_v8i64__14_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v22, v6
-; GFX942-NEXT: v_mov_b32_e32 v23, v7
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v24, v[20:23], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4535,8 +4413,7 @@ define void @v_shuffle_v2i64_v8i64__0_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4548,8 +4425,7 @@ define void @v_shuffle_v2i64_v8i64__0_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4580,8 +4456,7 @@ define void @v_shuffle_v2i64_v8i64__1_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4593,8 +4468,7 @@ define void @v_shuffle_v2i64_v8i64__1_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4625,8 +4499,7 @@ define void @v_shuffle_v2i64_v8i64__2_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4638,8 +4511,7 @@ define void @v_shuffle_v2i64_v8i64__2_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4709,8 +4581,7 @@ define void @v_shuffle_v2i64_v8i64__4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4722,8 +4593,7 @@ define void @v_shuffle_v2i64_v8i64__4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4754,8 +4624,7 @@ define void @v_shuffle_v2i64_v8i64__5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v8
-; GFX90A-NEXT: v_mov_b32_e32 v13, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4767,8 +4636,7 @@ define void @v_shuffle_v2i64_v8i64__5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v8
-; GFX942-NEXT: v_mov_b32_e32 v13, v9
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4799,8 +4667,7 @@ define void @v_shuffle_v2i64_v8i64__6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v8
-; GFX90A-NEXT: v_mov_b32_e32 v15, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4812,8 +4679,7 @@ define void @v_shuffle_v2i64_v8i64__6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v8
-; GFX942-NEXT: v_mov_b32_e32 v15, v9
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4844,8 +4710,7 @@ define void @v_shuffle_v2i64_v8i64__7_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v8
-; GFX90A-NEXT: v_mov_b32_e32 v17, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4858,8 +4723,7 @@ define void @v_shuffle_v2i64_v8i64__7_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v8
-; GFX942-NEXT: v_mov_b32_e32 v17, v9
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4935,8 +4799,7 @@ define void @v_shuffle_v2i64_v8i64__9_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v8
-; GFX90A-NEXT: v_mov_b32_e32 v15, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4952,8 +4815,7 @@ define void @v_shuffle_v2i64_v8i64__9_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v8
-; GFX942-NEXT: v_mov_b32_e32 v15, v9
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v26, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4991,8 +4853,7 @@ define void @v_shuffle_v2i64_v8i64__10_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v8
-; GFX90A-NEXT: v_mov_b32_e32 v17, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5008,8 +4869,7 @@ define void @v_shuffle_v2i64_v8i64__10_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v8
-; GFX942-NEXT: v_mov_b32_e32 v17, v9
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v26, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5047,8 +4907,7 @@ define void @v_shuffle_v2i64_v8i64__11_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v18, v8
-; GFX90A-NEXT: v_mov_b32_e32 v19, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[18:19], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[16:19], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5064,8 +4923,7 @@ define void @v_shuffle_v2i64_v8i64__11_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v18, v8
-; GFX942-NEXT: v_mov_b32_e32 v19, v9
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v26, v[16:19], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5103,8 +4961,7 @@ define void @v_shuffle_v2i64_v8i64__12_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v20, v8
-; GFX90A-NEXT: v_mov_b32_e32 v21, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[20:21], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[18:21], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5120,8 +4977,7 @@ define void @v_shuffle_v2i64_v8i64__12_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v20, v8
-; GFX942-NEXT: v_mov_b32_e32 v21, v9
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v26, v[18:21], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5159,8 +5015,7 @@ define void @v_shuffle_v2i64_v8i64__13_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v22, v8
-; GFX90A-NEXT: v_mov_b32_e32 v23, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[22:23], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[20:23], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5176,8 +5031,7 @@ define void @v_shuffle_v2i64_v8i64__13_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v22, v8
-; GFX942-NEXT: v_mov_b32_e32 v23, v9
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v26, v[20:23], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5215,8 +5069,7 @@ define void @v_shuffle_v2i64_v8i64__14_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v24, v8
-; GFX90A-NEXT: v_mov_b32_e32 v25, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[24:25], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[22:25], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5232,8 +5085,7 @@ define void @v_shuffle_v2i64_v8i64__14_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v24, v8
-; GFX942-NEXT: v_mov_b32_e32 v25, v9
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v26, v[22:25], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5304,8 +5156,7 @@ define void @v_shuffle_v2i64_v8i64__0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v10
-; GFX90A-NEXT: v_mov_b32_e32 v3, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5317,8 +5168,7 @@ define void @v_shuffle_v2i64_v8i64__0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v10
-; GFX942-NEXT: v_mov_b32_e32 v3, v11
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5349,8 +5199,7 @@ define void @v_shuffle_v2i64_v8i64__1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v10
-; GFX90A-NEXT: v_mov_b32_e32 v5, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5362,8 +5211,7 @@ define void @v_shuffle_v2i64_v8i64__1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v10
-; GFX942-NEXT: v_mov_b32_e32 v5, v11
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5394,8 +5242,7 @@ define void @v_shuffle_v2i64_v8i64__2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5407,8 +5254,7 @@ define void @v_shuffle_v2i64_v8i64__2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5439,8 +5285,7 @@ define void @v_shuffle_v2i64_v8i64__3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5452,8 +5297,7 @@ define void @v_shuffle_v2i64_v8i64__3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5523,8 +5367,7 @@ define void @v_shuffle_v2i64_v8i64__5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5536,8 +5379,7 @@ define void @v_shuffle_v2i64_v8i64__5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5568,8 +5410,7 @@ define void @v_shuffle_v2i64_v8i64__6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v10
-; GFX90A-NEXT: v_mov_b32_e32 v15, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5581,8 +5422,7 @@ define void @v_shuffle_v2i64_v8i64__6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v10
-; GFX942-NEXT: v_mov_b32_e32 v15, v11
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5613,8 +5453,7 @@ define void @v_shuffle_v2i64_v8i64__7_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v10
-; GFX90A-NEXT: v_mov_b32_e32 v17, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5627,8 +5466,7 @@ define void @v_shuffle_v2i64_v8i64__7_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v10
-; GFX942-NEXT: v_mov_b32_e32 v17, v11
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5704,8 +5542,7 @@ define void @v_shuffle_v2i64_v8i64__9_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v10
-; GFX90A-NEXT: v_mov_b32_e32 v17, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5721,8 +5558,7 @@ define void @v_shuffle_v2i64_v8i64__9_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v10
-; GFX942-NEXT: v_mov_b32_e32 v17, v11
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v28, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5760,8 +5596,7 @@ define void @v_shuffle_v2i64_v8i64__10_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v18, v10
-; GFX90A-NEXT: v_mov_b32_e32 v19, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[18:19], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[16:19], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5777,8 +5612,7 @@ define void @v_shuffle_v2i64_v8i64__10_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v18, v10
-; GFX942-NEXT: v_mov_b32_e32 v19, v11
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v28, v[16:19], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5816,8 +5650,7 @@ define void @v_shuffle_v2i64_v8i64__11_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v20, v10
-; GFX90A-NEXT: v_mov_b32_e32 v21, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[20:21], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[18:21], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5833,8 +5666,7 @@ define void @v_shuffle_v2i64_v8i64__11_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v20, v10
-; GFX942-NEXT: v_mov_b32_e32 v21, v11
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v28, v[18:21], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5872,8 +5704,7 @@ define void @v_shuffle_v2i64_v8i64__12_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v22, v10
-; GFX90A-NEXT: v_mov_b32_e32 v23, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[22:23], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[20:23], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5889,8 +5720,7 @@ define void @v_shuffle_v2i64_v8i64__12_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v22, v10
-; GFX942-NEXT: v_mov_b32_e32 v23, v11
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v28, v[20:23], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5928,8 +5758,7 @@ define void @v_shuffle_v2i64_v8i64__13_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v24, v10
-; GFX90A-NEXT: v_mov_b32_e32 v25, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[24:25], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[22:25], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5945,8 +5774,7 @@ define void @v_shuffle_v2i64_v8i64__13_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v24, v10
-; GFX942-NEXT: v_mov_b32_e32 v25, v11
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v28, v[22:25], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5984,8 +5812,7 @@ define void @v_shuffle_v2i64_v8i64__14_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v26, v10
-; GFX90A-NEXT: v_mov_b32_e32 v27, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[26:27], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[24:27], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6001,8 +5828,7 @@ define void @v_shuffle_v2i64_v8i64__14_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v26, v10
-; GFX942-NEXT: v_mov_b32_e32 v27, v11
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v28, v[24:27], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6073,8 +5899,7 @@ define void @v_shuffle_v2i64_v8i64__0_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v12
-; GFX90A-NEXT: v_mov_b32_e32 v3, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6086,8 +5911,7 @@ define void @v_shuffle_v2i64_v8i64__0_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v12
-; GFX942-NEXT: v_mov_b32_e32 v3, v13
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6118,8 +5942,7 @@ define void @v_shuffle_v2i64_v8i64__1_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v12
-; GFX90A-NEXT: v_mov_b32_e32 v5, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6131,8 +5954,7 @@ define void @v_shuffle_v2i64_v8i64__1_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v12
-; GFX942-NEXT: v_mov_b32_e32 v5, v13
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6163,8 +5985,7 @@ define void @v_shuffle_v2i64_v8i64__2_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v12
-; GFX90A-NEXT: v_mov_b32_e32 v7, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6176,8 +5997,7 @@ define void @v_shuffle_v2i64_v8i64__2_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v12
-; GFX942-NEXT: v_mov_b32_e32 v7, v13
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6208,8 +6028,7 @@ define void @v_shuffle_v2i64_v8i64__3_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6221,8 +6040,7 @@ define void @v_shuffle_v2i64_v8i64__3_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6253,8 +6071,7 @@ define void @v_shuffle_v2i64_v8i64__4_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v12
-; GFX90A-NEXT: v_mov_b32_e32 v11, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6266,8 +6083,7 @@ define void @v_shuffle_v2i64_v8i64__4_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v12
-; GFX942-NEXT: v_mov_b32_e32 v11, v13
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6337,8 +6153,7 @@ define void @v_shuffle_v2i64_v8i64__6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6350,8 +6165,7 @@ define void @v_shuffle_v2i64_v8i64__6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6382,8 +6196,7 @@ define void @v_shuffle_v2i64_v8i64__7_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v12
-; GFX90A-NEXT: v_mov_b32_e32 v17, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6396,8 +6209,7 @@ define void @v_shuffle_v2i64_v8i64__7_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v12
-; GFX942-NEXT: v_mov_b32_e32 v17, v13
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6473,8 +6285,7 @@ define void @v_shuffle_v2i64_v8i64__9_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v18, v12
-; GFX90A-NEXT: v_mov_b32_e32 v19, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[18:19], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[16:19], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6490,8 +6301,7 @@ define void @v_shuffle_v2i64_v8i64__9_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v18, v12
-; GFX942-NEXT: v_mov_b32_e32 v19, v13
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v30, v[16:19], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6529,8 +6339,7 @@ define void @v_shuffle_v2i64_v8i64__10_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v20, v12
-; GFX90A-NEXT: v_mov_b32_e32 v21, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[20:21], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[18:21], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6546,8 +6355,7 @@ define void @v_shuffle_v2i64_v8i64__10_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v20, v12
-; GFX942-NEXT: v_mov_b32_e32 v21, v13
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v30, v[18:21], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6585,8 +6393,7 @@ define void @v_shuffle_v2i64_v8i64__11_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v22, v12
-; GFX90A-NEXT: v_mov_b32_e32 v23, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[22:23], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[20:23], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6602,8 +6409,7 @@ define void @v_shuffle_v2i64_v8i64__11_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v22, v12
-; GFX942-NEXT: v_mov_b32_e32 v23, v13
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v30, v[20:23], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6641,8 +6447,7 @@ define void @v_shuffle_v2i64_v8i64__12_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v24, v12
-; GFX90A-NEXT: v_mov_b32_e32 v25, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[24:25], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[22:25], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6658,8 +6463,7 @@ define void @v_shuffle_v2i64_v8i64__12_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v24, v12
-; GFX942-NEXT: v_mov_b32_e32 v25, v13
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v30, v[22:25], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6697,8 +6501,7 @@ define void @v_shuffle_v2i64_v8i64__13_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v26, v12
-; GFX90A-NEXT: v_mov_b32_e32 v27, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[26:27], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[24:27], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6714,8 +6517,7 @@ define void @v_shuffle_v2i64_v8i64__13_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v26, v12
-; GFX942-NEXT: v_mov_b32_e32 v27, v13
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v30, v[24:27], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6753,8 +6555,7 @@ define void @v_shuffle_v2i64_v8i64__14_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v28, v12
-; GFX90A-NEXT: v_mov_b32_e32 v29, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[28:29], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[26:29], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6770,8 +6571,7 @@ define void @v_shuffle_v2i64_v8i64__14_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v28, v12
-; GFX942-NEXT: v_mov_b32_e32 v29, v13
+; GFX942-NEXT: v_mov_b64_e32 v[28:29], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v30, v[26:29], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6842,8 +6642,7 @@ define void @v_shuffle_v2i64_v8i64__0_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v14
-; GFX90A-NEXT: v_mov_b32_e32 v3, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6855,8 +6654,7 @@ define void @v_shuffle_v2i64_v8i64__0_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v14
-; GFX942-NEXT: v_mov_b32_e32 v3, v15
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6887,8 +6685,7 @@ define void @v_shuffle_v2i64_v8i64__1_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v14
-; GFX90A-NEXT: v_mov_b32_e32 v5, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6900,8 +6697,7 @@ define void @v_shuffle_v2i64_v8i64__1_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v14
-; GFX942-NEXT: v_mov_b32_e32 v5, v15
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6932,8 +6728,7 @@ define void @v_shuffle_v2i64_v8i64__2_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v14
-; GFX90A-NEXT: v_mov_b32_e32 v7, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6945,8 +6740,7 @@ define void @v_shuffle_v2i64_v8i64__2_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v14
-; GFX942-NEXT: v_mov_b32_e32 v7, v15
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6977,8 +6771,7 @@ define void @v_shuffle_v2i64_v8i64__3_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6990,8 +6783,7 @@ define void @v_shuffle_v2i64_v8i64__3_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7022,8 +6814,7 @@ define void @v_shuffle_v2i64_v8i64__4_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v14
-; GFX90A-NEXT: v_mov_b32_e32 v11, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7035,8 +6826,7 @@ define void @v_shuffle_v2i64_v8i64__4_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v14
-; GFX942-NEXT: v_mov_b32_e32 v11, v15
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7067,8 +6857,7 @@ define void @v_shuffle_v2i64_v8i64__5_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v14
-; GFX90A-NEXT: v_mov_b32_e32 v13, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7080,8 +6869,7 @@ define void @v_shuffle_v2i64_v8i64__5_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v14
-; GFX942-NEXT: v_mov_b32_e32 v13, v15
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7151,8 +6939,7 @@ define void @v_shuffle_v2i64_v8i64__7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7165,8 +6952,7 @@ define void @v_shuffle_v2i64_v8i64__7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7242,8 +7028,7 @@ define void @v_shuffle_v2i64_v8i64__9_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v20, v14
-; GFX90A-NEXT: v_mov_b32_e32 v21, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[20:21], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v32, v[18:21], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7259,8 +7044,7 @@ define void @v_shuffle_v2i64_v8i64__9_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v20, v14
-; GFX942-NEXT: v_mov_b32_e32 v21, v15
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v32, v[18:21], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7298,8 +7082,7 @@ define void @v_shuffle_v2i64_v8i64__10_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v22, v14
-; GFX90A-NEXT: v_mov_b32_e32 v23, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[22:23], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v32, v[20:23], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7315,8 +7098,7 @@ define void @v_shuffle_v2i64_v8i64__10_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v22, v14
-; GFX942-NEXT: v_mov_b32_e32 v23, v15
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7354,8 +7136,7 @@ define void @v_shuffle_v2i64_v8i64__11_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v24, v14
-; GFX90A-NEXT: v_mov_b32_e32 v25, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[24:25], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v32, v[22:25], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7371,8 +7152,7 @@ define void @v_shuffle_v2i64_v8i64__11_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v24, v14
-; GFX942-NEXT: v_mov_b32_e32 v25, v15
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v32, v[22:25], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7410,8 +7190,7 @@ define void @v_shuffle_v2i64_v8i64__12_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v26, v14
-; GFX90A-NEXT: v_mov_b32_e32 v27, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[26:27], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v32, v[24:27], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7427,8 +7206,7 @@ define void @v_shuffle_v2i64_v8i64__12_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v26, v14
-; GFX942-NEXT: v_mov_b32_e32 v27, v15
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7466,8 +7244,7 @@ define void @v_shuffle_v2i64_v8i64__13_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v28, v14
-; GFX90A-NEXT: v_mov_b32_e32 v29, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[28:29], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v32, v[26:29], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7483,8 +7260,7 @@ define void @v_shuffle_v2i64_v8i64__13_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v28, v14
-; GFX942-NEXT: v_mov_b32_e32 v29, v15
+; GFX942-NEXT: v_mov_b64_e32 v[28:29], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v32, v[26:29], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7522,8 +7298,7 @@ define void @v_shuffle_v2i64_v8i64__14_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v30, v14
-; GFX90A-NEXT: v_mov_b32_e32 v31, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[30:31], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v32, v[28:31], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7539,8 +7314,7 @@ define void @v_shuffle_v2i64_v8i64__14_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v30, v14
-; GFX942-NEXT: v_mov_b32_e32 v31, v15
+; GFX942-NEXT: v_mov_b64_e32 v[30:31], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7906,8 +7680,7 @@ define void @v_shuffle_v2i64_v8i64__9_8(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7919,8 +7692,7 @@ define void @v_shuffle_v2i64_v8i64__9_8(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7952,8 +7724,7 @@ define void @v_shuffle_v2i64_v8i64__10_8(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7965,8 +7736,7 @@ define void @v_shuffle_v2i64_v8i64__10_8(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7998,8 +7768,7 @@ define void @v_shuffle_v2i64_v8i64__11_8(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8011,8 +7780,7 @@ define void @v_shuffle_v2i64_v8i64__11_8(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8044,8 +7812,7 @@ define void @v_shuffle_v2i64_v8i64__12_8(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v0
-; GFX90A-NEXT: v_mov_b32_e32 v11, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8057,8 +7824,7 @@ define void @v_shuffle_v2i64_v8i64__12_8(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v0
-; GFX942-NEXT: v_mov_b32_e32 v11, v1
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8090,8 +7856,7 @@ define void @v_shuffle_v2i64_v8i64__13_8(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v0
-; GFX90A-NEXT: v_mov_b32_e32 v13, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8103,8 +7868,7 @@ define void @v_shuffle_v2i64_v8i64__13_8(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v0
-; GFX942-NEXT: v_mov_b32_e32 v13, v1
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8136,8 +7900,7 @@ define void @v_shuffle_v2i64_v8i64__14_8(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v0
-; GFX90A-NEXT: v_mov_b32_e32 v15, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8149,8 +7912,7 @@ define void @v_shuffle_v2i64_v8i64__14_8(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v0
-; GFX942-NEXT: v_mov_b32_e32 v15, v1
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8228,8 +7990,7 @@ define void @v_shuffle_v2i64_v8i64__0_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8245,8 +8006,7 @@ define void @v_shuffle_v2i64_v8i64__0_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v18, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8284,8 +8044,7 @@ define void @v_shuffle_v2i64_v8i64__1_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8301,8 +8060,7 @@ define void @v_shuffle_v2i64_v8i64__1_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v20, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8340,8 +8098,7 @@ define void @v_shuffle_v2i64_v8i64__2_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8357,8 +8114,7 @@ define void @v_shuffle_v2i64_v8i64__2_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v22, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8396,8 +8152,7 @@ define void @v_shuffle_v2i64_v8i64__3_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8413,8 +8168,7 @@ define void @v_shuffle_v2i64_v8i64__3_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v24, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8452,8 +8206,7 @@ define void @v_shuffle_v2i64_v8i64__4_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v12
-; GFX90A-NEXT: v_mov_b32_e32 v11, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8469,8 +8222,7 @@ define void @v_shuffle_v2i64_v8i64__4_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v12
-; GFX942-NEXT: v_mov_b32_e32 v11, v13
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v26, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8508,8 +8260,7 @@ define void @v_shuffle_v2i64_v8i64__5_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v14
-; GFX90A-NEXT: v_mov_b32_e32 v13, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8525,8 +8276,7 @@ define void @v_shuffle_v2i64_v8i64__5_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v14
-; GFX942-NEXT: v_mov_b32_e32 v13, v15
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v28, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8564,8 +8314,7 @@ define void @v_shuffle_v2i64_v8i64__6_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v16
-; GFX90A-NEXT: v_mov_b32_e32 v15, v17
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[16:17], v[16:17] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8581,8 +8330,7 @@ define void @v_shuffle_v2i64_v8i64__6_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v16
-; GFX942-NEXT: v_mov_b32_e32 v15, v17
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[16:17]
; GFX942-NEXT: global_store_dwordx4 v30, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8617,8 +8365,7 @@ define void @v_shuffle_v2i64_v8i64__7_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[16:31]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v32, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v18
-; GFX90A-NEXT: v_mov_b32_e32 v17, v19
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[18:19], v[18:19] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -8633,8 +8380,7 @@ define void @v_shuffle_v2i64_v8i64__7_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[16:31]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v32, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v18
-; GFX942-NEXT: v_mov_b32_e32 v17, v19
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[18:19]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
@@ -8709,8 +8455,7 @@ define void @v_shuffle_v2i64_v8i64__9_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8722,8 +8467,7 @@ define void @v_shuffle_v2i64_v8i64__9_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8755,8 +8499,7 @@ define void @v_shuffle_v2i64_v8i64__10_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8768,8 +8511,7 @@ define void @v_shuffle_v2i64_v8i64__10_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8801,8 +8543,7 @@ define void @v_shuffle_v2i64_v8i64__11_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8814,8 +8555,7 @@ define void @v_shuffle_v2i64_v8i64__11_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8847,8 +8587,7 @@ define void @v_shuffle_v2i64_v8i64__12_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8860,8 +8599,7 @@ define void @v_shuffle_v2i64_v8i64__12_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8893,8 +8631,7 @@ define void @v_shuffle_v2i64_v8i64__13_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v2
-; GFX90A-NEXT: v_mov_b32_e32 v13, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8906,8 +8643,7 @@ define void @v_shuffle_v2i64_v8i64__13_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v2
-; GFX942-NEXT: v_mov_b32_e32 v13, v3
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8939,8 +8675,7 @@ define void @v_shuffle_v2i64_v8i64__14_9(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v2
-; GFX90A-NEXT: v_mov_b32_e32 v15, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8952,8 +8687,7 @@ define void @v_shuffle_v2i64_v8i64__14_9(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v2
-; GFX942-NEXT: v_mov_b32_e32 v15, v3
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9031,8 +8765,7 @@ define void @v_shuffle_v2i64_v8i64__0_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9048,8 +8781,7 @@ define void @v_shuffle_v2i64_v8i64__0_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9087,8 +8819,7 @@ define void @v_shuffle_v2i64_v8i64__1_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9104,8 +8835,7 @@ define void @v_shuffle_v2i64_v8i64__1_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v20, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9143,8 +8873,7 @@ define void @v_shuffle_v2i64_v8i64__2_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9160,8 +8889,7 @@ define void @v_shuffle_v2i64_v8i64__2_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v22, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9199,8 +8927,7 @@ define void @v_shuffle_v2i64_v8i64__3_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9216,8 +8943,7 @@ define void @v_shuffle_v2i64_v8i64__3_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v24, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9255,8 +8981,7 @@ define void @v_shuffle_v2i64_v8i64__4_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v14
-; GFX90A-NEXT: v_mov_b32_e32 v11, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9272,8 +8997,7 @@ define void @v_shuffle_v2i64_v8i64__4_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v14
-; GFX942-NEXT: v_mov_b32_e32 v11, v15
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v26, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9311,8 +9035,7 @@ define void @v_shuffle_v2i64_v8i64__5_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v16
-; GFX90A-NEXT: v_mov_b32_e32 v13, v17
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[16:17], v[16:17] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9328,8 +9051,7 @@ define void @v_shuffle_v2i64_v8i64__5_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v16
-; GFX942-NEXT: v_mov_b32_e32 v13, v17
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[16:17]
; GFX942-NEXT: global_store_dwordx4 v28, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9367,8 +9089,7 @@ define void @v_shuffle_v2i64_v8i64__6_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v18
-; GFX90A-NEXT: v_mov_b32_e32 v15, v19
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[18:19], v[18:19] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9384,8 +9105,7 @@ define void @v_shuffle_v2i64_v8i64__6_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v18
-; GFX942-NEXT: v_mov_b32_e32 v15, v19
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[18:19]
; GFX942-NEXT: global_store_dwordx4 v30, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9420,8 +9140,7 @@ define void @v_shuffle_v2i64_v8i64__7_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[16:31]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v32, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v20
-; GFX90A-NEXT: v_mov_b32_e32 v17, v21
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[20:21], v[20:21] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -9436,8 +9155,7 @@ define void @v_shuffle_v2i64_v8i64__7_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[16:31]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v32, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v20
-; GFX942-NEXT: v_mov_b32_e32 v17, v21
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[20:21]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
@@ -9472,8 +9190,7 @@ define void @v_shuffle_v2i64_v8i64__8_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9485,8 +9202,7 @@ define void @v_shuffle_v2i64_v8i64__8_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9558,8 +9274,7 @@ define void @v_shuffle_v2i64_v8i64__10_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9571,8 +9286,7 @@ define void @v_shuffle_v2i64_v8i64__10_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9604,8 +9318,7 @@ define void @v_shuffle_v2i64_v8i64__11_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9617,8 +9330,7 @@ define void @v_shuffle_v2i64_v8i64__11_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9650,8 +9362,7 @@ define void @v_shuffle_v2i64_v8i64__12_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9663,8 +9374,7 @@ define void @v_shuffle_v2i64_v8i64__12_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9696,8 +9406,7 @@ define void @v_shuffle_v2i64_v8i64__13_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9709,8 +9418,7 @@ define void @v_shuffle_v2i64_v8i64__13_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9742,8 +9450,7 @@ define void @v_shuffle_v2i64_v8i64__14_10(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v4
-; GFX90A-NEXT: v_mov_b32_e32 v15, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9755,8 +9462,7 @@ define void @v_shuffle_v2i64_v8i64__14_10(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v4
-; GFX942-NEXT: v_mov_b32_e32 v15, v5
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9834,8 +9540,7 @@ define void @v_shuffle_v2i64_v8i64__0_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9851,8 +9556,7 @@ define void @v_shuffle_v2i64_v8i64__0_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v18, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9890,8 +9594,7 @@ define void @v_shuffle_v2i64_v8i64__1_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v10
-; GFX90A-NEXT: v_mov_b32_e32 v5, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9907,8 +9610,7 @@ define void @v_shuffle_v2i64_v8i64__1_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v10
-; GFX942-NEXT: v_mov_b32_e32 v5, v11
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v20, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9946,8 +9648,7 @@ define void @v_shuffle_v2i64_v8i64__2_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v12
-; GFX90A-NEXT: v_mov_b32_e32 v7, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9963,8 +9664,7 @@ define void @v_shuffle_v2i64_v8i64__2_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v12
-; GFX942-NEXT: v_mov_b32_e32 v7, v13
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v22, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10002,8 +9702,7 @@ define void @v_shuffle_v2i64_v8i64__3_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10019,8 +9718,7 @@ define void @v_shuffle_v2i64_v8i64__3_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v24, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10058,8 +9756,7 @@ define void @v_shuffle_v2i64_v8i64__4_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v16
-; GFX90A-NEXT: v_mov_b32_e32 v11, v17
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[16:17], v[16:17] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10075,8 +9772,7 @@ define void @v_shuffle_v2i64_v8i64__4_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v16
-; GFX942-NEXT: v_mov_b32_e32 v11, v17
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[16:17]
; GFX942-NEXT: global_store_dwordx4 v26, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10114,8 +9810,7 @@ define void @v_shuffle_v2i64_v8i64__5_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v18
-; GFX90A-NEXT: v_mov_b32_e32 v13, v19
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[18:19], v[18:19] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10131,8 +9826,7 @@ define void @v_shuffle_v2i64_v8i64__5_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v18
-; GFX942-NEXT: v_mov_b32_e32 v13, v19
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[18:19]
; GFX942-NEXT: global_store_dwordx4 v28, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10170,8 +9864,7 @@ define void @v_shuffle_v2i64_v8i64__6_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v20
-; GFX90A-NEXT: v_mov_b32_e32 v15, v21
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[20:21], v[20:21] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10187,8 +9880,7 @@ define void @v_shuffle_v2i64_v8i64__6_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v20
-; GFX942-NEXT: v_mov_b32_e32 v15, v21
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[20:21]
; GFX942-NEXT: global_store_dwordx4 v30, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10223,8 +9915,7 @@ define void @v_shuffle_v2i64_v8i64__7_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[16:31]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v32, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v22
-; GFX90A-NEXT: v_mov_b32_e32 v17, v23
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[22:23], v[22:23] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -10239,8 +9930,7 @@ define void @v_shuffle_v2i64_v8i64__7_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[16:31]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v32, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v22
-; GFX942-NEXT: v_mov_b32_e32 v17, v23
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[22:23]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
@@ -10275,8 +9965,7 @@ define void @v_shuffle_v2i64_v8i64__8_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10288,8 +9977,7 @@ define void @v_shuffle_v2i64_v8i64__8_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10321,8 +10009,7 @@ define void @v_shuffle_v2i64_v8i64__9_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10334,8 +10021,7 @@ define void @v_shuffle_v2i64_v8i64__9_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10407,8 +10093,7 @@ define void @v_shuffle_v2i64_v8i64__11_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10420,8 +10105,7 @@ define void @v_shuffle_v2i64_v8i64__11_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10453,8 +10137,7 @@ define void @v_shuffle_v2i64_v8i64__12_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10466,8 +10149,7 @@ define void @v_shuffle_v2i64_v8i64__12_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10499,8 +10181,7 @@ define void @v_shuffle_v2i64_v8i64__13_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10512,8 +10193,7 @@ define void @v_shuffle_v2i64_v8i64__13_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10545,8 +10225,7 @@ define void @v_shuffle_v2i64_v8i64__14_11(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10558,8 +10237,7 @@ define void @v_shuffle_v2i64_v8i64__14_11(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10637,8 +10315,7 @@ define void @v_shuffle_v2i64_v8i64__0_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v10
-; GFX90A-NEXT: v_mov_b32_e32 v3, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10654,8 +10331,7 @@ define void @v_shuffle_v2i64_v8i64__0_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v10
-; GFX942-NEXT: v_mov_b32_e32 v3, v11
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v18, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10693,8 +10369,7 @@ define void @v_shuffle_v2i64_v8i64__1_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v12
-; GFX90A-NEXT: v_mov_b32_e32 v5, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10710,8 +10385,7 @@ define void @v_shuffle_v2i64_v8i64__1_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v12
-; GFX942-NEXT: v_mov_b32_e32 v5, v13
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v20, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10749,8 +10423,7 @@ define void @v_shuffle_v2i64_v8i64__2_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v14
-; GFX90A-NEXT: v_mov_b32_e32 v7, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10766,8 +10439,7 @@ define void @v_shuffle_v2i64_v8i64__2_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v14
-; GFX942-NEXT: v_mov_b32_e32 v7, v15
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v22, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10805,8 +10477,7 @@ define void @v_shuffle_v2i64_v8i64__3_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v16
-; GFX90A-NEXT: v_mov_b32_e32 v9, v17
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[16:17], v[16:17] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10822,8 +10493,7 @@ define void @v_shuffle_v2i64_v8i64__3_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v16
-; GFX942-NEXT: v_mov_b32_e32 v9, v17
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[16:17]
; GFX942-NEXT: global_store_dwordx4 v24, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10861,8 +10531,7 @@ define void @v_shuffle_v2i64_v8i64__4_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v18
-; GFX90A-NEXT: v_mov_b32_e32 v11, v19
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[18:19], v[18:19] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10878,8 +10547,7 @@ define void @v_shuffle_v2i64_v8i64__4_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v18
-; GFX942-NEXT: v_mov_b32_e32 v11, v19
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[18:19]
; GFX942-NEXT: global_store_dwordx4 v26, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10917,8 +10585,7 @@ define void @v_shuffle_v2i64_v8i64__5_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v20
-; GFX90A-NEXT: v_mov_b32_e32 v13, v21
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[20:21], v[20:21] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10934,8 +10601,7 @@ define void @v_shuffle_v2i64_v8i64__5_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v20
-; GFX942-NEXT: v_mov_b32_e32 v13, v21
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[20:21]
; GFX942-NEXT: global_store_dwordx4 v28, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -10973,8 +10639,7 @@ define void @v_shuffle_v2i64_v8i64__6_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v22
-; GFX90A-NEXT: v_mov_b32_e32 v15, v23
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[22:23], v[22:23] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -10990,8 +10655,7 @@ define void @v_shuffle_v2i64_v8i64__6_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v22
-; GFX942-NEXT: v_mov_b32_e32 v15, v23
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[22:23]
; GFX942-NEXT: global_store_dwordx4 v30, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11026,8 +10690,7 @@ define void @v_shuffle_v2i64_v8i64__7_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[16:31]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v32, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v24
-; GFX90A-NEXT: v_mov_b32_e32 v17, v25
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[24:25], v[24:25] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -11042,8 +10705,7 @@ define void @v_shuffle_v2i64_v8i64__7_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[16:31]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v32, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v24
-; GFX942-NEXT: v_mov_b32_e32 v17, v25
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[24:25]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
@@ -11078,8 +10740,7 @@ define void @v_shuffle_v2i64_v8i64__8_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11091,8 +10752,7 @@ define void @v_shuffle_v2i64_v8i64__8_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11124,8 +10784,7 @@ define void @v_shuffle_v2i64_v8i64__9_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11137,8 +10796,7 @@ define void @v_shuffle_v2i64_v8i64__9_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11170,8 +10828,7 @@ define void @v_shuffle_v2i64_v8i64__10_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11183,8 +10840,7 @@ define void @v_shuffle_v2i64_v8i64__10_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11256,8 +10912,7 @@ define void @v_shuffle_v2i64_v8i64__12_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11269,8 +10924,7 @@ define void @v_shuffle_v2i64_v8i64__12_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11302,8 +10956,7 @@ define void @v_shuffle_v2i64_v8i64__13_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v8
-; GFX90A-NEXT: v_mov_b32_e32 v13, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11315,8 +10968,7 @@ define void @v_shuffle_v2i64_v8i64__13_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v8
-; GFX942-NEXT: v_mov_b32_e32 v13, v9
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11348,8 +11000,7 @@ define void @v_shuffle_v2i64_v8i64__14_12(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v8
-; GFX90A-NEXT: v_mov_b32_e32 v15, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11361,8 +11012,7 @@ define void @v_shuffle_v2i64_v8i64__14_12(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v8
-; GFX942-NEXT: v_mov_b32_e32 v15, v9
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11440,8 +11090,7 @@ define void @v_shuffle_v2i64_v8i64__0_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v12
-; GFX90A-NEXT: v_mov_b32_e32 v3, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11457,8 +11106,7 @@ define void @v_shuffle_v2i64_v8i64__0_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v12
-; GFX942-NEXT: v_mov_b32_e32 v3, v13
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v18, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11496,8 +11144,7 @@ define void @v_shuffle_v2i64_v8i64__1_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v14
-; GFX90A-NEXT: v_mov_b32_e32 v5, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11513,8 +11160,7 @@ define void @v_shuffle_v2i64_v8i64__1_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v14
-; GFX942-NEXT: v_mov_b32_e32 v5, v15
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v20, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11552,8 +11198,7 @@ define void @v_shuffle_v2i64_v8i64__2_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v16
-; GFX90A-NEXT: v_mov_b32_e32 v7, v17
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[16:17], v[16:17] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11569,8 +11214,7 @@ define void @v_shuffle_v2i64_v8i64__2_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v16
-; GFX942-NEXT: v_mov_b32_e32 v7, v17
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[16:17]
; GFX942-NEXT: global_store_dwordx4 v22, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11608,8 +11252,7 @@ define void @v_shuffle_v2i64_v8i64__3_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v18
-; GFX90A-NEXT: v_mov_b32_e32 v9, v19
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[18:19], v[18:19] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11625,8 +11268,7 @@ define void @v_shuffle_v2i64_v8i64__3_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v18
-; GFX942-NEXT: v_mov_b32_e32 v9, v19
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[18:19]
; GFX942-NEXT: global_store_dwordx4 v24, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11664,8 +11306,7 @@ define void @v_shuffle_v2i64_v8i64__4_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v20
-; GFX90A-NEXT: v_mov_b32_e32 v11, v21
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[20:21], v[20:21] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11681,8 +11322,7 @@ define void @v_shuffle_v2i64_v8i64__4_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v20
-; GFX942-NEXT: v_mov_b32_e32 v11, v21
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[20:21]
; GFX942-NEXT: global_store_dwordx4 v26, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11720,8 +11360,7 @@ define void @v_shuffle_v2i64_v8i64__5_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v22
-; GFX90A-NEXT: v_mov_b32_e32 v13, v23
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[22:23], v[22:23] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11737,8 +11376,7 @@ define void @v_shuffle_v2i64_v8i64__5_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v22
-; GFX942-NEXT: v_mov_b32_e32 v13, v23
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[22:23]
; GFX942-NEXT: global_store_dwordx4 v28, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11776,8 +11414,7 @@ define void @v_shuffle_v2i64_v8i64__6_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v24
-; GFX90A-NEXT: v_mov_b32_e32 v15, v25
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[24:25], v[24:25] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11793,8 +11430,7 @@ define void @v_shuffle_v2i64_v8i64__6_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v24
-; GFX942-NEXT: v_mov_b32_e32 v15, v25
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[24:25]
; GFX942-NEXT: global_store_dwordx4 v30, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11829,8 +11465,7 @@ define void @v_shuffle_v2i64_v8i64__7_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[16:31]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v32, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v26
-; GFX90A-NEXT: v_mov_b32_e32 v17, v27
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[26:27], v[26:27] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -11845,8 +11480,7 @@ define void @v_shuffle_v2i64_v8i64__7_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[16:31]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v32, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v26
-; GFX942-NEXT: v_mov_b32_e32 v17, v27
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[26:27]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
@@ -11881,8 +11515,7 @@ define void @v_shuffle_v2i64_v8i64__8_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v10
-; GFX90A-NEXT: v_mov_b32_e32 v3, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11894,8 +11527,7 @@ define void @v_shuffle_v2i64_v8i64__8_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v10
-; GFX942-NEXT: v_mov_b32_e32 v3, v11
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11927,8 +11559,7 @@ define void @v_shuffle_v2i64_v8i64__9_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v10
-; GFX90A-NEXT: v_mov_b32_e32 v5, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11940,8 +11571,7 @@ define void @v_shuffle_v2i64_v8i64__9_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v10
-; GFX942-NEXT: v_mov_b32_e32 v5, v11
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11973,8 +11603,7 @@ define void @v_shuffle_v2i64_v8i64__10_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11986,8 +11615,7 @@ define void @v_shuffle_v2i64_v8i64__10_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12019,8 +11647,7 @@ define void @v_shuffle_v2i64_v8i64__11_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12032,8 +11659,7 @@ define void @v_shuffle_v2i64_v8i64__11_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12105,8 +11731,7 @@ define void @v_shuffle_v2i64_v8i64__13_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12118,8 +11743,7 @@ define void @v_shuffle_v2i64_v8i64__13_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12151,8 +11775,7 @@ define void @v_shuffle_v2i64_v8i64__14_13(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v10
-; GFX90A-NEXT: v_mov_b32_e32 v15, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12164,8 +11787,7 @@ define void @v_shuffle_v2i64_v8i64__14_13(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v10
-; GFX942-NEXT: v_mov_b32_e32 v15, v11
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12243,8 +11865,7 @@ define void @v_shuffle_v2i64_v8i64__0_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v14
-; GFX90A-NEXT: v_mov_b32_e32 v3, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12260,8 +11881,7 @@ define void @v_shuffle_v2i64_v8i64__0_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v14
-; GFX942-NEXT: v_mov_b32_e32 v3, v15
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12299,8 +11919,7 @@ define void @v_shuffle_v2i64_v8i64__1_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v16
-; GFX90A-NEXT: v_mov_b32_e32 v5, v17
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[16:17], v[16:17] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12316,8 +11935,7 @@ define void @v_shuffle_v2i64_v8i64__1_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v16
-; GFX942-NEXT: v_mov_b32_e32 v5, v17
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[16:17]
; GFX942-NEXT: global_store_dwordx4 v20, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12355,8 +11973,7 @@ define void @v_shuffle_v2i64_v8i64__2_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v18
-; GFX90A-NEXT: v_mov_b32_e32 v7, v19
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[18:19], v[18:19] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12372,8 +11989,7 @@ define void @v_shuffle_v2i64_v8i64__2_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v18
-; GFX942-NEXT: v_mov_b32_e32 v7, v19
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[18:19]
; GFX942-NEXT: global_store_dwordx4 v22, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12411,8 +12027,7 @@ define void @v_shuffle_v2i64_v8i64__3_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v20
-; GFX90A-NEXT: v_mov_b32_e32 v9, v21
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[20:21], v[20:21] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12428,8 +12043,7 @@ define void @v_shuffle_v2i64_v8i64__3_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v20
-; GFX942-NEXT: v_mov_b32_e32 v9, v21
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[20:21]
; GFX942-NEXT: global_store_dwordx4 v24, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12467,8 +12081,7 @@ define void @v_shuffle_v2i64_v8i64__4_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v22
-; GFX90A-NEXT: v_mov_b32_e32 v11, v23
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[22:23], v[22:23] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12484,8 +12097,7 @@ define void @v_shuffle_v2i64_v8i64__4_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v22
-; GFX942-NEXT: v_mov_b32_e32 v11, v23
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[22:23]
; GFX942-NEXT: global_store_dwordx4 v26, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12523,8 +12135,7 @@ define void @v_shuffle_v2i64_v8i64__5_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v24
-; GFX90A-NEXT: v_mov_b32_e32 v13, v25
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[24:25], v[24:25] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12540,8 +12151,7 @@ define void @v_shuffle_v2i64_v8i64__5_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v24
-; GFX942-NEXT: v_mov_b32_e32 v13, v25
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[24:25]
; GFX942-NEXT: global_store_dwordx4 v28, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12579,8 +12189,7 @@ define void @v_shuffle_v2i64_v8i64__6_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v26
-; GFX90A-NEXT: v_mov_b32_e32 v15, v27
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[26:27], v[26:27] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12596,8 +12205,7 @@ define void @v_shuffle_v2i64_v8i64__6_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v26
-; GFX942-NEXT: v_mov_b32_e32 v15, v27
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[26:27]
; GFX942-NEXT: global_store_dwordx4 v30, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12632,8 +12240,7 @@ define void @v_shuffle_v2i64_v8i64__7_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[16:31]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v32, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v28
-; GFX90A-NEXT: v_mov_b32_e32 v17, v29
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[28:29], v[28:29] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -12648,8 +12255,7 @@ define void @v_shuffle_v2i64_v8i64__7_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[16:31]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v32, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v28
-; GFX942-NEXT: v_mov_b32_e32 v17, v29
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[28:29]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
@@ -12684,8 +12290,7 @@ define void @v_shuffle_v2i64_v8i64__8_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v12
-; GFX90A-NEXT: v_mov_b32_e32 v3, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12697,8 +12302,7 @@ define void @v_shuffle_v2i64_v8i64__8_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v12
-; GFX942-NEXT: v_mov_b32_e32 v3, v13
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12730,8 +12334,7 @@ define void @v_shuffle_v2i64_v8i64__9_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v12
-; GFX90A-NEXT: v_mov_b32_e32 v5, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12743,8 +12346,7 @@ define void @v_shuffle_v2i64_v8i64__9_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v12
-; GFX942-NEXT: v_mov_b32_e32 v5, v13
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12776,8 +12378,7 @@ define void @v_shuffle_v2i64_v8i64__10_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v12
-; GFX90A-NEXT: v_mov_b32_e32 v7, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12789,8 +12390,7 @@ define void @v_shuffle_v2i64_v8i64__10_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v12
-; GFX942-NEXT: v_mov_b32_e32 v7, v13
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12822,8 +12422,7 @@ define void @v_shuffle_v2i64_v8i64__11_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12835,8 +12434,7 @@ define void @v_shuffle_v2i64_v8i64__11_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12868,8 +12466,7 @@ define void @v_shuffle_v2i64_v8i64__12_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v12
-; GFX90A-NEXT: v_mov_b32_e32 v11, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12881,8 +12478,7 @@ define void @v_shuffle_v2i64_v8i64__12_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v12
-; GFX942-NEXT: v_mov_b32_e32 v11, v13
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12954,8 +12550,7 @@ define void @v_shuffle_v2i64_v8i64__14_14(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12967,8 +12562,7 @@ define void @v_shuffle_v2i64_v8i64__14_14(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13046,8 +12640,7 @@ define void @v_shuffle_v2i64_v8i64__0_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v16
-; GFX90A-NEXT: v_mov_b32_e32 v3, v17
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[16:17], v[16:17] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13063,8 +12656,7 @@ define void @v_shuffle_v2i64_v8i64__0_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v16
-; GFX942-NEXT: v_mov_b32_e32 v3, v17
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[16:17]
; GFX942-NEXT: global_store_dwordx4 v18, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13102,8 +12694,7 @@ define void @v_shuffle_v2i64_v8i64__1_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:19]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v20, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v18
-; GFX90A-NEXT: v_mov_b32_e32 v5, v19
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[18:19], v[18:19] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13119,8 +12710,7 @@ define void @v_shuffle_v2i64_v8i64__1_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:19]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v18
-; GFX942-NEXT: v_mov_b32_e32 v5, v19
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[18:19]
; GFX942-NEXT: global_store_dwordx4 v20, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13158,8 +12748,7 @@ define void @v_shuffle_v2i64_v8i64__2_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:21]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v22, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v20
-; GFX90A-NEXT: v_mov_b32_e32 v7, v21
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[20:21], v[20:21] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13175,8 +12764,7 @@ define void @v_shuffle_v2i64_v8i64__2_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:21]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v20
-; GFX942-NEXT: v_mov_b32_e32 v7, v21
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[20:21]
; GFX942-NEXT: global_store_dwordx4 v22, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13214,8 +12802,7 @@ define void @v_shuffle_v2i64_v8i64__3_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:23]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v24, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v22
-; GFX90A-NEXT: v_mov_b32_e32 v9, v23
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[22:23], v[22:23] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13231,8 +12818,7 @@ define void @v_shuffle_v2i64_v8i64__3_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:23]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v22
-; GFX942-NEXT: v_mov_b32_e32 v9, v23
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[22:23]
; GFX942-NEXT: global_store_dwordx4 v24, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13270,8 +12856,7 @@ define void @v_shuffle_v2i64_v8i64__4_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[10:25]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v26, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v24
-; GFX90A-NEXT: v_mov_b32_e32 v11, v25
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[24:25], v[24:25] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13287,8 +12872,7 @@ define void @v_shuffle_v2i64_v8i64__4_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:25]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v24
-; GFX942-NEXT: v_mov_b32_e32 v11, v25
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[24:25]
; GFX942-NEXT: global_store_dwordx4 v26, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13326,8 +12910,7 @@ define void @v_shuffle_v2i64_v8i64__5_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[12:27]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v28, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v26
-; GFX90A-NEXT: v_mov_b32_e32 v13, v27
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[26:27], v[26:27] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13343,8 +12926,7 @@ define void @v_shuffle_v2i64_v8i64__5_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[12:27]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v26
-; GFX942-NEXT: v_mov_b32_e32 v13, v27
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[26:27]
; GFX942-NEXT: global_store_dwordx4 v28, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13382,8 +12964,7 @@ define void @v_shuffle_v2i64_v8i64__6_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[14:29]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v30, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v28
-; GFX90A-NEXT: v_mov_b32_e32 v15, v29
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[28:29], v[28:29] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13399,8 +12980,7 @@ define void @v_shuffle_v2i64_v8i64__6_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[14:29]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v28
-; GFX942-NEXT: v_mov_b32_e32 v15, v29
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[28:29]
; GFX942-NEXT: global_store_dwordx4 v30, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13435,8 +13015,7 @@ define void @v_shuffle_v2i64_v8i64__7_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[16:31]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v32, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v30
-; GFX90A-NEXT: v_mov_b32_e32 v17, v31
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[30:31], v[30:31] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -13451,8 +13030,7 @@ define void @v_shuffle_v2i64_v8i64__7_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[16:31]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v32, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v30
-; GFX942-NEXT: v_mov_b32_e32 v17, v31
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[30:31]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
@@ -13487,8 +13065,7 @@ define void @v_shuffle_v2i64_v8i64__8_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v14
-; GFX90A-NEXT: v_mov_b32_e32 v3, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13500,8 +13077,7 @@ define void @v_shuffle_v2i64_v8i64__8_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v14
-; GFX942-NEXT: v_mov_b32_e32 v3, v15
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13533,8 +13109,7 @@ define void @v_shuffle_v2i64_v8i64__9_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v14
-; GFX90A-NEXT: v_mov_b32_e32 v5, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13546,8 +13121,7 @@ define void @v_shuffle_v2i64_v8i64__9_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v14
-; GFX942-NEXT: v_mov_b32_e32 v5, v15
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13579,8 +13153,7 @@ define void @v_shuffle_v2i64_v8i64__10_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v14
-; GFX90A-NEXT: v_mov_b32_e32 v7, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13592,8 +13165,7 @@ define void @v_shuffle_v2i64_v8i64__10_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v14
-; GFX942-NEXT: v_mov_b32_e32 v7, v15
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13625,8 +13197,7 @@ define void @v_shuffle_v2i64_v8i64__11_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13638,8 +13209,7 @@ define void @v_shuffle_v2i64_v8i64__11_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13671,8 +13241,7 @@ define void @v_shuffle_v2i64_v8i64__12_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v14
-; GFX90A-NEXT: v_mov_b32_e32 v11, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13684,8 +13253,7 @@ define void @v_shuffle_v2i64_v8i64__12_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v14
-; GFX942-NEXT: v_mov_b32_e32 v11, v15
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -13717,8 +13285,7 @@ define void @v_shuffle_v2i64_v8i64__13_15(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v14
-; GFX90A-NEXT: v_mov_b32_e32 v13, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -13730,8 +13297,7 @@ define void @v_shuffle_v2i64_v8i64__13_15(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v14
-; GFX942-NEXT: v_mov_b32_e32 v13, v15
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
index 411d8b735b9b6..730c6ea72cce5 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
@@ -264,8 +264,7 @@ define void @v_shuffle_v2p0_v2p0__3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -278,8 +277,7 @@ define void @v_shuffle_v2p0_v2p0__3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -311,8 +309,7 @@ define void @v_shuffle_v2p0_v2p0__3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -325,8 +322,7 @@ define void @v_shuffle_v2p0_v2p0__3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -397,8 +393,7 @@ define void @v_shuffle_v2p0_v2p0__0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -410,8 +405,7 @@ define void @v_shuffle_v2p0_v2p0__0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -442,8 +436,7 @@ define void @v_shuffle_v2p0_v2p0__1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -456,8 +449,7 @@ define void @v_shuffle_v2p0_v2p0__1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -605,8 +597,7 @@ define void @v_shuffle_v2p0_v2p0__1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -619,8 +610,7 @@ define void @v_shuffle_v2p0_v2p0__1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -836,8 +826,7 @@ define void @v_shuffle_v2p0_v2p0__0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -853,8 +842,7 @@ define void @v_shuffle_v2p0_v2p0__0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -889,8 +877,7 @@ define void @v_shuffle_v2p0_v2p0__1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -905,8 +892,7 @@ define void @v_shuffle_v2p0_v2p0__1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll
index 385dc73531d14..ed4f1864c0ab8 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll
@@ -393,8 +393,7 @@ define void @v_shuffle_v2p0_v3p0__5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -407,8 +406,7 @@ define void @v_shuffle_v2p0_v3p0__5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -440,8 +438,7 @@ define void @v_shuffle_v2p0_v3p0__5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -454,8 +451,7 @@ define void @v_shuffle_v2p0_v3p0__5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -487,8 +483,7 @@ define void @v_shuffle_v2p0_v3p0__5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -501,8 +496,7 @@ define void @v_shuffle_v2p0_v3p0__5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -573,8 +567,7 @@ define void @v_shuffle_v2p0_v3p0__0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -586,8 +579,7 @@ define void @v_shuffle_v2p0_v3p0__0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -618,8 +610,7 @@ define void @v_shuffle_v2p0_v3p0__1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -631,8 +622,7 @@ define void @v_shuffle_v2p0_v3p0__1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -663,8 +653,7 @@ define void @v_shuffle_v2p0_v3p0__2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -677,8 +666,7 @@ define void @v_shuffle_v2p0_v3p0__2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -754,8 +742,7 @@ define void @v_shuffle_v2p0_v3p0__4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -771,8 +758,7 @@ define void @v_shuffle_v2p0_v3p0__4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -882,8 +868,7 @@ define void @v_shuffle_v2p0_v3p0__1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -895,8 +880,7 @@ define void @v_shuffle_v2p0_v3p0__1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -927,8 +911,7 @@ define void @v_shuffle_v2p0_v3p0__2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -941,8 +924,7 @@ define void @v_shuffle_v2p0_v3p0__2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1018,8 +1000,7 @@ define void @v_shuffle_v2p0_v3p0__4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1035,8 +1016,7 @@ define void @v_shuffle_v2p0_v3p0__4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1107,8 +1087,7 @@ define void @v_shuffle_v2p0_v3p0__0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1120,8 +1099,7 @@ define void @v_shuffle_v2p0_v3p0__0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1191,8 +1169,7 @@ define void @v_shuffle_v2p0_v3p0__2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1205,8 +1182,7 @@ define void @v_shuffle_v2p0_v3p0__2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1282,8 +1258,7 @@ define void @v_shuffle_v2p0_v3p0__4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1299,8 +1274,7 @@ define void @v_shuffle_v2p0_v3p0__4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1471,8 +1445,7 @@ define void @v_shuffle_v2p0_v3p0__4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1484,8 +1457,7 @@ define void @v_shuffle_v2p0_v3p0__4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1563,8 +1535,7 @@ define void @v_shuffle_v2p0_v3p0__0_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1580,8 +1551,7 @@ define void @v_shuffle_v2p0_v3p0__0_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1619,8 +1589,7 @@ define void @v_shuffle_v2p0_v3p0__1_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1636,8 +1605,7 @@ define void @v_shuffle_v2p0_v3p0__1_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1672,8 +1640,7 @@ define void @v_shuffle_v2p0_v3p0__2_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1688,8 +1655,7 @@ define void @v_shuffle_v2p0_v3p0__2_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -1764,8 +1730,7 @@ define void @v_shuffle_v2p0_v3p0__4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1777,8 +1742,7 @@ define void @v_shuffle_v2p0_v3p0__4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1856,8 +1820,7 @@ define void @v_shuffle_v2p0_v3p0__0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1873,8 +1836,7 @@ define void @v_shuffle_v2p0_v3p0__0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1912,8 +1874,7 @@ define void @v_shuffle_v2p0_v3p0__1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1929,8 +1890,7 @@ define void @v_shuffle_v2p0_v3p0__1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1965,8 +1925,7 @@ define void @v_shuffle_v2p0_v3p0__2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1981,8 +1940,7 @@ define void @v_shuffle_v2p0_v3p0__2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -2017,8 +1975,7 @@ define void @v_shuffle_v2p0_v3p0__3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2030,8 +1987,7 @@ define void @v_shuffle_v2p0_v3p0__3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
index 70d72571b9897..2da6cf1ed8bcb 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
@@ -522,8 +522,7 @@ define void @v_shuffle_v2p0_v4p0__7_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -536,8 +535,7 @@ define void @v_shuffle_v2p0_v4p0__7_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -569,8 +567,7 @@ define void @v_shuffle_v2p0_v4p0__7_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -583,8 +580,7 @@ define void @v_shuffle_v2p0_v4p0__7_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -616,8 +612,7 @@ define void @v_shuffle_v2p0_v4p0__7_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -630,8 +625,7 @@ define void @v_shuffle_v2p0_v4p0__7_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -663,8 +657,7 @@ define void @v_shuffle_v2p0_v4p0__7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -677,8 +670,7 @@ define void @v_shuffle_v2p0_v4p0__7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -749,8 +741,7 @@ define void @v_shuffle_v2p0_v4p0__0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -762,8 +753,7 @@ define void @v_shuffle_v2p0_v4p0__0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -794,8 +784,7 @@ define void @v_shuffle_v2p0_v4p0__1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -807,8 +796,7 @@ define void @v_shuffle_v2p0_v4p0__1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -839,8 +827,7 @@ define void @v_shuffle_v2p0_v4p0__2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -852,8 +839,7 @@ define void @v_shuffle_v2p0_v4p0__2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -884,8 +870,7 @@ define void @v_shuffle_v2p0_v4p0__3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -898,8 +883,7 @@ define void @v_shuffle_v2p0_v4p0__3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -975,8 +959,7 @@ define void @v_shuffle_v2p0_v4p0__5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -992,8 +975,7 @@ define void @v_shuffle_v2p0_v4p0__5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1031,8 +1013,7 @@ define void @v_shuffle_v2p0_v4p0__6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1048,8 +1029,7 @@ define void @v_shuffle_v2p0_v4p0__6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1159,8 +1139,7 @@ define void @v_shuffle_v2p0_v4p0__1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1172,8 +1151,7 @@ define void @v_shuffle_v2p0_v4p0__1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1204,8 +1182,7 @@ define void @v_shuffle_v2p0_v4p0__2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1217,8 +1194,7 @@ define void @v_shuffle_v2p0_v4p0__2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1249,8 +1225,7 @@ define void @v_shuffle_v2p0_v4p0__3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1263,8 +1238,7 @@ define void @v_shuffle_v2p0_v4p0__3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1340,8 +1314,7 @@ define void @v_shuffle_v2p0_v4p0__5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1357,8 +1330,7 @@ define void @v_shuffle_v2p0_v4p0__5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1396,8 +1368,7 @@ define void @v_shuffle_v2p0_v4p0__6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1413,8 +1384,7 @@ define void @v_shuffle_v2p0_v4p0__6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1485,8 +1455,7 @@ define void @v_shuffle_v2p0_v4p0__0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1498,8 +1467,7 @@ define void @v_shuffle_v2p0_v4p0__0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1569,8 +1537,7 @@ define void @v_shuffle_v2p0_v4p0__2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1582,8 +1549,7 @@ define void @v_shuffle_v2p0_v4p0__2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1614,8 +1580,7 @@ define void @v_shuffle_v2p0_v4p0__3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1628,8 +1593,7 @@ define void @v_shuffle_v2p0_v4p0__3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1705,8 +1669,7 @@ define void @v_shuffle_v2p0_v4p0__5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1722,8 +1685,7 @@ define void @v_shuffle_v2p0_v4p0__5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1761,8 +1723,7 @@ define void @v_shuffle_v2p0_v4p0__6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1778,8 +1739,7 @@ define void @v_shuffle_v2p0_v4p0__6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1850,8 +1810,7 @@ define void @v_shuffle_v2p0_v4p0__0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1863,8 +1822,7 @@ define void @v_shuffle_v2p0_v4p0__0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1895,8 +1853,7 @@ define void @v_shuffle_v2p0_v4p0__1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1908,8 +1865,7 @@ define void @v_shuffle_v2p0_v4p0__1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1979,8 +1935,7 @@ define void @v_shuffle_v2p0_v4p0__3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1993,8 +1948,7 @@ define void @v_shuffle_v2p0_v4p0__3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2070,8 +2024,7 @@ define void @v_shuffle_v2p0_v4p0__5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2087,8 +2040,7 @@ define void @v_shuffle_v2p0_v4p0__5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2126,8 +2078,7 @@ define void @v_shuffle_v2p0_v4p0__6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2143,8 +2094,7 @@ define void @v_shuffle_v2p0_v4p0__6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2354,8 +2304,7 @@ define void @v_shuffle_v2p0_v4p0__5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2367,8 +2316,7 @@ define void @v_shuffle_v2p0_v4p0__5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2400,8 +2348,7 @@ define void @v_shuffle_v2p0_v4p0__6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2413,8 +2360,7 @@ define void @v_shuffle_v2p0_v4p0__6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2492,8 +2438,7 @@ define void @v_shuffle_v2p0_v4p0__0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2509,8 +2454,7 @@ define void @v_shuffle_v2p0_v4p0__0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2548,8 +2492,7 @@ define void @v_shuffle_v2p0_v4p0__1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2565,8 +2508,7 @@ define void @v_shuffle_v2p0_v4p0__1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2604,8 +2546,7 @@ define void @v_shuffle_v2p0_v4p0__2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2621,8 +2562,7 @@ define void @v_shuffle_v2p0_v4p0__2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2657,8 +2597,7 @@ define void @v_shuffle_v2p0_v4p0__3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -2673,8 +2612,7 @@ define void @v_shuffle_v2p0_v4p0__3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -2749,8 +2687,7 @@ define void @v_shuffle_v2p0_v4p0__5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2762,8 +2699,7 @@ define void @v_shuffle_v2p0_v4p0__5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2795,8 +2731,7 @@ define void @v_shuffle_v2p0_v4p0__6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2808,8 +2743,7 @@ define void @v_shuffle_v2p0_v4p0__6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2887,8 +2821,7 @@ define void @v_shuffle_v2p0_v4p0__0_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2904,8 +2837,7 @@ define void @v_shuffle_v2p0_v4p0__0_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2943,8 +2875,7 @@ define void @v_shuffle_v2p0_v4p0__1_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2960,8 +2891,7 @@ define void @v_shuffle_v2p0_v4p0__1_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2999,8 +2929,7 @@ define void @v_shuffle_v2p0_v4p0__2_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3016,8 +2945,7 @@ define void @v_shuffle_v2p0_v4p0__2_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3052,8 +2980,7 @@ define void @v_shuffle_v2p0_v4p0__3_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -3068,8 +2995,7 @@ define void @v_shuffle_v2p0_v4p0__3_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -3104,8 +3030,7 @@ define void @v_shuffle_v2p0_v4p0__4_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3117,8 +3042,7 @@ define void @v_shuffle_v2p0_v4p0__4_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3190,8 +3114,7 @@ define void @v_shuffle_v2p0_v4p0__6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3203,8 +3126,7 @@ define void @v_shuffle_v2p0_v4p0__6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3282,8 +3204,7 @@ define void @v_shuffle_v2p0_v4p0__0_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3299,8 +3220,7 @@ define void @v_shuffle_v2p0_v4p0__0_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3338,8 +3258,7 @@ define void @v_shuffle_v2p0_v4p0__1_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v10
-; GFX90A-NEXT: v_mov_b32_e32 v5, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3355,8 +3274,7 @@ define void @v_shuffle_v2p0_v4p0__1_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v10
-; GFX942-NEXT: v_mov_b32_e32 v5, v11
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3394,8 +3312,7 @@ define void @v_shuffle_v2p0_v4p0__2_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v12
-; GFX90A-NEXT: v_mov_b32_e32 v7, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3411,8 +3328,7 @@ define void @v_shuffle_v2p0_v4p0__2_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v12
-; GFX942-NEXT: v_mov_b32_e32 v7, v13
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3447,8 +3363,7 @@ define void @v_shuffle_v2p0_v4p0__3_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -3463,8 +3378,7 @@ define void @v_shuffle_v2p0_v4p0__3_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -3499,8 +3413,7 @@ define void @v_shuffle_v2p0_v4p0__4_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3512,8 +3425,7 @@ define void @v_shuffle_v2p0_v4p0__4_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3545,8 +3457,7 @@ define void @v_shuffle_v2p0_v4p0__5_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3558,8 +3469,7 @@ define void @v_shuffle_v2p0_v4p0__5_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
index d38b17c04947b..94aee02ad4539 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
@@ -273,8 +273,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v2, v[4:6], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -287,8 +286,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v2, v[4:6], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -650,8 +648,7 @@ define void @v_shuffle_v3f32_v2f32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -664,8 +661,7 @@ define void @v_shuffle_v3f32_v2f32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -900,8 +896,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v5
-; GFX90A-NEXT: v_mov_b32_e32 v1, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -920,8 +915,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v5
-; GFX942-NEXT: v_mov_b32_e32 v1, v4
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1295,8 +1289,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v3
-; GFX90A-NEXT: v_mov_b32_e32 v7, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v8, v1
; GFX90A-NEXT: global_store_dwordx3 v4, v[6:8], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1313,8 +1306,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v3
-; GFX942-NEXT: v_mov_b32_e32 v7, v2
+; GFX942-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v8, v1
; GFX942-NEXT: global_store_dwordx3 v4, v[6:8], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1449,8 +1441,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1463,8 +1454,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2001,8 +1991,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v6, v1
; GFX90A-NEXT: global_store_dwordx3 v2, v[4:6], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2016,8 +2005,7 @@ define void @v_shuffle_v3f32_v2f32__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v6, v1
; GFX942-NEXT: global_store_dwordx3 v2, v[4:6], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
index 4032d31cbb041..f30e46cbf875a 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
@@ -922,8 +922,7 @@ define void @v_shuffle_v3f32_v3f32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:4]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v5, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -936,8 +935,7 @@ define void @v_shuffle_v3f32_v3f32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:4]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v5, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2738,8 +2736,7 @@ define void @v_shuffle_v3f32_v3f32__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:4]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v5, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2752,8 +2749,7 @@ define void @v_shuffle_v3f32_v3f32__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:4]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v5, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
index 2e4131d378906..6819bb4780133 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
@@ -629,8 +629,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -642,8 +641,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1203,8 +1201,7 @@ define void @v_shuffle_v3f32_v4f32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1217,8 +1214,7 @@ define void @v_shuffle_v3f32_v4f32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1875,8 +1871,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1892,8 +1887,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2687,8 +2681,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v5
-; GFX90A-NEXT: v_mov_b32_e32 v3, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v4, v1
; GFX90A-NEXT: global_store_dwordx3 v6, v[2:4], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2705,8 +2698,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v5
-; GFX942-NEXT: v_mov_b32_e32 v3, v4
+; GFX942-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v4, v1
; GFX942-NEXT: global_store_dwordx3 v6, v[2:4], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2912,8 +2904,7 @@ define void @v_shuffle_v3f32_v4f32__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2925,8 +2916,7 @@ define void @v_shuffle_v3f32_v4f32__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3489,8 +3479,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3506,8 +3495,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4298,8 +4286,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4316,8 +4303,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v2, v3
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4531,8 +4517,7 @@ define void @v_shuffle_v3f32_v4f32__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4545,8 +4530,7 @@ define void @v_shuffle_v3f32_v4f32__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4977,8 +4961,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v5
-; GFX90A-NEXT: v_mov_b32_e32 v1, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4991,8 +4974,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v5
-; GFX942-NEXT: v_mov_b32_e32 v1, v4
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5781,8 +5763,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v3
-; GFX90A-NEXT: v_mov_b32_e32 v7, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v8, v1
; GFX90A-NEXT: global_store_dwordx3 v4, v[6:8], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5796,8 +5777,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v3
-; GFX942-NEXT: v_mov_b32_e32 v7, v2
+; GFX942-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v8, v1
; GFX942-NEXT: global_store_dwordx3 v4, v[6:8], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6229,8 +6209,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6242,8 +6221,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7392,8 +7370,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7406,8 +7383,7 @@ define void @v_shuffle_v3f32_v4f32__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v2, v3
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
index 6a0527f7cca24..1a9c0456129ed 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
@@ -273,8 +273,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v2, v[4:6], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -287,8 +286,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v2, v[4:6], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -650,8 +648,7 @@ define void @v_shuffle_v3i32_v2i32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -664,8 +661,7 @@ define void @v_shuffle_v3i32_v2i32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -900,8 +896,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v5
-; GFX90A-NEXT: v_mov_b32_e32 v1, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -920,8 +915,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v5
-; GFX942-NEXT: v_mov_b32_e32 v1, v4
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1295,8 +1289,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v3
-; GFX90A-NEXT: v_mov_b32_e32 v7, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v8, v1
; GFX90A-NEXT: global_store_dwordx3 v4, v[6:8], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1313,8 +1306,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v3
-; GFX942-NEXT: v_mov_b32_e32 v7, v2
+; GFX942-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v8, v1
; GFX942-NEXT: global_store_dwordx3 v4, v[6:8], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1449,8 +1441,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1463,8 +1454,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2001,8 +1991,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v6, v1
; GFX90A-NEXT: global_store_dwordx3 v2, v[4:6], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2016,8 +2005,7 @@ define void @v_shuffle_v3i32_v2i32__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v6, v1
; GFX942-NEXT: global_store_dwordx3 v2, v[4:6], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
index 65ceea2299e10..77e8169342c97 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
@@ -922,8 +922,7 @@ define void @v_shuffle_v3i32_v3i32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:4]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v5, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -936,8 +935,7 @@ define void @v_shuffle_v3i32_v3i32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:4]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v5, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2738,8 +2736,7 @@ define void @v_shuffle_v3i32_v3i32__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:4]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v5, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2752,8 +2749,7 @@ define void @v_shuffle_v3i32_v3i32__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:4]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v5, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
index 3d838b9952147..15e7c5247720e 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
@@ -629,8 +629,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -642,8 +641,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1203,8 +1201,7 @@ define void @v_shuffle_v3i32_v4i32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1217,8 +1214,7 @@ define void @v_shuffle_v3i32_v4i32__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1875,8 +1871,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1892,8 +1887,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2687,8 +2681,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v5
-; GFX90A-NEXT: v_mov_b32_e32 v3, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v4, v1
; GFX90A-NEXT: global_store_dwordx3 v6, v[2:4], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2705,8 +2698,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v5
-; GFX942-NEXT: v_mov_b32_e32 v3, v4
+; GFX942-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v4, v1
; GFX942-NEXT: global_store_dwordx3 v6, v[2:4], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2912,8 +2904,7 @@ define void @v_shuffle_v3i32_v4i32__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2925,8 +2916,7 @@ define void @v_shuffle_v3i32_v4i32__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3489,8 +3479,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3506,8 +3495,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4298,8 +4286,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4316,8 +4303,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v2, v3
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4531,8 +4517,7 @@ define void @v_shuffle_v3i32_v4i32__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4545,8 +4530,7 @@ define void @v_shuffle_v3i32_v4i32__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4977,8 +4961,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v5
-; GFX90A-NEXT: v_mov_b32_e32 v1, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4991,8 +4974,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v5
-; GFX942-NEXT: v_mov_b32_e32 v1, v4
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5781,8 +5763,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v3
-; GFX90A-NEXT: v_mov_b32_e32 v7, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v8, v1
; GFX90A-NEXT: global_store_dwordx3 v4, v[6:8], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5796,8 +5777,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v3
-; GFX942-NEXT: v_mov_b32_e32 v7, v2
+; GFX942-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v8, v1
; GFX942-NEXT: global_store_dwordx3 v4, v[6:8], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6229,8 +6209,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6242,8 +6221,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7392,8 +7370,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7406,8 +7383,7 @@ define void @v_shuffle_v3i32_v4i32__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v2, v3
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
index 82ec200dae107..0e65abfc0cd59 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
@@ -264,8 +264,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -278,8 +277,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -311,8 +309,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -325,8 +322,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -366,8 +362,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -383,8 +378,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -424,8 +418,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -442,8 +435,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -476,8 +468,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -491,8 +482,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -525,8 +515,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -540,8 +529,7 @@ define void @v_shuffle_v3i64_v2i64__3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -616,8 +604,7 @@ define void @v_shuffle_v3i64_v2i64__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v4, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -630,8 +617,7 @@ define void @v_shuffle_v3i64_v2i64__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -664,8 +650,7 @@ define void @v_shuffle_v3i64_v2i64__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -679,8 +664,7 @@ define void @v_shuffle_v3i64_v2i64__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -862,8 +846,7 @@ define void @v_shuffle_v3i64_v2i64__3_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -879,8 +862,7 @@ define void @v_shuffle_v3i64_v2i64__3_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
@@ -923,8 +905,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -940,8 +921,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1058,8 +1038,7 @@ define void @v_shuffle_v3i64_v2i64__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1073,8 +1052,7 @@ define void @v_shuffle_v3i64_v2i64__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1311,8 +1289,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1329,8 +1306,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1463,8 +1439,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1478,8 +1453,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1708,8 +1682,7 @@ define void @v_shuffle_v3i64_v2i64__0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1726,8 +1699,7 @@ define void @v_shuffle_v3i64_v2i64__0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1763,8 +1735,7 @@ define void @v_shuffle_v3i64_v2i64__1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -1780,8 +1751,7 @@ define void @v_shuffle_v3i64_v2i64__1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
@@ -2008,8 +1978,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2023,8 +1992,7 @@ define void @v_shuffle_v3i64_v2i64__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v3i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v3i64.ll
index 2fca4c2f1ff3a..d8800db481740 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v3i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v3i64.ll
@@ -396,8 +396,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -410,8 +409,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -443,8 +441,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -457,8 +454,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -490,8 +486,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -504,8 +499,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -545,8 +539,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -562,8 +555,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -603,8 +595,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -621,8 +612,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -662,8 +652,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -680,8 +669,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -714,8 +702,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -729,8 +716,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -763,8 +749,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -778,8 +763,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -812,8 +796,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -827,8 +810,7 @@ define void @v_shuffle_v3i64_v3i64__5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -903,8 +885,7 @@ define void @v_shuffle_v3i64_v3i64__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -917,8 +898,7 @@ define void @v_shuffle_v3i64_v3i64__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -951,8 +931,7 @@ define void @v_shuffle_v3i64_v3i64__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -965,8 +944,7 @@ define void @v_shuffle_v3i64_v3i64__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -999,8 +977,7 @@ define void @v_shuffle_v3i64_v3i64__2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1014,8 +991,7 @@ define void @v_shuffle_v3i64_v3i64__2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1095,8 +1071,7 @@ define void @v_shuffle_v3i64_v3i64__4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1113,8 +1088,7 @@ define void @v_shuffle_v3i64_v3i64__4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1255,8 +1229,7 @@ define void @v_shuffle_v3i64_v3i64__5_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1272,8 +1245,7 @@ define void @v_shuffle_v3i64_v3i64__5_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -1313,8 +1285,7 @@ define void @v_shuffle_v3i64_v3i64__5_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1330,8 +1301,7 @@ define void @v_shuffle_v3i64_v3i64__5_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -1374,8 +1344,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1391,8 +1360,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1432,8 +1400,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1449,8 +1416,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1567,8 +1533,7 @@ define void @v_shuffle_v3i64_v3i64__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1581,8 +1546,7 @@ define void @v_shuffle_v3i64_v3i64__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1615,8 +1579,7 @@ define void @v_shuffle_v3i64_v3i64__2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1630,8 +1593,7 @@ define void @v_shuffle_v3i64_v3i64__2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1711,8 +1673,7 @@ define void @v_shuffle_v3i64_v3i64__4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1729,8 +1690,7 @@ define void @v_shuffle_v3i64_v3i64__4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1923,8 +1883,7 @@ define void @v_shuffle_v3i64_v3i64__5_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1940,8 +1899,7 @@ define void @v_shuffle_v3i64_v3i64__5_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -1984,8 +1942,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2002,8 +1959,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2043,8 +1999,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2061,8 +2016,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2137,8 +2091,7 @@ define void @v_shuffle_v3i64_v3i64__0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2151,8 +2104,7 @@ define void @v_shuffle_v3i64_v3i64__0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v6, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2227,8 +2179,7 @@ define void @v_shuffle_v3i64_v3i64__2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2242,8 +2193,7 @@ define void @v_shuffle_v3i64_v3i64__2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2323,8 +2273,7 @@ define void @v_shuffle_v3i64_v3i64__4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2341,8 +2290,7 @@ define void @v_shuffle_v3i64_v3i64__4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2591,8 +2539,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2609,8 +2556,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2650,8 +2596,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2668,8 +2613,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2844,8 +2788,7 @@ define void @v_shuffle_v3i64_v3i64__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2858,8 +2801,7 @@ define void @v_shuffle_v3i64_v3i64__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2893,8 +2835,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2908,8 +2849,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3141,8 +3081,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3156,8 +3095,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3239,8 +3177,7 @@ define void @v_shuffle_v3i64_v3i64__0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3257,8 +3194,7 @@ define void @v_shuffle_v3i64_v3i64__0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3297,8 +3233,7 @@ define void @v_shuffle_v3i64_v3i64__1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3315,8 +3250,7 @@ define void @v_shuffle_v3i64_v3i64__1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3352,8 +3286,7 @@ define void @v_shuffle_v3i64_v3i64__2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -3369,8 +3302,7 @@ define void @v_shuffle_v3i64_v3i64__2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -3450,8 +3382,7 @@ define void @v_shuffle_v3i64_v3i64__4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3464,8 +3395,7 @@ define void @v_shuffle_v3i64_v3i64__4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3499,8 +3429,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3514,8 +3443,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3747,8 +3675,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3762,8 +3689,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3845,8 +3771,7 @@ define void @v_shuffle_v3i64_v3i64__0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3863,8 +3788,7 @@ define void @v_shuffle_v3i64_v3i64__0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3903,8 +3827,7 @@ define void @v_shuffle_v3i64_v3i64__1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3921,8 +3844,7 @@ define void @v_shuffle_v3i64_v3i64__1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3958,8 +3880,7 @@ define void @v_shuffle_v3i64_v3i64__2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -3975,8 +3896,7 @@ define void @v_shuffle_v3i64_v3i64__2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -4013,8 +3933,7 @@ define void @v_shuffle_v3i64_v3i64__3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4027,8 +3946,7 @@ define void @v_shuffle_v3i64_v3i64__3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v6, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4304,8 +4222,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4319,8 +4236,7 @@ define void @v_shuffle_v3i64_v3i64__5_3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4353,8 +4269,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4368,8 +4283,7 @@ define void @v_shuffle_v3i64_v3i64__5_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
index 58a2146c00de9..1408ddeb1b4d5 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
@@ -525,8 +525,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -539,8 +538,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -572,8 +570,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -586,8 +583,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -619,8 +615,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -633,8 +628,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -666,8 +660,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -680,8 +673,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -721,8 +713,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -738,8 +729,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -779,8 +769,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -797,8 +786,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -838,8 +826,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -856,8 +843,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -897,8 +883,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -915,8 +900,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -949,8 +933,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -964,8 +947,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -998,8 +980,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1013,8 +994,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1047,8 +1027,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1062,8 +1041,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1096,8 +1074,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1111,8 +1088,7 @@ define void @v_shuffle_v3i64_v4i64__7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1187,8 +1163,7 @@ define void @v_shuffle_v3i64_v4i64__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1201,8 +1176,7 @@ define void @v_shuffle_v3i64_v4i64__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1235,8 +1209,7 @@ define void @v_shuffle_v3i64_v4i64__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1249,8 +1222,7 @@ define void @v_shuffle_v3i64_v4i64__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1283,8 +1255,7 @@ define void @v_shuffle_v3i64_v4i64__2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1297,8 +1268,7 @@ define void @v_shuffle_v3i64_v4i64__2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1331,8 +1301,7 @@ define void @v_shuffle_v3i64_v4i64__3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1346,8 +1315,7 @@ define void @v_shuffle_v3i64_v4i64__3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1427,8 +1395,7 @@ define void @v_shuffle_v3i64_v4i64__5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1445,8 +1412,7 @@ define void @v_shuffle_v3i64_v4i64__5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1485,8 +1451,7 @@ define void @v_shuffle_v3i64_v4i64__6_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1503,8 +1468,7 @@ define void @v_shuffle_v3i64_v4i64__6_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1645,8 +1609,7 @@ define void @v_shuffle_v3i64_v4i64__7_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -1662,8 +1625,7 @@ define void @v_shuffle_v3i64_v4i64__7_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -1703,8 +1665,7 @@ define void @v_shuffle_v3i64_v4i64__7_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -1720,8 +1681,7 @@ define void @v_shuffle_v3i64_v4i64__7_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -1761,8 +1721,7 @@ define void @v_shuffle_v3i64_v4i64__7_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -1778,8 +1737,7 @@ define void @v_shuffle_v3i64_v4i64__7_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -1822,8 +1780,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1839,8 +1796,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1880,8 +1836,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1897,8 +1852,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1938,8 +1892,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1955,8 +1908,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2073,8 +2025,7 @@ define void @v_shuffle_v3i64_v4i64__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2087,8 +2038,7 @@ define void @v_shuffle_v3i64_v4i64__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2121,8 +2071,7 @@ define void @v_shuffle_v3i64_v4i64__2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2135,8 +2084,7 @@ define void @v_shuffle_v3i64_v4i64__2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2169,8 +2117,7 @@ define void @v_shuffle_v3i64_v4i64__3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2184,8 +2131,7 @@ define void @v_shuffle_v3i64_v4i64__3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2265,8 +2211,7 @@ define void @v_shuffle_v3i64_v4i64__5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2283,8 +2228,7 @@ define void @v_shuffle_v3i64_v4i64__5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2323,8 +2267,7 @@ define void @v_shuffle_v3i64_v4i64__6_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2341,8 +2284,7 @@ define void @v_shuffle_v3i64_v4i64__6_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2535,8 +2477,7 @@ define void @v_shuffle_v3i64_v4i64__7_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -2552,8 +2493,7 @@ define void @v_shuffle_v3i64_v4i64__7_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -2593,8 +2533,7 @@ define void @v_shuffle_v3i64_v4i64__7_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -2610,8 +2549,7 @@ define void @v_shuffle_v3i64_v4i64__7_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -2654,8 +2592,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2672,8 +2609,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2713,8 +2649,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2731,8 +2666,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2772,8 +2706,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2790,8 +2723,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2866,8 +2798,7 @@ define void @v_shuffle_v3i64_v4i64__0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2880,8 +2811,7 @@ define void @v_shuffle_v3i64_v4i64__0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2956,8 +2886,7 @@ define void @v_shuffle_v3i64_v4i64__2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2970,8 +2899,7 @@ define void @v_shuffle_v3i64_v4i64__2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3004,8 +2932,7 @@ define void @v_shuffle_v3i64_v4i64__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3019,8 +2946,7 @@ define void @v_shuffle_v3i64_v4i64__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3100,8 +3026,7 @@ define void @v_shuffle_v3i64_v4i64__5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3118,8 +3043,7 @@ define void @v_shuffle_v3i64_v4i64__5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3158,8 +3082,7 @@ define void @v_shuffle_v3i64_v4i64__6_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3176,8 +3099,7 @@ define void @v_shuffle_v3i64_v4i64__6_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3423,8 +3345,7 @@ define void @v_shuffle_v3i64_v4i64__7_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -3440,8 +3361,7 @@ define void @v_shuffle_v3i64_v4i64__7_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -3484,8 +3404,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3502,8 +3421,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3543,8 +3461,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3561,8 +3478,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3602,8 +3518,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3620,8 +3535,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3696,8 +3610,7 @@ define void @v_shuffle_v3i64_v4i64__0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3710,8 +3623,7 @@ define void @v_shuffle_v3i64_v4i64__0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3744,8 +3656,7 @@ define void @v_shuffle_v3i64_v4i64__1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3758,8 +3669,7 @@ define void @v_shuffle_v3i64_v4i64__1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3834,8 +3744,7 @@ define void @v_shuffle_v3i64_v4i64__3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3849,8 +3758,7 @@ define void @v_shuffle_v3i64_v4i64__3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3930,8 +3838,7 @@ define void @v_shuffle_v3i64_v4i64__5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v16, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3948,8 +3855,7 @@ define void @v_shuffle_v3i64_v4i64__5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3988,8 +3894,7 @@ define void @v_shuffle_v3i64_v4i64__6_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v16, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4006,8 +3911,7 @@ define void @v_shuffle_v3i64_v4i64__6_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4309,8 +4213,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4327,8 +4230,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4368,8 +4270,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4386,8 +4287,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4427,8 +4327,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4445,8 +4344,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4660,8 +4558,7 @@ define void @v_shuffle_v3i64_v4i64__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4674,8 +4571,7 @@ define void @v_shuffle_v3i64_v4i64__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4709,8 +4605,7 @@ define void @v_shuffle_v3i64_v4i64__6_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4723,8 +4618,7 @@ define void @v_shuffle_v3i64_v4i64__6_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4758,8 +4652,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4773,8 +4666,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5058,8 +4950,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5073,8 +4964,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5107,8 +4997,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5122,8 +5011,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5205,8 +5093,7 @@ define void @v_shuffle_v3i64_v4i64__0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5223,8 +5110,7 @@ define void @v_shuffle_v3i64_v4i64__0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5263,8 +5149,7 @@ define void @v_shuffle_v3i64_v4i64__1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5281,8 +5166,7 @@ define void @v_shuffle_v3i64_v4i64__1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5321,8 +5205,7 @@ define void @v_shuffle_v3i64_v4i64__2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5339,8 +5222,7 @@ define void @v_shuffle_v3i64_v4i64__2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5376,8 +5258,7 @@ define void @v_shuffle_v3i64_v4i64__3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -5393,8 +5274,7 @@ define void @v_shuffle_v3i64_v4i64__3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -5474,8 +5354,7 @@ define void @v_shuffle_v3i64_v4i64__5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5488,8 +5367,7 @@ define void @v_shuffle_v3i64_v4i64__5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5523,8 +5401,7 @@ define void @v_shuffle_v3i64_v4i64__6_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5537,8 +5414,7 @@ define void @v_shuffle_v3i64_v4i64__6_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5572,8 +5448,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5587,8 +5462,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5872,8 +5746,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5887,8 +5760,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5921,8 +5793,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5936,8 +5807,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6019,8 +5889,7 @@ define void @v_shuffle_v3i64_v4i64__0_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6037,8 +5906,7 @@ define void @v_shuffle_v3i64_v4i64__0_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6077,8 +5945,7 @@ define void @v_shuffle_v3i64_v4i64__1_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6095,8 +5962,7 @@ define void @v_shuffle_v3i64_v4i64__1_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6135,8 +6001,7 @@ define void @v_shuffle_v3i64_v4i64__2_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[10:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6153,8 +6018,7 @@ define void @v_shuffle_v3i64_v4i64__2_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[10:11], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6190,8 +6054,7 @@ define void @v_shuffle_v3i64_v4i64__3_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -6207,8 +6070,7 @@ define void @v_shuffle_v3i64_v4i64__3_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -6245,8 +6107,7 @@ define void @v_shuffle_v3i64_v4i64__4_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6259,8 +6120,7 @@ define void @v_shuffle_v3i64_v4i64__4_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6337,8 +6197,7 @@ define void @v_shuffle_v3i64_v4i64__6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6351,8 +6210,7 @@ define void @v_shuffle_v3i64_v4i64__6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6386,8 +6244,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6401,8 +6258,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6686,8 +6542,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6701,8 +6556,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6735,8 +6589,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6750,8 +6603,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6833,8 +6685,7 @@ define void @v_shuffle_v3i64_v4i64__0_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6851,8 +6702,7 @@ define void @v_shuffle_v3i64_v4i64__0_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6891,8 +6741,7 @@ define void @v_shuffle_v3i64_v4i64__1_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v10
-; GFX90A-NEXT: v_mov_b32_e32 v5, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[10:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6909,8 +6758,7 @@ define void @v_shuffle_v3i64_v4i64__1_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[10:11], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v10
-; GFX942-NEXT: v_mov_b32_e32 v5, v11
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6949,8 +6797,7 @@ define void @v_shuffle_v3i64_v4i64__2_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v12
-; GFX90A-NEXT: v_mov_b32_e32 v7, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[12:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6967,8 +6814,7 @@ define void @v_shuffle_v3i64_v4i64__2_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[12:13], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v12
-; GFX942-NEXT: v_mov_b32_e32 v7, v13
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7004,8 +6850,7 @@ define void @v_shuffle_v3i64_v4i64__3_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -7021,8 +6866,7 @@ define void @v_shuffle_v3i64_v4i64__3_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -7059,8 +6903,7 @@ define void @v_shuffle_v3i64_v4i64__4_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7073,8 +6916,7 @@ define void @v_shuffle_v3i64_v4i64__4_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7108,8 +6950,7 @@ define void @v_shuffle_v3i64_v4i64__5_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7122,8 +6963,7 @@ define void @v_shuffle_v3i64_v4i64__5_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7451,8 +7291,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7466,8 +7305,7 @@ define void @v_shuffle_v3i64_v4i64__7_4_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7500,8 +7338,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7515,8 +7352,7 @@ define void @v_shuffle_v3i64_v4i64__7_5_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7549,8 +7385,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7564,8 +7399,7 @@ define void @v_shuffle_v3i64_v4i64__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
index ff8ddd031858f..cbe0e877710fa 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
@@ -264,8 +264,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -278,8 +277,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -311,8 +309,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -325,8 +322,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -366,8 +362,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -383,8 +378,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -424,8 +418,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -442,8 +435,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -476,8 +468,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -491,8 +482,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -525,8 +515,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -540,8 +529,7 @@ define void @v_shuffle_v3p0_v2p0__3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -616,8 +604,7 @@ define void @v_shuffle_v3p0_v2p0__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v4, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -630,8 +617,7 @@ define void @v_shuffle_v3p0_v2p0__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -664,8 +650,7 @@ define void @v_shuffle_v3p0_v2p0__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -679,8 +664,7 @@ define void @v_shuffle_v3p0_v2p0__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -862,8 +846,7 @@ define void @v_shuffle_v3p0_v2p0__3_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -879,8 +862,7 @@ define void @v_shuffle_v3p0_v2p0__3_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
@@ -923,8 +905,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -940,8 +921,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1058,8 +1038,7 @@ define void @v_shuffle_v3p0_v2p0__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1073,8 +1052,7 @@ define void @v_shuffle_v3p0_v2p0__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1311,8 +1289,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1329,8 +1306,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1463,8 +1439,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1478,8 +1453,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1708,8 +1682,7 @@ define void @v_shuffle_v3p0_v2p0__0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1726,8 +1699,7 @@ define void @v_shuffle_v3p0_v2p0__0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1763,8 +1735,7 @@ define void @v_shuffle_v3p0_v2p0__1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -1780,8 +1751,7 @@ define void @v_shuffle_v3p0_v2p0__1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
@@ -2008,8 +1978,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2023,8 +1992,7 @@ define void @v_shuffle_v3p0_v2p0__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll
index 8e0c74dedb69c..600a6bced5754 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll
@@ -396,8 +396,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -410,8 +409,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -443,8 +441,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -457,8 +454,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -490,8 +486,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -504,8 +499,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -545,8 +539,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -562,8 +555,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -603,8 +595,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -621,8 +612,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -662,8 +652,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -680,8 +669,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -714,8 +702,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -729,8 +716,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -763,8 +749,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -778,8 +763,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -812,8 +796,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -827,8 +810,7 @@ define void @v_shuffle_v3p0_v3p0__5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -903,8 +885,7 @@ define void @v_shuffle_v3p0_v3p0__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -917,8 +898,7 @@ define void @v_shuffle_v3p0_v3p0__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -951,8 +931,7 @@ define void @v_shuffle_v3p0_v3p0__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -965,8 +944,7 @@ define void @v_shuffle_v3p0_v3p0__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -999,8 +977,7 @@ define void @v_shuffle_v3p0_v3p0__2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1014,8 +991,7 @@ define void @v_shuffle_v3p0_v3p0__2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1095,8 +1071,7 @@ define void @v_shuffle_v3p0_v3p0__4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1113,8 +1088,7 @@ define void @v_shuffle_v3p0_v3p0__4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1255,8 +1229,7 @@ define void @v_shuffle_v3p0_v3p0__5_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1272,8 +1245,7 @@ define void @v_shuffle_v3p0_v3p0__5_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -1313,8 +1285,7 @@ define void @v_shuffle_v3p0_v3p0__5_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1330,8 +1301,7 @@ define void @v_shuffle_v3p0_v3p0__5_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -1374,8 +1344,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1391,8 +1360,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1432,8 +1400,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1449,8 +1416,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1567,8 +1533,7 @@ define void @v_shuffle_v3p0_v3p0__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1581,8 +1546,7 @@ define void @v_shuffle_v3p0_v3p0__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1615,8 +1579,7 @@ define void @v_shuffle_v3p0_v3p0__2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1630,8 +1593,7 @@ define void @v_shuffle_v3p0_v3p0__2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1711,8 +1673,7 @@ define void @v_shuffle_v3p0_v3p0__4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1729,8 +1690,7 @@ define void @v_shuffle_v3p0_v3p0__4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1923,8 +1883,7 @@ define void @v_shuffle_v3p0_v3p0__5_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -1940,8 +1899,7 @@ define void @v_shuffle_v3p0_v3p0__5_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -1984,8 +1942,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2002,8 +1959,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2043,8 +1999,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2061,8 +2016,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2137,8 +2091,7 @@ define void @v_shuffle_v3p0_v3p0__0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2151,8 +2104,7 @@ define void @v_shuffle_v3p0_v3p0__0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v6, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2227,8 +2179,7 @@ define void @v_shuffle_v3p0_v3p0__2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2242,8 +2193,7 @@ define void @v_shuffle_v3p0_v3p0__2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2323,8 +2273,7 @@ define void @v_shuffle_v3p0_v3p0__4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2341,8 +2290,7 @@ define void @v_shuffle_v3p0_v3p0__4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2591,8 +2539,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2609,8 +2556,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2650,8 +2596,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2668,8 +2613,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2844,8 +2788,7 @@ define void @v_shuffle_v3p0_v3p0__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2858,8 +2801,7 @@ define void @v_shuffle_v3p0_v3p0__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2893,8 +2835,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2908,8 +2849,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3141,8 +3081,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3156,8 +3095,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3239,8 +3177,7 @@ define void @v_shuffle_v3p0_v3p0__0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3257,8 +3194,7 @@ define void @v_shuffle_v3p0_v3p0__0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3297,8 +3233,7 @@ define void @v_shuffle_v3p0_v3p0__1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3315,8 +3250,7 @@ define void @v_shuffle_v3p0_v3p0__1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3352,8 +3286,7 @@ define void @v_shuffle_v3p0_v3p0__2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -3369,8 +3302,7 @@ define void @v_shuffle_v3p0_v3p0__2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -3450,8 +3382,7 @@ define void @v_shuffle_v3p0_v3p0__4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3464,8 +3395,7 @@ define void @v_shuffle_v3p0_v3p0__4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v6, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3499,8 +3429,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3514,8 +3443,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3747,8 +3675,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3762,8 +3689,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3845,8 +3771,7 @@ define void @v_shuffle_v3p0_v3p0__0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3863,8 +3788,7 @@ define void @v_shuffle_v3p0_v3p0__0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3903,8 +3827,7 @@ define void @v_shuffle_v3p0_v3p0__1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3921,8 +3844,7 @@ define void @v_shuffle_v3p0_v3p0__1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3958,8 +3880,7 @@ define void @v_shuffle_v3p0_v3p0__2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -3975,8 +3896,7 @@ define void @v_shuffle_v3p0_v3p0__2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -4013,8 +3933,7 @@ define void @v_shuffle_v3p0_v3p0__3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v6, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4027,8 +3946,7 @@ define void @v_shuffle_v3p0_v3p0__3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v6, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4304,8 +4222,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4319,8 +4236,7 @@ define void @v_shuffle_v3p0_v3p0__5_3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4353,8 +4269,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4368,8 +4283,7 @@ define void @v_shuffle_v3p0_v3p0__5_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
index b60d7f80b9cc2..cd696fefbce7b 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
@@ -525,8 +525,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -539,8 +538,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -572,8 +570,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -586,8 +583,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -619,8 +615,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -633,8 +628,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -666,8 +660,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -680,8 +673,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -721,8 +713,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -738,8 +729,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -779,8 +769,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -797,8 +786,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -838,8 +826,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -856,8 +843,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -897,8 +883,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -915,8 +900,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -949,8 +933,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -964,8 +947,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -998,8 +980,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1013,8 +994,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1047,8 +1027,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1062,8 +1041,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1096,8 +1074,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1111,8 +1088,7 @@ define void @v_shuffle_v3p0_v4p0__7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1187,8 +1163,7 @@ define void @v_shuffle_v3p0_v4p0__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1201,8 +1176,7 @@ define void @v_shuffle_v3p0_v4p0__0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1235,8 +1209,7 @@ define void @v_shuffle_v3p0_v4p0__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1249,8 +1222,7 @@ define void @v_shuffle_v3p0_v4p0__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1283,8 +1255,7 @@ define void @v_shuffle_v3p0_v4p0__2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1297,8 +1268,7 @@ define void @v_shuffle_v3p0_v4p0__2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1331,8 +1301,7 @@ define void @v_shuffle_v3p0_v4p0__3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1346,8 +1315,7 @@ define void @v_shuffle_v3p0_v4p0__3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1427,8 +1395,7 @@ define void @v_shuffle_v3p0_v4p0__5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1445,8 +1412,7 @@ define void @v_shuffle_v3p0_v4p0__5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1485,8 +1451,7 @@ define void @v_shuffle_v3p0_v4p0__6_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1503,8 +1468,7 @@ define void @v_shuffle_v3p0_v4p0__6_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1645,8 +1609,7 @@ define void @v_shuffle_v3p0_v4p0__7_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -1662,8 +1625,7 @@ define void @v_shuffle_v3p0_v4p0__7_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -1703,8 +1665,7 @@ define void @v_shuffle_v3p0_v4p0__7_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -1720,8 +1681,7 @@ define void @v_shuffle_v3p0_v4p0__7_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -1761,8 +1721,7 @@ define void @v_shuffle_v3p0_v4p0__7_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -1778,8 +1737,7 @@ define void @v_shuffle_v3p0_v4p0__7_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -1822,8 +1780,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1839,8 +1796,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1880,8 +1836,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1897,8 +1852,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1938,8 +1892,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v16, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1955,8 +1908,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2073,8 +2025,7 @@ define void @v_shuffle_v3p0_v4p0__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2087,8 +2038,7 @@ define void @v_shuffle_v3p0_v4p0__1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2121,8 +2071,7 @@ define void @v_shuffle_v3p0_v4p0__2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2135,8 +2084,7 @@ define void @v_shuffle_v3p0_v4p0__2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2169,8 +2117,7 @@ define void @v_shuffle_v3p0_v4p0__3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2184,8 +2131,7 @@ define void @v_shuffle_v3p0_v4p0__3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2265,8 +2211,7 @@ define void @v_shuffle_v3p0_v4p0__5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2283,8 +2228,7 @@ define void @v_shuffle_v3p0_v4p0__5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2323,8 +2267,7 @@ define void @v_shuffle_v3p0_v4p0__6_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2341,8 +2284,7 @@ define void @v_shuffle_v3p0_v4p0__6_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2535,8 +2477,7 @@ define void @v_shuffle_v3p0_v4p0__7_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -2552,8 +2493,7 @@ define void @v_shuffle_v3p0_v4p0__7_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -2593,8 +2533,7 @@ define void @v_shuffle_v3p0_v4p0__7_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -2610,8 +2549,7 @@ define void @v_shuffle_v3p0_v4p0__7_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -2654,8 +2592,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2672,8 +2609,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2713,8 +2649,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2731,8 +2666,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2772,8 +2706,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2790,8 +2723,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2866,8 +2798,7 @@ define void @v_shuffle_v3p0_v4p0__0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2880,8 +2811,7 @@ define void @v_shuffle_v3p0_v4p0__0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2956,8 +2886,7 @@ define void @v_shuffle_v3p0_v4p0__2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2970,8 +2899,7 @@ define void @v_shuffle_v3p0_v4p0__2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3004,8 +2932,7 @@ define void @v_shuffle_v3p0_v4p0__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3019,8 +2946,7 @@ define void @v_shuffle_v3p0_v4p0__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3100,8 +3026,7 @@ define void @v_shuffle_v3p0_v4p0__5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3118,8 +3043,7 @@ define void @v_shuffle_v3p0_v4p0__5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3158,8 +3082,7 @@ define void @v_shuffle_v3p0_v4p0__6_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3176,8 +3099,7 @@ define void @v_shuffle_v3p0_v4p0__6_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3423,8 +3345,7 @@ define void @v_shuffle_v3p0_v4p0__7_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -3440,8 +3361,7 @@ define void @v_shuffle_v3p0_v4p0__7_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -3484,8 +3404,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3502,8 +3421,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3543,8 +3461,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3561,8 +3478,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3602,8 +3518,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3620,8 +3535,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3696,8 +3610,7 @@ define void @v_shuffle_v3p0_v4p0__0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3710,8 +3623,7 @@ define void @v_shuffle_v3p0_v4p0__0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3744,8 +3656,7 @@ define void @v_shuffle_v3p0_v4p0__1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3758,8 +3669,7 @@ define void @v_shuffle_v3p0_v4p0__1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3834,8 +3744,7 @@ define void @v_shuffle_v3p0_v4p0__3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3849,8 +3758,7 @@ define void @v_shuffle_v3p0_v4p0__3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3930,8 +3838,7 @@ define void @v_shuffle_v3p0_v4p0__5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v16, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3948,8 +3855,7 @@ define void @v_shuffle_v3p0_v4p0__5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3988,8 +3894,7 @@ define void @v_shuffle_v3p0_v4p0__6_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v16, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4006,8 +3911,7 @@ define void @v_shuffle_v3p0_v4p0__6_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v16, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4309,8 +4213,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4327,8 +4230,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4368,8 +4270,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4386,8 +4287,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4427,8 +4327,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4445,8 +4344,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4660,8 +4558,7 @@ define void @v_shuffle_v3p0_v4p0__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4674,8 +4571,7 @@ define void @v_shuffle_v3p0_v4p0__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4709,8 +4605,7 @@ define void @v_shuffle_v3p0_v4p0__6_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4723,8 +4618,7 @@ define void @v_shuffle_v3p0_v4p0__6_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx2 v8, v[0:1], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4758,8 +4652,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4773,8 +4666,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5058,8 +4950,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5073,8 +4964,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5107,8 +4997,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[0:1], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5122,8 +5011,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[0:1], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5205,8 +5093,7 @@ define void @v_shuffle_v3p0_v4p0__0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5223,8 +5110,7 @@ define void @v_shuffle_v3p0_v4p0__0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5263,8 +5149,7 @@ define void @v_shuffle_v3p0_v4p0__1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5281,8 +5166,7 @@ define void @v_shuffle_v3p0_v4p0__1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5321,8 +5205,7 @@ define void @v_shuffle_v3p0_v4p0__2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[8:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5339,8 +5222,7 @@ define void @v_shuffle_v3p0_v4p0__2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5376,8 +5258,7 @@ define void @v_shuffle_v3p0_v4p0__3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -5393,8 +5274,7 @@ define void @v_shuffle_v3p0_v4p0__3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -5474,8 +5354,7 @@ define void @v_shuffle_v3p0_v4p0__5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5488,8 +5367,7 @@ define void @v_shuffle_v3p0_v4p0__5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5523,8 +5401,7 @@ define void @v_shuffle_v3p0_v4p0__6_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5537,8 +5414,7 @@ define void @v_shuffle_v3p0_v4p0__6_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx2 v8, v[2:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5572,8 +5448,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5587,8 +5462,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5872,8 +5746,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5887,8 +5760,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5921,8 +5793,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[2:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5936,8 +5807,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[2:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6019,8 +5889,7 @@ define void @v_shuffle_v3p0_v4p0__0_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6037,8 +5906,7 @@ define void @v_shuffle_v3p0_v4p0__0_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6077,8 +5945,7 @@ define void @v_shuffle_v3p0_v4p0__1_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[8:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6095,8 +5962,7 @@ define void @v_shuffle_v3p0_v4p0__1_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6135,8 +6001,7 @@ define void @v_shuffle_v3p0_v4p0__2_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[10:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6153,8 +6018,7 @@ define void @v_shuffle_v3p0_v4p0__2_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[10:11], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6190,8 +6054,7 @@ define void @v_shuffle_v3p0_v4p0__3_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -6207,8 +6070,7 @@ define void @v_shuffle_v3p0_v4p0__3_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -6245,8 +6107,7 @@ define void @v_shuffle_v3p0_v4p0__4_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6259,8 +6120,7 @@ define void @v_shuffle_v3p0_v4p0__4_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6337,8 +6197,7 @@ define void @v_shuffle_v3p0_v4p0__6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6351,8 +6210,7 @@ define void @v_shuffle_v3p0_v4p0__6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx2 v8, v[4:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6386,8 +6244,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6401,8 +6258,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6686,8 +6542,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6701,8 +6556,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6735,8 +6589,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[4:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6750,8 +6603,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[4:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6833,8 +6685,7 @@ define void @v_shuffle_v3p0_v4p0__0_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[8:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6851,8 +6702,7 @@ define void @v_shuffle_v3p0_v4p0__0_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[8:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6891,8 +6741,7 @@ define void @v_shuffle_v3p0_v4p0__1_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v10
-; GFX90A-NEXT: v_mov_b32_e32 v5, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v12, v[10:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6909,8 +6758,7 @@ define void @v_shuffle_v3p0_v4p0__1_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v12, v[10:11], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v10
-; GFX942-NEXT: v_mov_b32_e32 v5, v11
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6949,8 +6797,7 @@ define void @v_shuffle_v3p0_v4p0__2_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v12
-; GFX90A-NEXT: v_mov_b32_e32 v7, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v14, v[12:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6967,8 +6814,7 @@ define void @v_shuffle_v3p0_v4p0__2_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v14, v[12:13], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v12
-; GFX942-NEXT: v_mov_b32_e32 v7, v13
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7004,8 +6850,7 @@ define void @v_shuffle_v3p0_v4p0__3_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -7021,8 +6866,7 @@ define void @v_shuffle_v3p0_v4p0__3_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -7059,8 +6903,7 @@ define void @v_shuffle_v3p0_v4p0__4_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7073,8 +6916,7 @@ define void @v_shuffle_v3p0_v4p0__4_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7108,8 +6950,7 @@ define void @v_shuffle_v3p0_v4p0__5_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v8, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7122,8 +6963,7 @@ define void @v_shuffle_v3p0_v4p0__5_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx2 v8, v[6:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7451,8 +7291,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7466,8 +7305,7 @@ define void @v_shuffle_v3p0_v4p0__7_4_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7500,8 +7338,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7515,8 +7352,7 @@ define void @v_shuffle_v3p0_v4p0__7_5_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7549,8 +7385,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v10, v[6:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7564,8 +7399,7 @@ define void @v_shuffle_v3p0_v4p0__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx2 v10, v[6:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
index db1cf9faff8ec..177c5d9104395 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
@@ -273,8 +273,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v2, v[4:6], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -287,8 +286,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v2, v[4:6], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -650,8 +648,7 @@ define void @v_shuffle_v3p3_v2p3__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -664,8 +661,7 @@ define void @v_shuffle_v3p3_v2p3__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -900,8 +896,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v5
-; GFX90A-NEXT: v_mov_b32_e32 v1, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -920,8 +915,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v5
-; GFX942-NEXT: v_mov_b32_e32 v1, v4
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1295,8 +1289,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v3
-; GFX90A-NEXT: v_mov_b32_e32 v7, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v8, v1
; GFX90A-NEXT: global_store_dwordx3 v4, v[6:8], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1313,8 +1306,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v3
-; GFX942-NEXT: v_mov_b32_e32 v7, v2
+; GFX942-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v8, v1
; GFX942-NEXT: global_store_dwordx3 v4, v[6:8], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1449,8 +1441,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1463,8 +1454,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2001,8 +1991,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v6, v1
; GFX90A-NEXT: global_store_dwordx3 v2, v[4:6], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2016,8 +2005,7 @@ define void @v_shuffle_v3p3_v2p3__3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v6, v1
; GFX942-NEXT: global_store_dwordx3 v2, v[4:6], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
index cbcb0b64e2ef8..79dcfe5d23437 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
@@ -922,8 +922,7 @@ define void @v_shuffle_v3p3_v3p3__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:4]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v5, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -936,8 +935,7 @@ define void @v_shuffle_v3p3_v3p3__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:4]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v5, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2738,8 +2736,7 @@ define void @v_shuffle_v3p3_v3p3__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:4]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v5, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2752,8 +2749,7 @@ define void @v_shuffle_v3p3_v3p3__4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:4]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v5, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
index 6127b40404f5e..cdfa3aded4256 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
@@ -629,8 +629,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -642,8 +641,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1203,8 +1201,7 @@ define void @v_shuffle_v3p3_v4p3__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1217,8 +1214,7 @@ define void @v_shuffle_v3p3_v4p3__1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1875,8 +1871,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1892,8 +1887,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2687,8 +2681,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v5
-; GFX90A-NEXT: v_mov_b32_e32 v3, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v4, v1
; GFX90A-NEXT: global_store_dwordx3 v6, v[2:4], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2705,8 +2698,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v5
-; GFX942-NEXT: v_mov_b32_e32 v3, v4
+; GFX942-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v4, v1
; GFX942-NEXT: global_store_dwordx3 v6, v[2:4], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2912,8 +2904,7 @@ define void @v_shuffle_v3p3_v4p3__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2925,8 +2916,7 @@ define void @v_shuffle_v3p3_v4p3__3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3489,8 +3479,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3506,8 +3495,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4298,8 +4286,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v7
-; GFX90A-NEXT: v_mov_b32_e32 v1, v6
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
; GFX90A-NEXT: global_store_dwordx3 v8, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4316,8 +4303,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v2, v3
-; GFX942-NEXT: v_mov_b32_e32 v0, v7
-; GFX942-NEXT: v_mov_b32_e32 v1, v6
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v8, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4531,8 +4517,7 @@ define void @v_shuffle_v3p3_v4p3__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4545,8 +4530,7 @@ define void @v_shuffle_v3p3_v4p3__5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4977,8 +4961,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v5
-; GFX90A-NEXT: v_mov_b32_e32 v1, v4
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v6, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4991,8 +4974,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v5
-; GFX942-NEXT: v_mov_b32_e32 v1, v4
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v6, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5781,8 +5763,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v3
-; GFX90A-NEXT: v_mov_b32_e32 v7, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v8, v1
; GFX90A-NEXT: global_store_dwordx3 v4, v[6:8], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5796,8 +5777,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v3
-; GFX942-NEXT: v_mov_b32_e32 v7, v2
+; GFX942-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v8, v1
; GFX942-NEXT: global_store_dwordx3 v4, v[6:8], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6229,8 +6209,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6242,8 +6221,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7392,8 +7370,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v3
-; GFX90A-NEXT: v_mov_b32_e32 v1, v2
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
; GFX90A-NEXT: global_store_dwordx3 v4, v[0:2], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7406,8 +7383,7 @@ define void @v_shuffle_v3p3_v4p3__7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v2, v3
; GFX942-NEXT: global_store_dwordx3 v4, v[0:2], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
index 2a0344fce9f44..53a7507934f02 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
@@ -272,8 +272,7 @@ define void @v_shuffle_v4f32_v2f32__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx4 v2, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -286,8 +285,7 @@ define void @v_shuffle_v4f32_v2f32__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx4 v2, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
index 504f4aad7e682..510a5ffc8d0fa 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
@@ -5708,8 +5708,7 @@ define void @v_shuffle_v4f32_v3f32__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:2]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v3, v2
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5723,8 +5722,7 @@ define void @v_shuffle_v4f32_v3f32__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
; GFX942-NEXT: v_mov_b32_e32 v3, v2
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
index 5fdd57da3dab7..6ba1c03f7453d 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
@@ -8880,8 +8880,7 @@ define void @v_shuffle_v4f32_v4f32__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8894,8 +8893,7 @@ define void @v_shuffle_v4f32_v4f32__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
; GFX942-NEXT: v_mov_b32_e32 v2, v3
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
index ad2dd3a8f8073..58124330b47aa 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
@@ -272,8 +272,7 @@ define void @v_shuffle_v4i32_v2i32__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx4 v2, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -286,8 +285,7 @@ define void @v_shuffle_v4i32_v2i32__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx4 v2, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
index 2cf0f5c030d74..74bb005b4c750 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
@@ -5708,8 +5708,7 @@ define void @v_shuffle_v4i32_v3i32__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:2]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v3, v2
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5723,8 +5722,7 @@ define void @v_shuffle_v4i32_v3i32__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
; GFX942-NEXT: v_mov_b32_e32 v3, v2
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
index c7d7bf9fa1623..11594f516401b 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
@@ -8880,8 +8880,7 @@ define void @v_shuffle_v4i32_v4i32__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8894,8 +8893,7 @@ define void @v_shuffle_v4i32_v4i32__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
; GFX942-NEXT: v_mov_b32_e32 v2, v3
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
index 79dde44bcbdec..64645178fa087 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
@@ -264,8 +264,7 @@ define void @v_shuffle_v4i64_v2i64__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -278,8 +277,7 @@ define void @v_shuffle_v4i64_v2i64__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -311,8 +309,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -325,8 +322,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -368,8 +364,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -386,8 +381,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -423,8 +417,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -444,8 +437,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -478,8 +470,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -493,8 +484,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -530,8 +520,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -545,8 +534,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -588,8 +576,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -606,8 +593,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -649,8 +635,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -668,8 +653,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -705,12 +689,10 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -723,12 +705,10 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -761,8 +741,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -776,8 +755,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -811,8 +789,7 @@ define void @v_shuffle_v4i64_v2i64__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -825,8 +802,7 @@ define void @v_shuffle_v4i64_v2i64__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -859,8 +835,7 @@ define void @v_shuffle_v4i64_v2i64__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -873,8 +848,7 @@ define void @v_shuffle_v4i64_v2i64__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -909,10 +883,8 @@ define void @v_shuffle_v4i64_v2i64__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -926,10 +898,8 @@ define void @v_shuffle_v4i64_v2i64__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -962,8 +932,7 @@ define void @v_shuffle_v4i64_v2i64__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -976,8 +945,7 @@ define void @v_shuffle_v4i64_v2i64__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1016,8 +984,7 @@ define void @v_shuffle_v4i64_v2i64__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1033,8 +1000,7 @@ define void @v_shuffle_v4i64_v2i64__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1074,8 +1040,7 @@ define void @v_shuffle_v4i64_v2i64__3_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1091,8 +1056,7 @@ define void @v_shuffle_v4i64_v2i64__3_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1131,10 +1095,8 @@ define void @v_shuffle_v4i64_v2i64__3_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:9]
; GFX90A-NEXT: ;;#ASMEND
@@ -1154,10 +1116,8 @@ define void @v_shuffle_v4i64_v2i64__3_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1197,15 +1157,13 @@ define void @v_shuffle_v4i64_v2i64__3_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1217,15 +1175,13 @@ define void @v_shuffle_v4i64_v2i64__3_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1264,15 +1220,13 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1284,15 +1238,13 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1331,8 +1283,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1349,8 +1300,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v0, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1391,10 +1341,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1410,10 +1358,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1455,10 +1401,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1475,10 +1419,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1512,8 +1454,7 @@ define void @v_shuffle_v4i64_v2i64__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1527,8 +1468,7 @@ define void @v_shuffle_v4i64_v2i64__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1561,8 +1501,7 @@ define void @v_shuffle_v4i64_v2i64__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1576,8 +1515,7 @@ define void @v_shuffle_v4i64_v2i64__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1610,8 +1548,7 @@ define void @v_shuffle_v4i64_v2i64__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1625,8 +1562,7 @@ define void @v_shuffle_v4i64_v2i64__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1659,8 +1595,7 @@ define void @v_shuffle_v4i64_v2i64__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1674,8 +1609,7 @@ define void @v_shuffle_v4i64_v2i64__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1714,8 +1648,7 @@ define void @v_shuffle_v4i64_v2i64__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1731,8 +1664,7 @@ define void @v_shuffle_v4i64_v2i64__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1772,8 +1704,7 @@ define void @v_shuffle_v4i64_v2i64__3_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1790,8 +1721,7 @@ define void @v_shuffle_v4i64_v2i64__3_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1828,8 +1758,7 @@ define void @v_shuffle_v4i64_v2i64__3_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -1849,8 +1778,7 @@ define void @v_shuffle_v4i64_v2i64__3_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1892,10 +1820,8 @@ define void @v_shuffle_v4i64_v2i64__3_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1912,10 +1838,8 @@ define void @v_shuffle_v4i64_v2i64__3_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1957,10 +1881,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1976,10 +1898,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2022,8 +1942,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2041,8 +1960,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2084,8 +2002,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2102,8 +2019,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2145,12 +2061,10 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2166,12 +2080,10 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2306,10 +2218,8 @@ define void @v_shuffle_v4i64_v2i64__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2323,10 +2233,8 @@ define void @v_shuffle_v4i64_v2i64__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2360,8 +2268,7 @@ define void @v_shuffle_v4i64_v2i64__3_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2375,8 +2282,7 @@ define void @v_shuffle_v4i64_v2i64__3_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2413,8 +2319,7 @@ define void @v_shuffle_v4i64_v2i64__3_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:9]
; GFX90A-NEXT: ;;#ASMEND
@@ -2434,8 +2339,7 @@ define void @v_shuffle_v4i64_v2i64__3_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2475,8 +2379,7 @@ define void @v_shuffle_v4i64_v2i64__3_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2493,8 +2396,7 @@ define void @v_shuffle_v4i64_v2i64__3_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2530,10 +2432,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2547,10 +2447,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2584,8 +2482,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2599,8 +2496,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v0, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2639,8 +2535,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2657,8 +2552,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2694,8 +2588,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -2715,8 +2608,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2749,8 +2641,7 @@ define void @v_shuffle_v4i64_v2i64__u_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2764,8 +2655,7 @@ define void @v_shuffle_v4i64_v2i64__u_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2807,10 +2697,8 @@ define void @v_shuffle_v4i64_v2i64__0_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2827,10 +2715,8 @@ define void @v_shuffle_v4i64_v2i64__0_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2869,10 +2755,8 @@ define void @v_shuffle_v4i64_v2i64__1_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -2888,10 +2772,8 @@ define void @v_shuffle_v4i64_v2i64__1_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
@@ -2928,8 +2810,7 @@ define void @v_shuffle_v4i64_v2i64__2_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2943,8 +2824,7 @@ define void @v_shuffle_v4i64_v2i64__2_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2978,8 +2858,7 @@ define void @v_shuffle_v4i64_v2i64__3_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2993,8 +2872,7 @@ define void @v_shuffle_v4i64_v2i64__3_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3034,15 +2912,13 @@ define void @v_shuffle_v4i64_v2i64__3_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3058,12 +2934,10 @@ define void @v_shuffle_v4i64_v2i64__3_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3105,12 +2979,10 @@ define void @v_shuffle_v4i64_v2i64__3_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3126,12 +2998,10 @@ define void @v_shuffle_v4i64_v2i64__3_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3167,12 +3037,10 @@ define void @v_shuffle_v4i64_v2i64__3_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3185,12 +3053,10 @@ define void @v_shuffle_v4i64_v2i64__3_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3223,8 +3089,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3238,8 +3103,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_u_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3281,12 +3145,10 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3302,12 +3164,10 @@ define void @v_shuffle_v4i64_v2i64__3_3_0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3345,10 +3205,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -3364,10 +3222,8 @@ define void @v_shuffle_v4i64_v2i64__3_3_1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
@@ -3404,8 +3260,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3419,8 +3274,7 @@ define void @v_shuffle_v4i64_v2i64__3_3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
index 97a9a0f94944d..ff4b5e919aeda 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
@@ -396,8 +396,7 @@ define void @v_shuffle_v4i64_v3i64__5_3_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -410,8 +409,7 @@ define void @v_shuffle_v4i64_v3i64__5_3_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -443,8 +441,7 @@ define void @v_shuffle_v4i64_v3i64__5_4_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -457,8 +454,7 @@ define void @v_shuffle_v4i64_v3i64__5_4_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -490,8 +486,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -504,8 +499,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -547,8 +541,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -565,8 +558,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -608,8 +600,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -626,8 +617,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -663,8 +653,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -684,8 +673,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -718,8 +706,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -733,8 +720,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -767,8 +753,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -782,8 +767,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -819,8 +803,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -834,8 +817,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -877,8 +859,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -895,8 +876,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -938,8 +918,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -957,8 +936,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1000,8 +978,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1019,8 +996,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1056,12 +1032,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1074,12 +1048,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1115,12 +1087,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1133,12 +1103,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1171,8 +1139,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1186,8 +1153,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1221,8 +1187,7 @@ define void @v_shuffle_v4i64_v3i64__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1235,8 +1200,7 @@ define void @v_shuffle_v4i64_v3i64__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1269,8 +1233,7 @@ define void @v_shuffle_v4i64_v3i64__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1283,8 +1246,7 @@ define void @v_shuffle_v4i64_v3i64__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1319,10 +1281,8 @@ define void @v_shuffle_v4i64_v3i64__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1335,10 +1295,8 @@ define void @v_shuffle_v4i64_v3i64__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1373,10 +1331,8 @@ define void @v_shuffle_v4i64_v3i64__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1389,10 +1345,8 @@ define void @v_shuffle_v4i64_v3i64__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1425,8 +1379,7 @@ define void @v_shuffle_v4i64_v3i64__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1439,8 +1392,7 @@ define void @v_shuffle_v4i64_v3i64__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1481,10 +1433,8 @@ define void @v_shuffle_v4i64_v3i64__4_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1501,10 +1451,8 @@ define void @v_shuffle_v4i64_v3i64__4_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1544,8 +1492,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1561,8 +1508,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1602,8 +1548,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1619,8 +1564,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1659,10 +1603,8 @@ define void @v_shuffle_v4i64_v3i64__5_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
@@ -1679,10 +1621,8 @@ define void @v_shuffle_v4i64_v3i64__5_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
@@ -1725,15 +1665,13 @@ define void @v_shuffle_v4i64_v3i64__5_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1745,15 +1683,13 @@ define void @v_shuffle_v4i64_v3i64__5_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1792,15 +1728,13 @@ define void @v_shuffle_v4i64_v3i64__5_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1812,15 +1746,13 @@ define void @v_shuffle_v4i64_v3i64__5_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1859,15 +1791,13 @@ define void @v_shuffle_v4i64_v3i64__5_4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1879,15 +1809,13 @@ define void @v_shuffle_v4i64_v3i64__5_4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1926,15 +1854,13 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1946,15 +1872,13 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1993,8 +1917,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2011,8 +1934,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v0, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2053,10 +1975,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2072,10 +1992,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2117,10 +2035,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2136,10 +2052,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2181,10 +2095,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2200,10 +2112,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2245,10 +2155,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v6
-; GFX90A-NEXT: v_mov_b32_e32 v1, v7
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2265,10 +2173,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v6
-; GFX942-NEXT: v_mov_b32_e32 v1, v7
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2302,8 +2208,7 @@ define void @v_shuffle_v4i64_v3i64__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2316,8 +2221,7 @@ define void @v_shuffle_v4i64_v3i64__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2350,8 +2254,7 @@ define void @v_shuffle_v4i64_v3i64__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2364,8 +2267,7 @@ define void @v_shuffle_v4i64_v3i64__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2398,8 +2300,7 @@ define void @v_shuffle_v4i64_v3i64__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2412,8 +2313,7 @@ define void @v_shuffle_v4i64_v3i64__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2448,10 +2348,8 @@ define void @v_shuffle_v4i64_v3i64__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2464,10 +2362,8 @@ define void @v_shuffle_v4i64_v3i64__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2500,8 +2396,7 @@ define void @v_shuffle_v4i64_v3i64__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2514,8 +2409,7 @@ define void @v_shuffle_v4i64_v3i64__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2556,10 +2450,8 @@ define void @v_shuffle_v4i64_v3i64__4_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2576,10 +2468,8 @@ define void @v_shuffle_v4i64_v3i64__4_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2619,8 +2509,7 @@ define void @v_shuffle_v4i64_v3i64__5_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2636,8 +2525,7 @@ define void @v_shuffle_v4i64_v3i64__5_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2677,8 +2565,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2694,8 +2581,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2732,8 +2618,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -2749,8 +2634,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -2793,15 +2677,13 @@ define void @v_shuffle_v4i64_v3i64__5_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2813,15 +2695,13 @@ define void @v_shuffle_v4i64_v3i64__5_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2860,15 +2740,13 @@ define void @v_shuffle_v4i64_v3i64__5_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2880,15 +2758,13 @@ define void @v_shuffle_v4i64_v3i64__5_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2927,15 +2803,13 @@ define void @v_shuffle_v4i64_v3i64__5_4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2947,15 +2821,13 @@ define void @v_shuffle_v4i64_v3i64__5_4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2994,15 +2866,13 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3014,15 +2884,13 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3064,8 +2932,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3083,8 +2950,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3126,8 +2992,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3144,8 +3009,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3186,10 +3050,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3205,10 +3067,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3250,10 +3110,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3270,10 +3128,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3316,12 +3172,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3337,12 +3191,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3375,8 +3227,7 @@ define void @v_shuffle_v4i64_v3i64__u_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3390,8 +3241,7 @@ define void @v_shuffle_v4i64_v3i64__u_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3426,10 +3276,8 @@ define void @v_shuffle_v4i64_v3i64__0_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3442,10 +3290,8 @@ define void @v_shuffle_v4i64_v3i64__0_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3478,8 +3324,7 @@ define void @v_shuffle_v4i64_v3i64__1_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3493,8 +3338,7 @@ define void @v_shuffle_v4i64_v3i64__1_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3527,8 +3371,7 @@ define void @v_shuffle_v4i64_v3i64__2_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3542,8 +3385,7 @@ define void @v_shuffle_v4i64_v3i64__2_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3576,8 +3418,7 @@ define void @v_shuffle_v4i64_v3i64__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3591,8 +3432,7 @@ define void @v_shuffle_v4i64_v3i64__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3633,10 +3473,8 @@ define void @v_shuffle_v4i64_v3i64__4_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3653,10 +3491,8 @@ define void @v_shuffle_v4i64_v3i64__4_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3696,8 +3532,7 @@ define void @v_shuffle_v4i64_v3i64__5_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3713,8 +3548,7 @@ define void @v_shuffle_v4i64_v3i64__5_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3754,8 +3588,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3772,8 +3605,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3810,8 +3642,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -3831,8 +3662,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3869,8 +3699,7 @@ define void @v_shuffle_v4i64_v3i64__5_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -3887,8 +3716,7 @@ define void @v_shuffle_v4i64_v3i64__5_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -3933,10 +3761,8 @@ define void @v_shuffle_v4i64_v3i64__5_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:13]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v14, v8
-; GFX90A-NEXT: v_mov_b32_e32 v15, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3953,10 +3779,8 @@ define void @v_shuffle_v4i64_v3i64__5_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v14, v8
-; GFX942-NEXT: v_mov_b32_e32 v15, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3998,10 +3822,8 @@ define void @v_shuffle_v4i64_v3i64__5_4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v12, v8
-; GFX90A-NEXT: v_mov_b32_e32 v13, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4017,10 +3839,8 @@ define void @v_shuffle_v4i64_v3i64__5_4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v8
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v13, v9
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4062,10 +3882,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4081,10 +3899,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4127,8 +3943,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4146,8 +3961,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4186,15 +4000,13 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4206,15 +4018,13 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4256,8 +4066,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4274,8 +4083,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4316,10 +4124,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4336,10 +4142,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4382,12 +4186,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4403,12 +4205,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4585,10 +4385,8 @@ define void @v_shuffle_v4i64_v3i64__4_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4601,10 +4399,8 @@ define void @v_shuffle_v4i64_v3i64__4_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4640,10 +4436,8 @@ define void @v_shuffle_v4i64_v3i64__5_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4656,10 +4450,8 @@ define void @v_shuffle_v4i64_v3i64__5_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4693,8 +4485,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4707,8 +4498,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4745,8 +4535,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
@@ -4762,8 +4551,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
@@ -4806,8 +4594,7 @@ define void @v_shuffle_v4i64_v3i64__5_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4824,8 +4611,7 @@ define void @v_shuffle_v4i64_v3i64__5_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4865,8 +4651,7 @@ define void @v_shuffle_v4i64_v3i64__5_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4883,8 +4668,7 @@ define void @v_shuffle_v4i64_v3i64__5_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4920,10 +4704,8 @@ define void @v_shuffle_v4i64_v3i64__5_4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4937,10 +4719,8 @@ define void @v_shuffle_v4i64_v3i64__5_4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4976,10 +4756,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4992,10 +4770,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5029,8 +4805,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5044,8 +4819,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v0, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5084,8 +4858,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5102,8 +4875,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5142,8 +4914,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5160,8 +4931,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5197,8 +4967,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -5218,8 +4987,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5254,10 +5022,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5271,10 +5037,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5308,8 +5072,7 @@ define void @v_shuffle_v4i64_v3i64__u_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5322,8 +5085,7 @@ define void @v_shuffle_v4i64_v3i64__u_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5365,10 +5127,8 @@ define void @v_shuffle_v4i64_v3i64__0_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5385,10 +5145,8 @@ define void @v_shuffle_v4i64_v3i64__0_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5430,10 +5188,8 @@ define void @v_shuffle_v4i64_v3i64__1_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5450,10 +5206,8 @@ define void @v_shuffle_v4i64_v3i64__1_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5492,10 +5246,8 @@ define void @v_shuffle_v4i64_v3i64__2_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -5511,10 +5263,8 @@ define void @v_shuffle_v4i64_v3i64__2_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -5551,8 +5301,7 @@ define void @v_shuffle_v4i64_v3i64__3_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5565,8 +5314,7 @@ define void @v_shuffle_v4i64_v3i64__3_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5600,8 +5348,7 @@ define void @v_shuffle_v4i64_v3i64__4_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5614,8 +5361,7 @@ define void @v_shuffle_v4i64_v3i64__4_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5651,10 +5397,8 @@ define void @v_shuffle_v4i64_v3i64__5_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5667,10 +5411,8 @@ define void @v_shuffle_v4i64_v3i64__5_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5704,8 +5446,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5718,8 +5459,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5756,8 +5496,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
@@ -5773,8 +5512,7 @@ define void @v_shuffle_v4i64_v3i64__5_0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
@@ -5817,8 +5555,7 @@ define void @v_shuffle_v4i64_v3i64__5_1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5835,8 +5572,7 @@ define void @v_shuffle_v4i64_v3i64__5_1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5876,8 +5612,7 @@ define void @v_shuffle_v4i64_v3i64__5_2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5894,8 +5629,7 @@ define void @v_shuffle_v4i64_v3i64__5_2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5934,12 +5668,9 @@ define void @v_shuffle_v4i64_v3i64__5_3_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
-; GFX90A-NEXT: v_mov_b32_e32 v12, v2
-; GFX90A-NEXT: v_mov_b32_e32 v13, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[10:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5953,12 +5684,9 @@ define void @v_shuffle_v4i64_v3i64__5_3_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
-; GFX942-NEXT: v_mov_b32_e32 v12, v2
-; GFX942-NEXT: v_mov_b32_e32 v13, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5994,10 +5722,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6010,10 +5736,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6047,8 +5771,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6062,8 +5785,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6105,12 +5827,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6126,12 +5846,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6173,12 +5891,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6194,12 +5910,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6237,10 +5951,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -6256,10 +5968,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -6296,8 +6006,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6311,8 +6020,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6345,8 +6053,7 @@ define void @v_shuffle_v4i64_v3i64__u_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6360,8 +6067,7 @@ define void @v_shuffle_v4i64_v3i64__u_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6403,10 +6109,8 @@ define void @v_shuffle_v4i64_v3i64__0_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6423,10 +6127,8 @@ define void @v_shuffle_v4i64_v3i64__0_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6468,10 +6170,8 @@ define void @v_shuffle_v4i64_v3i64__1_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6488,10 +6188,8 @@ define void @v_shuffle_v4i64_v3i64__1_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6530,10 +6228,8 @@ define void @v_shuffle_v4i64_v3i64__2_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -6549,10 +6245,8 @@ define void @v_shuffle_v4i64_v3i64__2_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -6591,10 +6285,8 @@ define void @v_shuffle_v4i64_v3i64__3_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6607,10 +6299,8 @@ define void @v_shuffle_v4i64_v3i64__3_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6644,8 +6334,7 @@ define void @v_shuffle_v4i64_v3i64__4_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6659,8 +6348,7 @@ define void @v_shuffle_v4i64_v3i64__4_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6694,8 +6382,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6709,8 +6396,7 @@ define void @v_shuffle_v4i64_v3i64__5_u_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6750,15 +6436,13 @@ define void @v_shuffle_v4i64_v3i64__5_0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6774,12 +6458,10 @@ define void @v_shuffle_v4i64_v3i64__5_0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6821,12 +6503,10 @@ define void @v_shuffle_v4i64_v3i64__5_1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6842,12 +6522,10 @@ define void @v_shuffle_v4i64_v3i64__5_1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6889,12 +6567,10 @@ define void @v_shuffle_v4i64_v3i64__5_2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6910,12 +6586,10 @@ define void @v_shuffle_v4i64_v3i64__5_2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6951,12 +6625,10 @@ define void @v_shuffle_v4i64_v3i64__5_3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6969,12 +6641,10 @@ define void @v_shuffle_v4i64_v3i64__5_3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7010,12 +6680,10 @@ define void @v_shuffle_v4i64_v3i64__5_4_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7028,12 +6696,10 @@ define void @v_shuffle_v4i64_v3i64__5_4_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7066,8 +6732,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7081,8 +6746,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_u_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7124,12 +6788,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7145,12 +6807,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7192,12 +6852,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7213,12 +6871,10 @@ define void @v_shuffle_v4i64_v3i64__5_5_1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7256,10 +6912,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -7275,10 +6929,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -7317,10 +6969,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7333,10 +6983,8 @@ define void @v_shuffle_v4i64_v3i64__5_5_3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7370,8 +7018,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7385,8 +7032,7 @@ define void @v_shuffle_v4i64_v3i64__5_5_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
index 519c90672016d..e643948a129bf 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
@@ -525,8 +525,7 @@ define void @v_shuffle_v4i64_v4i64__7_4_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -539,8 +538,7 @@ define void @v_shuffle_v4i64_v4i64__7_4_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -572,8 +570,7 @@ define void @v_shuffle_v4i64_v4i64__7_5_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -586,8 +583,7 @@ define void @v_shuffle_v4i64_v4i64__7_5_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -619,8 +615,7 @@ define void @v_shuffle_v4i64_v4i64__7_6_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -633,8 +628,7 @@ define void @v_shuffle_v4i64_v4i64__7_6_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -666,8 +660,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -680,8 +673,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -723,8 +715,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -741,8 +732,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -784,8 +774,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -802,8 +791,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -845,8 +833,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -863,8 +850,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -901,8 +887,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -922,8 +907,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -956,8 +940,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -971,8 +954,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1005,8 +987,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1020,8 +1001,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1054,8 +1034,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1069,8 +1048,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1106,8 +1084,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1121,8 +1098,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1164,8 +1140,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1182,8 +1157,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1225,8 +1199,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1244,8 +1217,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1287,8 +1259,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1306,8 +1277,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1349,8 +1319,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1368,8 +1337,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1405,12 +1373,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1423,12 +1389,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1464,12 +1428,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1482,12 +1444,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1523,12 +1483,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1541,12 +1499,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1579,8 +1535,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1594,8 +1549,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1629,8 +1583,7 @@ define void @v_shuffle_v4i64_v4i64__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1643,8 +1596,7 @@ define void @v_shuffle_v4i64_v4i64__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1677,8 +1629,7 @@ define void @v_shuffle_v4i64_v4i64__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1691,8 +1642,7 @@ define void @v_shuffle_v4i64_v4i64__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1727,10 +1677,8 @@ define void @v_shuffle_v4i64_v4i64__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1743,10 +1691,8 @@ define void @v_shuffle_v4i64_v4i64__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1781,10 +1727,8 @@ define void @v_shuffle_v4i64_v4i64__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1797,10 +1741,8 @@ define void @v_shuffle_v4i64_v4i64__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1835,10 +1777,8 @@ define void @v_shuffle_v4i64_v4i64__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1851,10 +1791,8 @@ define void @v_shuffle_v4i64_v4i64__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1887,8 +1825,7 @@ define void @v_shuffle_v4i64_v4i64__4_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1901,8 +1838,7 @@ define void @v_shuffle_v4i64_v4i64__4_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1943,10 +1879,8 @@ define void @v_shuffle_v4i64_v4i64__5_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1963,10 +1897,8 @@ define void @v_shuffle_v4i64_v4i64__5_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2008,10 +1940,8 @@ define void @v_shuffle_v4i64_v4i64__6_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2028,10 +1958,8 @@ define void @v_shuffle_v4i64_v4i64__6_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2071,8 +1999,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2088,8 +2015,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2129,8 +2055,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2146,8 +2071,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2187,10 +2111,8 @@ define void @v_shuffle_v4i64_v4i64__7_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v14, v4
-; GFX90A-NEXT: v_mov_b32_e32 v15, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
@@ -2207,10 +2129,8 @@ define void @v_shuffle_v4i64_v4i64__7_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v14, v4
-; GFX942-NEXT: v_mov_b32_e32 v15, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
@@ -2253,15 +2173,13 @@ define void @v_shuffle_v4i64_v4i64__7_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2273,15 +2191,13 @@ define void @v_shuffle_v4i64_v4i64__7_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2320,15 +2236,13 @@ define void @v_shuffle_v4i64_v4i64__7_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2340,15 +2254,13 @@ define void @v_shuffle_v4i64_v4i64__7_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2387,15 +2299,13 @@ define void @v_shuffle_v4i64_v4i64__7_4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2407,15 +2317,13 @@ define void @v_shuffle_v4i64_v4i64__7_4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2454,15 +2362,13 @@ define void @v_shuffle_v4i64_v4i64__7_5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2474,15 +2380,13 @@ define void @v_shuffle_v4i64_v4i64__7_5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2521,15 +2425,13 @@ define void @v_shuffle_v4i64_v4i64__7_6_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2541,15 +2443,13 @@ define void @v_shuffle_v4i64_v4i64__7_6_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2588,15 +2488,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2608,15 +2506,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2656,8 +2552,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2674,8 +2569,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v0, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2716,10 +2610,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v8
-; GFX90A-NEXT: v_mov_b32_e32 v13, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2735,10 +2627,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v8
-; GFX942-NEXT: v_mov_b32_e32 v13, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2780,10 +2670,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v8
-; GFX90A-NEXT: v_mov_b32_e32 v15, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2799,10 +2687,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v14, v8
-; GFX942-NEXT: v_mov_b32_e32 v15, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2845,10 +2731,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2864,10 +2748,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2909,10 +2791,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2928,10 +2808,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2973,10 +2851,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2992,10 +2868,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3037,10 +2911,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v8
-; GFX90A-NEXT: v_mov_b32_e32 v1, v9
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3057,10 +2929,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v8
-; GFX942-NEXT: v_mov_b32_e32 v1, v9
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3094,8 +2964,7 @@ define void @v_shuffle_v4i64_v4i64__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3108,8 +2977,7 @@ define void @v_shuffle_v4i64_v4i64__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3142,8 +3010,7 @@ define void @v_shuffle_v4i64_v4i64__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3156,8 +3023,7 @@ define void @v_shuffle_v4i64_v4i64__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3190,8 +3056,7 @@ define void @v_shuffle_v4i64_v4i64__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3204,8 +3069,7 @@ define void @v_shuffle_v4i64_v4i64__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3240,10 +3104,8 @@ define void @v_shuffle_v4i64_v4i64__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3256,10 +3118,8 @@ define void @v_shuffle_v4i64_v4i64__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3294,10 +3154,8 @@ define void @v_shuffle_v4i64_v4i64__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3310,10 +3168,8 @@ define void @v_shuffle_v4i64_v4i64__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3346,8 +3202,7 @@ define void @v_shuffle_v4i64_v4i64__4_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3360,8 +3215,7 @@ define void @v_shuffle_v4i64_v4i64__4_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3402,10 +3256,8 @@ define void @v_shuffle_v4i64_v4i64__5_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3422,10 +3274,8 @@ define void @v_shuffle_v4i64_v4i64__5_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3467,10 +3317,8 @@ define void @v_shuffle_v4i64_v4i64__6_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3487,10 +3335,8 @@ define void @v_shuffle_v4i64_v4i64__6_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3530,8 +3376,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3547,8 +3392,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3588,8 +3432,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3605,8 +3448,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3643,8 +3485,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -3660,8 +3501,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -3704,15 +3544,13 @@ define void @v_shuffle_v4i64_v4i64__7_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3724,15 +3562,13 @@ define void @v_shuffle_v4i64_v4i64__7_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3771,15 +3607,13 @@ define void @v_shuffle_v4i64_v4i64__7_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3791,15 +3625,13 @@ define void @v_shuffle_v4i64_v4i64__7_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3838,15 +3670,13 @@ define void @v_shuffle_v4i64_v4i64__7_4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3858,15 +3688,13 @@ define void @v_shuffle_v4i64_v4i64__7_4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3905,15 +3733,13 @@ define void @v_shuffle_v4i64_v4i64__7_5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3925,15 +3751,13 @@ define void @v_shuffle_v4i64_v4i64__7_5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3972,15 +3796,13 @@ define void @v_shuffle_v4i64_v4i64__7_6_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3992,15 +3814,13 @@ define void @v_shuffle_v4i64_v4i64__7_6_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4039,15 +3859,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4059,15 +3877,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4109,8 +3925,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4128,8 +3943,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4171,8 +3985,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4189,8 +4002,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4231,10 +4043,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v8
-; GFX90A-NEXT: v_mov_b32_e32 v13, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4250,10 +4060,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v8
-; GFX942-NEXT: v_mov_b32_e32 v13, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4296,10 +4104,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4315,10 +4121,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4360,10 +4164,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4380,10 +4182,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4425,10 +4225,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4445,10 +4243,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4491,12 +4287,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4512,12 +4306,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4550,8 +4342,7 @@ define void @v_shuffle_v4i64_v4i64__u_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4564,8 +4355,7 @@ define void @v_shuffle_v4i64_v4i64__u_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4600,10 +4390,8 @@ define void @v_shuffle_v4i64_v4i64__0_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4616,10 +4404,8 @@ define void @v_shuffle_v4i64_v4i64__0_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4652,8 +4438,7 @@ define void @v_shuffle_v4i64_v4i64__1_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4666,8 +4451,7 @@ define void @v_shuffle_v4i64_v4i64__1_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4700,8 +4484,7 @@ define void @v_shuffle_v4i64_v4i64__2_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4714,8 +4497,7 @@ define void @v_shuffle_v4i64_v4i64__2_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4750,10 +4532,8 @@ define void @v_shuffle_v4i64_v4i64__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4766,10 +4546,8 @@ define void @v_shuffle_v4i64_v4i64__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4802,8 +4580,7 @@ define void @v_shuffle_v4i64_v4i64__4_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4816,8 +4593,7 @@ define void @v_shuffle_v4i64_v4i64__4_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4858,10 +4634,8 @@ define void @v_shuffle_v4i64_v4i64__5_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4878,10 +4652,8 @@ define void @v_shuffle_v4i64_v4i64__5_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4923,10 +4695,8 @@ define void @v_shuffle_v4i64_v4i64__6_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4943,10 +4713,8 @@ define void @v_shuffle_v4i64_v4i64__6_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4986,8 +4754,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5003,8 +4770,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5044,8 +4810,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5061,8 +4826,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5099,8 +4863,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -5116,8 +4879,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -5157,8 +4919,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -5174,8 +4935,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -5218,15 +4978,13 @@ define void @v_shuffle_v4i64_v4i64__7_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5238,15 +4996,13 @@ define void @v_shuffle_v4i64_v4i64__7_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5285,15 +5041,13 @@ define void @v_shuffle_v4i64_v4i64__7_4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5305,15 +5059,13 @@ define void @v_shuffle_v4i64_v4i64__7_4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5352,15 +5104,13 @@ define void @v_shuffle_v4i64_v4i64__7_5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5372,15 +5122,13 @@ define void @v_shuffle_v4i64_v4i64__7_5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5419,15 +5167,13 @@ define void @v_shuffle_v4i64_v4i64__7_6_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5439,15 +5185,13 @@ define void @v_shuffle_v4i64_v4i64__7_6_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5486,15 +5230,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5506,15 +5248,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5556,8 +5296,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5575,8 +5314,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5615,15 +5353,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v12
-; GFX90A-NEXT: v_mov_b32_e32 v11, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5635,15 +5371,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v12
-; GFX942-NEXT: v_mov_b32_e32 v11, v13
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5685,8 +5419,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5703,8 +5436,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5746,10 +5478,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5765,10 +5495,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5810,10 +5538,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5830,10 +5556,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5875,10 +5599,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5895,10 +5617,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5941,12 +5661,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5962,12 +5680,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6000,8 +5716,7 @@ define void @v_shuffle_v4i64_v4i64__u_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6015,8 +5730,7 @@ define void @v_shuffle_v4i64_v4i64__u_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6051,10 +5765,8 @@ define void @v_shuffle_v4i64_v4i64__0_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6067,10 +5779,8 @@ define void @v_shuffle_v4i64_v4i64__0_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6105,10 +5815,8 @@ define void @v_shuffle_v4i64_v4i64__1_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6121,10 +5829,8 @@ define void @v_shuffle_v4i64_v4i64__1_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6157,8 +5863,7 @@ define void @v_shuffle_v4i64_v4i64__2_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6172,8 +5877,7 @@ define void @v_shuffle_v4i64_v4i64__2_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6206,8 +5910,7 @@ define void @v_shuffle_v4i64_v4i64__3_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6221,8 +5924,7 @@ define void @v_shuffle_v4i64_v4i64__3_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6255,8 +5957,7 @@ define void @v_shuffle_v4i64_v4i64__4_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6270,8 +5971,7 @@ define void @v_shuffle_v4i64_v4i64__4_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6312,10 +6012,8 @@ define void @v_shuffle_v4i64_v4i64__5_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6332,10 +6030,8 @@ define void @v_shuffle_v4i64_v4i64__5_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6377,10 +6073,8 @@ define void @v_shuffle_v4i64_v4i64__6_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6397,10 +6091,8 @@ define void @v_shuffle_v4i64_v4i64__6_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6440,8 +6132,7 @@ define void @v_shuffle_v4i64_v4i64__7_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6457,8 +6148,7 @@ define void @v_shuffle_v4i64_v4i64__7_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6499,8 +6189,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6517,8 +6206,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6555,8 +6243,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -6576,8 +6263,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6614,8 +6300,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -6632,8 +6317,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -6673,8 +6357,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -6691,8 +6374,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -6738,10 +6420,8 @@ define void @v_shuffle_v4i64_v4i64__7_4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[10:17]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v18, v10
-; GFX90A-NEXT: v_mov_b32_e32 v19, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[18:19], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v20, v[16:19], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6758,10 +6438,8 @@ define void @v_shuffle_v4i64_v4i64__7_4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v18, v10
-; GFX942-NEXT: v_mov_b32_e32 v19, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v20, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v20, v[16:19], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6804,10 +6482,8 @@ define void @v_shuffle_v4i64_v4i64__7_5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v16, v10
-; GFX90A-NEXT: v_mov_b32_e32 v17, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6823,10 +6499,8 @@ define void @v_shuffle_v4i64_v4i64__7_5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v10
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v17, v11
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6869,10 +6543,8 @@ define void @v_shuffle_v4i64_v4i64__7_6_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v16, v12
-; GFX90A-NEXT: v_mov_b32_e32 v17, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6888,10 +6560,8 @@ define void @v_shuffle_v4i64_v4i64__7_6_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v12
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v17, v13
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6934,10 +6604,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6953,10 +6621,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6999,8 +6665,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7018,8 +6683,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7058,15 +6722,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v14
-; GFX90A-NEXT: v_mov_b32_e32 v11, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7078,15 +6740,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v14
-; GFX942-NEXT: v_mov_b32_e32 v11, v15
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7125,15 +6785,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v12
-; GFX90A-NEXT: v_mov_b32_e32 v11, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7145,15 +6803,13 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v12
-; GFX942-NEXT: v_mov_b32_e32 v11, v13
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7195,8 +6851,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7213,8 +6868,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7255,10 +6909,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7275,10 +6927,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7320,10 +6970,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7340,10 +6988,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7386,12 +7032,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7407,12 +7051,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7628,10 +7270,8 @@ define void @v_shuffle_v4i64_v4i64__5_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7644,10 +7284,8 @@ define void @v_shuffle_v4i64_v4i64__5_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7683,10 +7321,8 @@ define void @v_shuffle_v4i64_v4i64__6_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7699,10 +7335,8 @@ define void @v_shuffle_v4i64_v4i64__6_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7738,10 +7372,8 @@ define void @v_shuffle_v4i64_v4i64__7_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7754,10 +7386,8 @@ define void @v_shuffle_v4i64_v4i64__7_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7791,8 +7421,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7805,8 +7434,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7843,8 +7471,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -7860,8 +7487,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
@@ -7904,8 +7530,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7922,8 +7547,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v14, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7963,8 +7587,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7981,8 +7604,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8022,8 +7644,7 @@ define void @v_shuffle_v4i64_v4i64__7_3_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8040,8 +7661,7 @@ define void @v_shuffle_v4i64_v4i64__7_3_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8077,10 +7697,8 @@ define void @v_shuffle_v4i64_v4i64__7_5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8094,10 +7712,8 @@ define void @v_shuffle_v4i64_v4i64__7_5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8133,10 +7749,8 @@ define void @v_shuffle_v4i64_v4i64__7_6_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8149,10 +7763,8 @@ define void @v_shuffle_v4i64_v4i64__7_6_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8188,10 +7800,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8204,10 +7814,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8241,8 +7849,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8256,8 +7863,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v0, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8296,8 +7902,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8314,8 +7919,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8354,8 +7958,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8372,8 +7975,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8412,8 +8014,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8430,8 +8031,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8467,8 +8067,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -8488,8 +8087,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8524,10 +8122,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8540,10 +8136,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8579,10 +8173,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v6
-; GFX90A-NEXT: v_mov_b32_e32 v1, v7
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8596,10 +8188,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v6
-; GFX942-NEXT: v_mov_b32_e32 v1, v7
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8633,8 +8223,7 @@ define void @v_shuffle_v4i64_v4i64__u_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8647,8 +8236,7 @@ define void @v_shuffle_v4i64_v4i64__u_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8690,10 +8278,8 @@ define void @v_shuffle_v4i64_v4i64__0_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8710,10 +8296,8 @@ define void @v_shuffle_v4i64_v4i64__0_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8755,10 +8339,8 @@ define void @v_shuffle_v4i64_v4i64__1_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8775,10 +8357,8 @@ define void @v_shuffle_v4i64_v4i64__1_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8820,10 +8400,8 @@ define void @v_shuffle_v4i64_v4i64__2_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8840,10 +8418,8 @@ define void @v_shuffle_v4i64_v4i64__2_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8882,10 +8458,8 @@ define void @v_shuffle_v4i64_v4i64__3_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -8901,10 +8475,8 @@ define void @v_shuffle_v4i64_v4i64__3_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -8941,8 +8513,7 @@ define void @v_shuffle_v4i64_v4i64__4_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8955,8 +8526,7 @@ define void @v_shuffle_v4i64_v4i64__4_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8990,8 +8560,7 @@ define void @v_shuffle_v4i64_v4i64__5_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9004,8 +8573,7 @@ define void @v_shuffle_v4i64_v4i64__5_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9041,10 +8609,8 @@ define void @v_shuffle_v4i64_v4i64__6_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9057,10 +8623,8 @@ define void @v_shuffle_v4i64_v4i64__6_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9096,10 +8660,8 @@ define void @v_shuffle_v4i64_v4i64__7_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9112,10 +8674,8 @@ define void @v_shuffle_v4i64_v4i64__7_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9149,8 +8709,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9163,8 +8722,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9201,8 +8759,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -9218,8 +8775,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
@@ -9262,8 +8818,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9280,8 +8835,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9321,8 +8875,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9339,8 +8892,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9380,8 +8932,7 @@ define void @v_shuffle_v4i64_v4i64__7_3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9398,8 +8949,7 @@ define void @v_shuffle_v4i64_v4i64__7_3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9435,10 +8985,8 @@ define void @v_shuffle_v4i64_v4i64__7_4_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9451,10 +8999,8 @@ define void @v_shuffle_v4i64_v4i64__7_4_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9490,10 +9036,8 @@ define void @v_shuffle_v4i64_v4i64__7_6_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9506,10 +9050,8 @@ define void @v_shuffle_v4i64_v4i64__7_6_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9545,10 +9087,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9561,10 +9101,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9598,8 +9136,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9613,8 +9150,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9656,12 +9192,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9677,12 +9211,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9724,12 +9256,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9745,12 +9275,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9792,12 +9320,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9813,12 +9339,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9856,10 +9380,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -9875,10 +9397,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v18, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -9915,8 +9435,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9930,8 +9449,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9966,10 +9484,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9982,10 +9498,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10019,8 +9533,7 @@ define void @v_shuffle_v4i64_v4i64__u_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10033,8 +9546,7 @@ define void @v_shuffle_v4i64_v4i64__u_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10076,10 +9588,8 @@ define void @v_shuffle_v4i64_v4i64__0_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10096,10 +9606,8 @@ define void @v_shuffle_v4i64_v4i64__0_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10141,10 +9649,8 @@ define void @v_shuffle_v4i64_v4i64__1_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10161,10 +9667,8 @@ define void @v_shuffle_v4i64_v4i64__1_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10206,10 +9710,8 @@ define void @v_shuffle_v4i64_v4i64__2_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10226,10 +9728,8 @@ define void @v_shuffle_v4i64_v4i64__2_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10268,10 +9768,8 @@ define void @v_shuffle_v4i64_v4i64__3_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -10287,10 +9785,8 @@ define void @v_shuffle_v4i64_v4i64__3_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -10329,10 +9825,8 @@ define void @v_shuffle_v4i64_v4i64__4_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10345,10 +9839,8 @@ define void @v_shuffle_v4i64_v4i64__4_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10382,8 +9874,7 @@ define void @v_shuffle_v4i64_v4i64__5_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10396,8 +9887,7 @@ define void @v_shuffle_v4i64_v4i64__5_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10431,8 +9921,7 @@ define void @v_shuffle_v4i64_v4i64__6_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10445,8 +9934,7 @@ define void @v_shuffle_v4i64_v4i64__6_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10482,10 +9970,8 @@ define void @v_shuffle_v4i64_v4i64__7_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10498,10 +9984,8 @@ define void @v_shuffle_v4i64_v4i64__7_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10535,8 +10019,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10549,8 +10032,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10587,8 +10069,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -10604,8 +10085,7 @@ define void @v_shuffle_v4i64_v4i64__7_0_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
@@ -10648,8 +10128,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10666,8 +10145,7 @@ define void @v_shuffle_v4i64_v4i64__7_1_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10707,8 +10185,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10725,8 +10202,7 @@ define void @v_shuffle_v4i64_v4i64__7_2_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10766,8 +10242,7 @@ define void @v_shuffle_v4i64_v4i64__7_3_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10784,8 +10259,7 @@ define void @v_shuffle_v4i64_v4i64__7_3_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10821,10 +10295,8 @@ define void @v_shuffle_v4i64_v4i64__7_4_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10837,10 +10309,8 @@ define void @v_shuffle_v4i64_v4i64__7_4_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10879,12 +10349,9 @@ define void @v_shuffle_v4i64_v4i64__7_5_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
-; GFX90A-NEXT: v_mov_b32_e32 v14, v4
-; GFX90A-NEXT: v_mov_b32_e32 v15, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[12:15], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10898,12 +10365,9 @@ define void @v_shuffle_v4i64_v4i64__7_5_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
-; GFX942-NEXT: v_mov_b32_e32 v14, v4
-; GFX942-NEXT: v_mov_b32_e32 v15, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[12:15], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10939,10 +10403,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10955,10 +10417,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10992,8 +10452,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11007,8 +10466,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11050,12 +10508,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11071,12 +10527,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11118,12 +10572,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11139,12 +10591,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11186,12 +10636,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11207,12 +10655,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11250,10 +10696,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -11269,10 +10713,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v18, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -11311,10 +10753,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11327,10 +10767,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11364,8 +10802,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11379,8 +10816,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11413,8 +10849,7 @@ define void @v_shuffle_v4i64_v4i64__u_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11428,8 +10863,7 @@ define void @v_shuffle_v4i64_v4i64__u_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11471,10 +10905,8 @@ define void @v_shuffle_v4i64_v4i64__0_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11491,10 +10923,8 @@ define void @v_shuffle_v4i64_v4i64__0_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11536,10 +10966,8 @@ define void @v_shuffle_v4i64_v4i64__1_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11556,10 +10984,8 @@ define void @v_shuffle_v4i64_v4i64__1_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11601,10 +11027,8 @@ define void @v_shuffle_v4i64_v4i64__2_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11621,10 +11045,8 @@ define void @v_shuffle_v4i64_v4i64__2_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11662,10 +11084,8 @@ define void @v_shuffle_v4i64_v4i64__3_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -11681,10 +11101,8 @@ define void @v_shuffle_v4i64_v4i64__3_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v18, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -11723,10 +11141,8 @@ define void @v_shuffle_v4i64_v4i64__4_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11739,10 +11155,8 @@ define void @v_shuffle_v4i64_v4i64__4_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11778,10 +11192,8 @@ define void @v_shuffle_v4i64_v4i64__5_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11794,10 +11206,8 @@ define void @v_shuffle_v4i64_v4i64__5_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11831,8 +11241,7 @@ define void @v_shuffle_v4i64_v4i64__6_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11846,8 +11255,7 @@ define void @v_shuffle_v4i64_v4i64__6_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11881,8 +11289,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11896,8 +11303,7 @@ define void @v_shuffle_v4i64_v4i64__7_u_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11937,15 +11343,13 @@ define void @v_shuffle_v4i64_v4i64__7_0_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[10:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11961,12 +11365,10 @@ define void @v_shuffle_v4i64_v4i64__7_0_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12008,12 +11410,10 @@ define void @v_shuffle_v4i64_v4i64__7_1_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12029,12 +11429,10 @@ define void @v_shuffle_v4i64_v4i64__7_1_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12076,12 +11474,10 @@ define void @v_shuffle_v4i64_v4i64__7_2_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12097,12 +11493,10 @@ define void @v_shuffle_v4i64_v4i64__7_2_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12144,12 +11538,10 @@ define void @v_shuffle_v4i64_v4i64__7_3_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12165,12 +11557,10 @@ define void @v_shuffle_v4i64_v4i64__7_3_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12206,12 +11596,10 @@ define void @v_shuffle_v4i64_v4i64__7_4_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12224,12 +11612,10 @@ define void @v_shuffle_v4i64_v4i64__7_4_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12265,12 +11651,10 @@ define void @v_shuffle_v4i64_v4i64__7_5_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12283,12 +11667,10 @@ define void @v_shuffle_v4i64_v4i64__7_5_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12324,12 +11706,10 @@ define void @v_shuffle_v4i64_v4i64__7_6_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12342,12 +11722,10 @@ define void @v_shuffle_v4i64_v4i64__7_6_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12380,8 +11758,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -12395,8 +11772,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12438,12 +11814,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12459,12 +11833,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_0_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12506,12 +11878,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12527,12 +11897,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_1_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12574,12 +11942,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12595,12 +11961,10 @@ define void @v_shuffle_v4i64_v4i64__7_7_2_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12638,10 +12002,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -12657,10 +12019,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v18, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -12699,10 +12059,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -12715,10 +12073,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_4_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -12754,10 +12110,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -12770,10 +12124,8 @@ define void @v_shuffle_v4i64_v4i64__7_7_5_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -12807,8 +12159,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -12822,8 +12173,7 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
index 8ffb3615940bd..8be5eb3603fca 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
@@ -264,8 +264,7 @@ define void @v_shuffle_v4p0_v2p0__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -278,8 +277,7 @@ define void @v_shuffle_v4p0_v2p0__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -311,8 +309,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -325,8 +322,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -368,8 +364,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -386,8 +381,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -423,8 +417,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -444,8 +437,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -478,8 +470,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -493,8 +484,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -530,8 +520,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -545,8 +534,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -588,8 +576,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -606,8 +593,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -649,8 +635,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -668,8 +653,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -705,12 +689,10 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -723,12 +705,10 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -761,8 +741,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -776,8 +755,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -811,8 +789,7 @@ define void @v_shuffle_v4p0_v2p0__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -825,8 +802,7 @@ define void @v_shuffle_v4p0_v2p0__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -859,8 +835,7 @@ define void @v_shuffle_v4p0_v2p0__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v4, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -873,8 +848,7 @@ define void @v_shuffle_v4p0_v2p0__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v4, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -909,10 +883,8 @@ define void @v_shuffle_v4p0_v2p0__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -926,10 +898,8 @@ define void @v_shuffle_v4p0_v2p0__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -962,8 +932,7 @@ define void @v_shuffle_v4p0_v2p0__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -976,8 +945,7 @@ define void @v_shuffle_v4p0_v2p0__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1016,8 +984,7 @@ define void @v_shuffle_v4p0_v2p0__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1033,8 +1000,7 @@ define void @v_shuffle_v4p0_v2p0__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1074,8 +1040,7 @@ define void @v_shuffle_v4p0_v2p0__3_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1091,8 +1056,7 @@ define void @v_shuffle_v4p0_v2p0__3_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1131,10 +1095,8 @@ define void @v_shuffle_v4p0_v2p0__3_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:9]
; GFX90A-NEXT: ;;#ASMEND
@@ -1154,10 +1116,8 @@ define void @v_shuffle_v4p0_v2p0__3_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1197,15 +1157,13 @@ define void @v_shuffle_v4p0_v2p0__3_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1217,15 +1175,13 @@ define void @v_shuffle_v4p0_v2p0__3_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1264,15 +1220,13 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1284,15 +1238,13 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1331,8 +1283,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1349,8 +1300,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v0, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1391,10 +1341,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1410,10 +1358,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1455,10 +1401,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1475,10 +1419,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1512,8 +1454,7 @@ define void @v_shuffle_v4p0_v2p0__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1527,8 +1468,7 @@ define void @v_shuffle_v4p0_v2p0__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1561,8 +1501,7 @@ define void @v_shuffle_v4p0_v2p0__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1576,8 +1515,7 @@ define void @v_shuffle_v4p0_v2p0__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1610,8 +1548,7 @@ define void @v_shuffle_v4p0_v2p0__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1625,8 +1562,7 @@ define void @v_shuffle_v4p0_v2p0__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1659,8 +1595,7 @@ define void @v_shuffle_v4p0_v2p0__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1674,8 +1609,7 @@ define void @v_shuffle_v4p0_v2p0__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1714,8 +1648,7 @@ define void @v_shuffle_v4p0_v2p0__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1731,8 +1664,7 @@ define void @v_shuffle_v4p0_v2p0__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1772,8 +1704,7 @@ define void @v_shuffle_v4p0_v2p0__3_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1790,8 +1721,7 @@ define void @v_shuffle_v4p0_v2p0__3_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1828,8 +1758,7 @@ define void @v_shuffle_v4p0_v2p0__3_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -1849,8 +1778,7 @@ define void @v_shuffle_v4p0_v2p0__3_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1892,10 +1820,8 @@ define void @v_shuffle_v4p0_v2p0__3_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1912,10 +1838,8 @@ define void @v_shuffle_v4p0_v2p0__3_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1957,10 +1881,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1976,10 +1898,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2022,8 +1942,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2041,8 +1960,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2084,8 +2002,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2102,8 +2019,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2145,12 +2061,10 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2166,12 +2080,10 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2306,10 +2218,8 @@ define void @v_shuffle_v4p0_v2p0__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2323,10 +2233,8 @@ define void @v_shuffle_v4p0_v2p0__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2360,8 +2268,7 @@ define void @v_shuffle_v4p0_v2p0__3_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2375,8 +2282,7 @@ define void @v_shuffle_v4p0_v2p0__3_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2413,8 +2319,7 @@ define void @v_shuffle_v4p0_v2p0__3_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:9]
; GFX90A-NEXT: ;;#ASMEND
@@ -2434,8 +2339,7 @@ define void @v_shuffle_v4p0_v2p0__3_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2475,8 +2379,7 @@ define void @v_shuffle_v4p0_v2p0__3_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2493,8 +2396,7 @@ define void @v_shuffle_v4p0_v2p0__3_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2530,10 +2432,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2547,10 +2447,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2584,8 +2482,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2599,8 +2496,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v0, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2639,8 +2535,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2657,8 +2552,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2694,8 +2588,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -2715,8 +2608,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2749,8 +2641,7 @@ define void @v_shuffle_v4p0_v2p0__u_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2764,8 +2655,7 @@ define void @v_shuffle_v4p0_v2p0__u_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2807,10 +2697,8 @@ define void @v_shuffle_v4p0_v2p0__0_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2827,10 +2715,8 @@ define void @v_shuffle_v4p0_v2p0__0_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2869,10 +2755,8 @@ define void @v_shuffle_v4p0_v2p0__1_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -2888,10 +2772,8 @@ define void @v_shuffle_v4p0_v2p0__1_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
@@ -2928,8 +2810,7 @@ define void @v_shuffle_v4p0_v2p0__2_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2943,8 +2824,7 @@ define void @v_shuffle_v4p0_v2p0__2_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2978,8 +2858,7 @@ define void @v_shuffle_v4p0_v2p0__3_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2993,8 +2872,7 @@ define void @v_shuffle_v4p0_v2p0__3_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3034,15 +2912,13 @@ define void @v_shuffle_v4p0_v2p0__3_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3058,12 +2934,10 @@ define void @v_shuffle_v4p0_v2p0__3_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3105,12 +2979,10 @@ define void @v_shuffle_v4p0_v2p0__3_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3126,12 +2998,10 @@ define void @v_shuffle_v4p0_v2p0__3_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3167,12 +3037,10 @@ define void @v_shuffle_v4p0_v2p0__3_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3185,12 +3053,10 @@ define void @v_shuffle_v4p0_v2p0__3_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3223,8 +3089,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3238,8 +3103,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_u_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3281,12 +3145,10 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3302,12 +3164,10 @@ define void @v_shuffle_v4p0_v2p0__3_3_0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3345,10 +3205,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
@@ -3364,10 +3222,8 @@ define void @v_shuffle_v4p0_v2p0__3_3_1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
@@ -3404,8 +3260,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:3]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3419,8 +3274,7 @@ define void @v_shuffle_v4p0_v2p0__3_3_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:3]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
index 8ab9f381704e7..9ade811c7ef33 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
@@ -396,8 +396,7 @@ define void @v_shuffle_v4p0_v3p0__5_3_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -410,8 +409,7 @@ define void @v_shuffle_v4p0_v3p0__5_3_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -443,8 +441,7 @@ define void @v_shuffle_v4p0_v3p0__5_4_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -457,8 +454,7 @@ define void @v_shuffle_v4p0_v3p0__5_4_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -490,8 +486,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -504,8 +499,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -547,8 +541,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -565,8 +558,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -608,8 +600,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -626,8 +617,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -663,8 +653,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -684,8 +673,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -718,8 +706,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -733,8 +720,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -767,8 +753,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -782,8 +767,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -819,8 +803,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -834,8 +817,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -877,8 +859,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -895,8 +876,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -938,8 +918,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -957,8 +936,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1000,8 +978,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1019,8 +996,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1056,12 +1032,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1074,12 +1048,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1115,12 +1087,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1133,12 +1103,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1171,8 +1139,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1186,8 +1153,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1221,8 +1187,7 @@ define void @v_shuffle_v4p0_v3p0__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1235,8 +1200,7 @@ define void @v_shuffle_v4p0_v3p0__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1269,8 +1233,7 @@ define void @v_shuffle_v4p0_v3p0__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1283,8 +1246,7 @@ define void @v_shuffle_v4p0_v3p0__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1319,10 +1281,8 @@ define void @v_shuffle_v4p0_v3p0__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1335,10 +1295,8 @@ define void @v_shuffle_v4p0_v3p0__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1373,10 +1331,8 @@ define void @v_shuffle_v4p0_v3p0__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1389,10 +1345,8 @@ define void @v_shuffle_v4p0_v3p0__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1425,8 +1379,7 @@ define void @v_shuffle_v4p0_v3p0__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1439,8 +1392,7 @@ define void @v_shuffle_v4p0_v3p0__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1481,10 +1433,8 @@ define void @v_shuffle_v4p0_v3p0__4_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1501,10 +1451,8 @@ define void @v_shuffle_v4p0_v3p0__4_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1544,8 +1492,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1561,8 +1508,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1602,8 +1548,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1619,8 +1564,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1659,10 +1603,8 @@ define void @v_shuffle_v4p0_v3p0__5_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
@@ -1679,10 +1621,8 @@ define void @v_shuffle_v4p0_v3p0__5_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
@@ -1725,15 +1665,13 @@ define void @v_shuffle_v4p0_v3p0__5_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1745,15 +1683,13 @@ define void @v_shuffle_v4p0_v3p0__5_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1792,15 +1728,13 @@ define void @v_shuffle_v4p0_v3p0__5_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1812,15 +1746,13 @@ define void @v_shuffle_v4p0_v3p0__5_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1859,15 +1791,13 @@ define void @v_shuffle_v4p0_v3p0__5_4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1879,15 +1809,13 @@ define void @v_shuffle_v4p0_v3p0__5_4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1926,15 +1854,13 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1946,15 +1872,13 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1993,8 +1917,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2011,8 +1934,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v0, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2053,10 +1975,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2072,10 +1992,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2117,10 +2035,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2136,10 +2052,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2181,10 +2095,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2200,10 +2112,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2245,10 +2155,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v6
-; GFX90A-NEXT: v_mov_b32_e32 v1, v7
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2265,10 +2173,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v6
-; GFX942-NEXT: v_mov_b32_e32 v1, v7
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2302,8 +2208,7 @@ define void @v_shuffle_v4p0_v3p0__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2316,8 +2221,7 @@ define void @v_shuffle_v4p0_v3p0__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2350,8 +2254,7 @@ define void @v_shuffle_v4p0_v3p0__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2364,8 +2267,7 @@ define void @v_shuffle_v4p0_v3p0__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2398,8 +2300,7 @@ define void @v_shuffle_v4p0_v3p0__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2412,8 +2313,7 @@ define void @v_shuffle_v4p0_v3p0__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2448,10 +2348,8 @@ define void @v_shuffle_v4p0_v3p0__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2464,10 +2362,8 @@ define void @v_shuffle_v4p0_v3p0__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2500,8 +2396,7 @@ define void @v_shuffle_v4p0_v3p0__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2514,8 +2409,7 @@ define void @v_shuffle_v4p0_v3p0__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2556,10 +2450,8 @@ define void @v_shuffle_v4p0_v3p0__4_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2576,10 +2468,8 @@ define void @v_shuffle_v4p0_v3p0__4_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2619,8 +2509,7 @@ define void @v_shuffle_v4p0_v3p0__5_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2636,8 +2525,7 @@ define void @v_shuffle_v4p0_v3p0__5_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2677,8 +2565,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2694,8 +2581,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2732,8 +2618,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -2749,8 +2634,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -2793,15 +2677,13 @@ define void @v_shuffle_v4p0_v3p0__5_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2813,15 +2695,13 @@ define void @v_shuffle_v4p0_v3p0__5_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2860,15 +2740,13 @@ define void @v_shuffle_v4p0_v3p0__5_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2880,15 +2758,13 @@ define void @v_shuffle_v4p0_v3p0__5_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2927,15 +2803,13 @@ define void @v_shuffle_v4p0_v3p0__5_4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2947,15 +2821,13 @@ define void @v_shuffle_v4p0_v3p0__5_4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2994,15 +2866,13 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3014,15 +2884,13 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3064,8 +2932,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3083,8 +2950,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3126,8 +2992,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3144,8 +3009,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3186,10 +3050,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3205,10 +3067,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3250,10 +3110,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3270,10 +3128,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3316,12 +3172,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3337,12 +3191,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3375,8 +3227,7 @@ define void @v_shuffle_v4p0_v3p0__u_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3390,8 +3241,7 @@ define void @v_shuffle_v4p0_v3p0__u_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3426,10 +3276,8 @@ define void @v_shuffle_v4p0_v3p0__0_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3442,10 +3290,8 @@ define void @v_shuffle_v4p0_v3p0__0_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3478,8 +3324,7 @@ define void @v_shuffle_v4p0_v3p0__1_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3493,8 +3338,7 @@ define void @v_shuffle_v4p0_v3p0__1_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3527,8 +3371,7 @@ define void @v_shuffle_v4p0_v3p0__2_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3542,8 +3385,7 @@ define void @v_shuffle_v4p0_v3p0__2_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3576,8 +3418,7 @@ define void @v_shuffle_v4p0_v3p0__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3591,8 +3432,7 @@ define void @v_shuffle_v4p0_v3p0__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3633,10 +3473,8 @@ define void @v_shuffle_v4p0_v3p0__4_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3653,10 +3491,8 @@ define void @v_shuffle_v4p0_v3p0__4_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3696,8 +3532,7 @@ define void @v_shuffle_v4p0_v3p0__5_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3713,8 +3548,7 @@ define void @v_shuffle_v4p0_v3p0__5_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3754,8 +3588,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3772,8 +3605,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3810,8 +3642,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -3831,8 +3662,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3869,8 +3699,7 @@ define void @v_shuffle_v4p0_v3p0__5_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -3887,8 +3716,7 @@ define void @v_shuffle_v4p0_v3p0__5_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -3933,10 +3761,8 @@ define void @v_shuffle_v4p0_v3p0__5_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:13]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v14, v8
-; GFX90A-NEXT: v_mov_b32_e32 v15, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3953,10 +3779,8 @@ define void @v_shuffle_v4p0_v3p0__5_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v14, v8
-; GFX942-NEXT: v_mov_b32_e32 v15, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3998,10 +3822,8 @@ define void @v_shuffle_v4p0_v3p0__5_4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v12, v8
-; GFX90A-NEXT: v_mov_b32_e32 v13, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4017,10 +3839,8 @@ define void @v_shuffle_v4p0_v3p0__5_4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v8
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v13, v9
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4062,10 +3882,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4081,10 +3899,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4127,8 +3943,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4146,8 +3961,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4186,15 +4000,13 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4206,15 +4018,13 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4256,8 +4066,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4274,8 +4083,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4316,10 +4124,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4336,10 +4142,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4382,12 +4186,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4403,12 +4205,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4585,10 +4385,8 @@ define void @v_shuffle_v4p0_v3p0__4_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4601,10 +4399,8 @@ define void @v_shuffle_v4p0_v3p0__4_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4640,10 +4436,8 @@ define void @v_shuffle_v4p0_v3p0__5_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4656,10 +4450,8 @@ define void @v_shuffle_v4p0_v3p0__5_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4693,8 +4485,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4707,8 +4498,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4745,8 +4535,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
@@ -4762,8 +4551,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
@@ -4806,8 +4594,7 @@ define void @v_shuffle_v4p0_v3p0__5_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4824,8 +4611,7 @@ define void @v_shuffle_v4p0_v3p0__5_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4865,8 +4651,7 @@ define void @v_shuffle_v4p0_v3p0__5_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4883,8 +4668,7 @@ define void @v_shuffle_v4p0_v3p0__5_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4920,10 +4704,8 @@ define void @v_shuffle_v4p0_v3p0__5_4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4937,10 +4719,8 @@ define void @v_shuffle_v4p0_v3p0__5_4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4976,10 +4756,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4992,10 +4770,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5029,8 +4805,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5044,8 +4819,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v0, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5084,8 +4858,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5102,8 +4875,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5142,8 +4914,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5160,8 +4931,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5197,8 +4967,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -5218,8 +4987,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5254,10 +5022,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5271,10 +5037,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5308,8 +5072,7 @@ define void @v_shuffle_v4p0_v3p0__u_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5322,8 +5085,7 @@ define void @v_shuffle_v4p0_v3p0__u_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5365,10 +5127,8 @@ define void @v_shuffle_v4p0_v3p0__0_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5385,10 +5145,8 @@ define void @v_shuffle_v4p0_v3p0__0_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5430,10 +5188,8 @@ define void @v_shuffle_v4p0_v3p0__1_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5450,10 +5206,8 @@ define void @v_shuffle_v4p0_v3p0__1_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5492,10 +5246,8 @@ define void @v_shuffle_v4p0_v3p0__2_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -5511,10 +5263,8 @@ define void @v_shuffle_v4p0_v3p0__2_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -5551,8 +5301,7 @@ define void @v_shuffle_v4p0_v3p0__3_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5565,8 +5314,7 @@ define void @v_shuffle_v4p0_v3p0__3_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5600,8 +5348,7 @@ define void @v_shuffle_v4p0_v3p0__4_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5614,8 +5361,7 @@ define void @v_shuffle_v4p0_v3p0__4_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5651,10 +5397,8 @@ define void @v_shuffle_v4p0_v3p0__5_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5667,10 +5411,8 @@ define void @v_shuffle_v4p0_v3p0__5_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5704,8 +5446,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v6, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5718,8 +5459,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v6, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5756,8 +5496,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
@@ -5773,8 +5512,7 @@ define void @v_shuffle_v4p0_v3p0__5_0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
@@ -5817,8 +5555,7 @@ define void @v_shuffle_v4p0_v3p0__5_1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5835,8 +5572,7 @@ define void @v_shuffle_v4p0_v3p0__5_1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5876,8 +5612,7 @@ define void @v_shuffle_v4p0_v3p0__5_2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5894,8 +5629,7 @@ define void @v_shuffle_v4p0_v3p0__5_2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5934,12 +5668,9 @@ define void @v_shuffle_v4p0_v3p0__5_3_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
-; GFX90A-NEXT: v_mov_b32_e32 v12, v2
-; GFX90A-NEXT: v_mov_b32_e32 v13, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[10:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5953,12 +5684,9 @@ define void @v_shuffle_v4p0_v3p0__5_3_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
-; GFX942-NEXT: v_mov_b32_e32 v12, v2
-; GFX942-NEXT: v_mov_b32_e32 v13, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5994,10 +5722,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6010,10 +5736,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6047,8 +5771,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6062,8 +5785,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6105,12 +5827,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6126,12 +5846,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6173,12 +5891,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6194,12 +5910,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6237,10 +5951,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -6256,10 +5968,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -6296,8 +6006,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6311,8 +6020,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6345,8 +6053,7 @@ define void @v_shuffle_v4p0_v3p0__u_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6360,8 +6067,7 @@ define void @v_shuffle_v4p0_v3p0__u_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6403,10 +6109,8 @@ define void @v_shuffle_v4p0_v3p0__0_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6423,10 +6127,8 @@ define void @v_shuffle_v4p0_v3p0__0_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6468,10 +6170,8 @@ define void @v_shuffle_v4p0_v3p0__1_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6488,10 +6188,8 @@ define void @v_shuffle_v4p0_v3p0__1_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6530,10 +6228,8 @@ define void @v_shuffle_v4p0_v3p0__2_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -6549,10 +6245,8 @@ define void @v_shuffle_v4p0_v3p0__2_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -6591,10 +6285,8 @@ define void @v_shuffle_v4p0_v3p0__3_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6607,10 +6299,8 @@ define void @v_shuffle_v4p0_v3p0__3_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6644,8 +6334,7 @@ define void @v_shuffle_v4p0_v3p0__4_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6659,8 +6348,7 @@ define void @v_shuffle_v4p0_v3p0__4_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6694,8 +6382,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6709,8 +6396,7 @@ define void @v_shuffle_v4p0_v3p0__5_u_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6750,15 +6436,13 @@ define void @v_shuffle_v4p0_v3p0__5_0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6774,12 +6458,10 @@ define void @v_shuffle_v4p0_v3p0__5_0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6821,12 +6503,10 @@ define void @v_shuffle_v4p0_v3p0__5_1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6842,12 +6522,10 @@ define void @v_shuffle_v4p0_v3p0__5_1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6889,12 +6567,10 @@ define void @v_shuffle_v4p0_v3p0__5_2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6910,12 +6586,10 @@ define void @v_shuffle_v4p0_v3p0__5_2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6951,12 +6625,10 @@ define void @v_shuffle_v4p0_v3p0__5_3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -6969,12 +6641,10 @@ define void @v_shuffle_v4p0_v3p0__5_3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7010,12 +6680,10 @@ define void @v_shuffle_v4p0_v3p0__5_4_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7028,12 +6696,10 @@ define void @v_shuffle_v4p0_v3p0__5_4_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7066,8 +6732,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7081,8 +6746,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_u_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7124,12 +6788,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7145,12 +6807,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7192,12 +6852,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7213,12 +6871,10 @@ define void @v_shuffle_v4p0_v3p0__5_5_1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7256,10 +6912,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
@@ -7275,10 +6929,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
@@ -7317,10 +6969,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7333,10 +6983,8 @@ define void @v_shuffle_v4p0_v3p0__5_5_3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7370,8 +7018,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:5]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7385,8 +7032,7 @@ define void @v_shuffle_v4p0_v3p0__5_5_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:5]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
index 3e354c8006fd3..29ff0c02f641a 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
@@ -525,8 +525,7 @@ define void @v_shuffle_v4p0_v4p0__7_4_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -539,8 +538,7 @@ define void @v_shuffle_v4p0_v4p0__7_4_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -572,8 +570,7 @@ define void @v_shuffle_v4p0_v4p0__7_5_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -586,8 +583,7 @@ define void @v_shuffle_v4p0_v4p0__7_5_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -619,8 +615,7 @@ define void @v_shuffle_v4p0_v4p0__7_6_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -633,8 +628,7 @@ define void @v_shuffle_v4p0_v4p0__7_6_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -666,8 +660,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -680,8 +673,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -723,8 +715,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -741,8 +732,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -784,8 +774,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -802,8 +791,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -845,8 +833,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -863,8 +850,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -901,8 +887,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -922,8 +907,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -956,8 +940,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -971,8 +954,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1005,8 +987,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1020,8 +1001,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1054,8 +1034,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1069,8 +1048,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1106,8 +1084,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1121,8 +1098,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1164,8 +1140,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1182,8 +1157,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1225,8 +1199,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1244,8 +1217,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1287,8 +1259,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1306,8 +1277,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1349,8 +1319,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1368,8 +1337,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1405,12 +1373,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1423,12 +1389,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1464,12 +1428,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1482,12 +1444,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1523,12 +1483,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -1541,12 +1499,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -1579,8 +1535,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1594,8 +1549,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1629,8 +1583,7 @@ define void @v_shuffle_v4p0_v4p0__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1643,8 +1596,7 @@ define void @v_shuffle_v4p0_v4p0__u_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1677,8 +1629,7 @@ define void @v_shuffle_v4p0_v4p0__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1691,8 +1642,7 @@ define void @v_shuffle_v4p0_v4p0__0_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1727,10 +1677,8 @@ define void @v_shuffle_v4p0_v4p0__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1743,10 +1691,8 @@ define void @v_shuffle_v4p0_v4p0__1_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1781,10 +1727,8 @@ define void @v_shuffle_v4p0_v4p0__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1797,10 +1741,8 @@ define void @v_shuffle_v4p0_v4p0__2_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1835,10 +1777,8 @@ define void @v_shuffle_v4p0_v4p0__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1851,10 +1791,8 @@ define void @v_shuffle_v4p0_v4p0__3_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1887,8 +1825,7 @@ define void @v_shuffle_v4p0_v4p0__4_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1901,8 +1838,7 @@ define void @v_shuffle_v4p0_v4p0__4_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v0, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1943,10 +1879,8 @@ define void @v_shuffle_v4p0_v4p0__5_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -1963,10 +1897,8 @@ define void @v_shuffle_v4p0_v4p0__5_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2008,10 +1940,8 @@ define void @v_shuffle_v4p0_v4p0__6_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2028,10 +1958,8 @@ define void @v_shuffle_v4p0_v4p0__6_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2071,8 +1999,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2088,8 +2015,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2129,8 +2055,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2146,8 +2071,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2187,10 +2111,8 @@ define void @v_shuffle_v4p0_v4p0__7_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v14, v4
-; GFX90A-NEXT: v_mov_b32_e32 v15, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
@@ -2207,10 +2129,8 @@ define void @v_shuffle_v4p0_v4p0__7_1_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v14, v4
-; GFX942-NEXT: v_mov_b32_e32 v15, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
@@ -2253,15 +2173,13 @@ define void @v_shuffle_v4p0_v4p0__7_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2273,15 +2191,13 @@ define void @v_shuffle_v4p0_v4p0__7_2_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2320,15 +2236,13 @@ define void @v_shuffle_v4p0_v4p0__7_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2340,15 +2254,13 @@ define void @v_shuffle_v4p0_v4p0__7_3_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2387,15 +2299,13 @@ define void @v_shuffle_v4p0_v4p0__7_4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2407,15 +2317,13 @@ define void @v_shuffle_v4p0_v4p0__7_4_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2454,15 +2362,13 @@ define void @v_shuffle_v4p0_v4p0__7_5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2474,15 +2380,13 @@ define void @v_shuffle_v4p0_v4p0__7_5_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2521,15 +2425,13 @@ define void @v_shuffle_v4p0_v4p0__7_6_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2541,15 +2443,13 @@ define void @v_shuffle_v4p0_v4p0__7_6_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2588,15 +2488,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -2608,15 +2506,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2656,8 +2552,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2674,8 +2569,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v0, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -2716,10 +2610,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v8
-; GFX90A-NEXT: v_mov_b32_e32 v13, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2735,10 +2627,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v8
-; GFX942-NEXT: v_mov_b32_e32 v13, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2780,10 +2670,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v8
-; GFX90A-NEXT: v_mov_b32_e32 v15, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2799,10 +2687,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v14, v8
-; GFX942-NEXT: v_mov_b32_e32 v15, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2845,10 +2731,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2864,10 +2748,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2909,10 +2791,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2928,10 +2808,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2973,10 +2851,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -2992,10 +2868,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3037,10 +2911,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v8
-; GFX90A-NEXT: v_mov_b32_e32 v1, v9
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3057,10 +2929,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_0(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v8
-; GFX942-NEXT: v_mov_b32_e32 v1, v9
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3094,8 +2964,7 @@ define void @v_shuffle_v4p0_v4p0__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3108,8 +2977,7 @@ define void @v_shuffle_v4p0_v4p0__u_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3142,8 +3010,7 @@ define void @v_shuffle_v4p0_v4p0__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3156,8 +3023,7 @@ define void @v_shuffle_v4p0_v4p0__0_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3190,8 +3056,7 @@ define void @v_shuffle_v4p0_v4p0__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3204,8 +3069,7 @@ define void @v_shuffle_v4p0_v4p0__1_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3240,10 +3104,8 @@ define void @v_shuffle_v4p0_v4p0__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3256,10 +3118,8 @@ define void @v_shuffle_v4p0_v4p0__2_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3294,10 +3154,8 @@ define void @v_shuffle_v4p0_v4p0__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3310,10 +3168,8 @@ define void @v_shuffle_v4p0_v4p0__3_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3346,8 +3202,7 @@ define void @v_shuffle_v4p0_v4p0__4_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3360,8 +3215,7 @@ define void @v_shuffle_v4p0_v4p0__4_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3402,10 +3256,8 @@ define void @v_shuffle_v4p0_v4p0__5_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3422,10 +3274,8 @@ define void @v_shuffle_v4p0_v4p0__5_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3467,10 +3317,8 @@ define void @v_shuffle_v4p0_v4p0__6_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3487,10 +3335,8 @@ define void @v_shuffle_v4p0_v4p0__6_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3530,8 +3376,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3547,8 +3392,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3588,8 +3432,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -3605,8 +3448,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -3643,8 +3485,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -3660,8 +3501,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -3704,15 +3544,13 @@ define void @v_shuffle_v4p0_v4p0__7_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3724,15 +3562,13 @@ define void @v_shuffle_v4p0_v4p0__7_2_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3771,15 +3607,13 @@ define void @v_shuffle_v4p0_v4p0__7_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3791,15 +3625,13 @@ define void @v_shuffle_v4p0_v4p0__7_3_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3838,15 +3670,13 @@ define void @v_shuffle_v4p0_v4p0__7_4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3858,15 +3688,13 @@ define void @v_shuffle_v4p0_v4p0__7_4_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3905,15 +3733,13 @@ define void @v_shuffle_v4p0_v4p0__7_5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3925,15 +3751,13 @@ define void @v_shuffle_v4p0_v4p0__7_5_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -3972,15 +3796,13 @@ define void @v_shuffle_v4p0_v4p0__7_6_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -3992,15 +3814,13 @@ define void @v_shuffle_v4p0_v4p0__7_6_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4039,15 +3859,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4059,15 +3877,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4109,8 +3925,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4128,8 +3943,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4171,8 +3985,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4189,8 +4002,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4231,10 +4043,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v8
-; GFX90A-NEXT: v_mov_b32_e32 v13, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4250,10 +4060,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v12, v8
-; GFX942-NEXT: v_mov_b32_e32 v13, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4296,10 +4104,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4315,10 +4121,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4360,10 +4164,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4380,10 +4182,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4425,10 +4225,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4445,10 +4243,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4491,12 +4287,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -4512,12 +4306,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_1(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -4550,8 +4342,7 @@ define void @v_shuffle_v4p0_v4p0__u_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4564,8 +4355,7 @@ define void @v_shuffle_v4p0_v4p0__u_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4600,10 +4390,8 @@ define void @v_shuffle_v4p0_v4p0__0_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4616,10 +4404,8 @@ define void @v_shuffle_v4p0_v4p0__0_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4652,8 +4438,7 @@ define void @v_shuffle_v4p0_v4p0__1_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4666,8 +4451,7 @@ define void @v_shuffle_v4p0_v4p0__1_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4700,8 +4484,7 @@ define void @v_shuffle_v4p0_v4p0__2_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4714,8 +4497,7 @@ define void @v_shuffle_v4p0_v4p0__2_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4750,10 +4532,8 @@ define void @v_shuffle_v4p0_v4p0__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4766,10 +4546,8 @@ define void @v_shuffle_v4p0_v4p0__3_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4802,8 +4580,7 @@ define void @v_shuffle_v4p0_v4p0__4_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4816,8 +4593,7 @@ define void @v_shuffle_v4p0_v4p0__4_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4858,10 +4634,8 @@ define void @v_shuffle_v4p0_v4p0__5_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4878,10 +4652,8 @@ define void @v_shuffle_v4p0_v4p0__5_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4923,10 +4695,8 @@ define void @v_shuffle_v4p0_v4p0__6_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -4943,10 +4713,8 @@ define void @v_shuffle_v4p0_v4p0__6_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -4986,8 +4754,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5003,8 +4770,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5044,8 +4810,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5061,8 +4826,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5099,8 +4863,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -5116,8 +4879,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -5157,8 +4919,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -5174,8 +4935,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -5218,15 +4978,13 @@ define void @v_shuffle_v4p0_v4p0__7_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5238,15 +4996,13 @@ define void @v_shuffle_v4p0_v4p0__7_3_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5285,15 +5041,13 @@ define void @v_shuffle_v4p0_v4p0__7_4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5305,15 +5059,13 @@ define void @v_shuffle_v4p0_v4p0__7_4_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5352,15 +5104,13 @@ define void @v_shuffle_v4p0_v4p0__7_5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5372,15 +5122,13 @@ define void @v_shuffle_v4p0_v4p0__7_5_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5419,15 +5167,13 @@ define void @v_shuffle_v4p0_v4p0__7_6_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5439,15 +5185,13 @@ define void @v_shuffle_v4p0_v4p0__7_6_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5486,15 +5230,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5506,15 +5248,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v12, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5556,8 +5296,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5575,8 +5314,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5615,15 +5353,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v12
-; GFX90A-NEXT: v_mov_b32_e32 v11, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5635,15 +5371,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v12
-; GFX942-NEXT: v_mov_b32_e32 v11, v13
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5685,8 +5419,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5703,8 +5436,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -5746,10 +5478,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5765,10 +5495,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5810,10 +5538,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5830,10 +5556,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5875,10 +5599,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -5895,10 +5617,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -5941,12 +5661,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5962,12 +5680,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_2(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -6000,8 +5716,7 @@ define void @v_shuffle_v4p0_v4p0__u_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6015,8 +5730,7 @@ define void @v_shuffle_v4p0_v4p0__u_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6051,10 +5765,8 @@ define void @v_shuffle_v4p0_v4p0__0_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6067,10 +5779,8 @@ define void @v_shuffle_v4p0_v4p0__0_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6105,10 +5815,8 @@ define void @v_shuffle_v4p0_v4p0__1_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6121,10 +5829,8 @@ define void @v_shuffle_v4p0_v4p0__1_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6157,8 +5863,7 @@ define void @v_shuffle_v4p0_v4p0__2_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6172,8 +5877,7 @@ define void @v_shuffle_v4p0_v4p0__2_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6206,8 +5910,7 @@ define void @v_shuffle_v4p0_v4p0__3_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6221,8 +5924,7 @@ define void @v_shuffle_v4p0_v4p0__3_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6255,8 +5957,7 @@ define void @v_shuffle_v4p0_v4p0__4_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6270,8 +5971,7 @@ define void @v_shuffle_v4p0_v4p0__4_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6312,10 +6012,8 @@ define void @v_shuffle_v4p0_v4p0__5_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6332,10 +6030,8 @@ define void @v_shuffle_v4p0_v4p0__5_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6377,10 +6073,8 @@ define void @v_shuffle_v4p0_v4p0__6_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v14, v6
-; GFX90A-NEXT: v_mov_b32_e32 v15, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6397,10 +6091,8 @@ define void @v_shuffle_v4p0_v4p0__6_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v14, v6
-; GFX942-NEXT: v_mov_b32_e32 v15, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6440,8 +6132,7 @@ define void @v_shuffle_v4p0_v4p0__7_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6457,8 +6148,7 @@ define void @v_shuffle_v4p0_v4p0__7_3_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6499,8 +6189,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6517,8 +6206,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6555,8 +6243,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -6576,8 +6263,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6614,8 +6300,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -6632,8 +6317,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -6673,8 +6357,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -6691,8 +6374,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -6738,10 +6420,8 @@ define void @v_shuffle_v4p0_v4p0__7_4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[10:17]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v18, v10
-; GFX90A-NEXT: v_mov_b32_e32 v19, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[18:19], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v20, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v20, v[16:19], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6758,10 +6438,8 @@ define void @v_shuffle_v4p0_v4p0__7_4_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v18, v10
-; GFX942-NEXT: v_mov_b32_e32 v19, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v20, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v20, v[16:19], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6804,10 +6482,8 @@ define void @v_shuffle_v4p0_v4p0__7_5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v16, v10
-; GFX90A-NEXT: v_mov_b32_e32 v17, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6823,10 +6499,8 @@ define void @v_shuffle_v4p0_v4p0__7_5_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v10
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v17, v11
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6869,10 +6543,8 @@ define void @v_shuffle_v4p0_v4p0__7_6_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v16, v12
-; GFX90A-NEXT: v_mov_b32_e32 v17, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6888,10 +6560,8 @@ define void @v_shuffle_v4p0_v4p0__7_6_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v12
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v17, v13
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6934,10 +6604,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -6953,10 +6621,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -6999,8 +6665,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7018,8 +6683,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7058,15 +6722,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v14
-; GFX90A-NEXT: v_mov_b32_e32 v11, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7078,15 +6740,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v14
-; GFX942-NEXT: v_mov_b32_e32 v11, v15
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7125,15 +6785,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v12
-; GFX90A-NEXT: v_mov_b32_e32 v11, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7145,15 +6803,13 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v14, 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v12
-; GFX942-NEXT: v_mov_b32_e32 v11, v13
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7195,8 +6851,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7213,8 +6868,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7255,10 +6909,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v8
-; GFX90A-NEXT: v_mov_b32_e32 v3, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7275,10 +6927,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v8
-; GFX942-NEXT: v_mov_b32_e32 v3, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7320,10 +6970,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7340,10 +6988,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7386,12 +7032,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -7407,12 +7051,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_3(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -7628,10 +7270,8 @@ define void @v_shuffle_v4p0_v4p0__5_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7644,10 +7284,8 @@ define void @v_shuffle_v4p0_v4p0__5_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7683,10 +7321,8 @@ define void @v_shuffle_v4p0_v4p0__6_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v6, v0
-; GFX90A-NEXT: v_mov_b32_e32 v7, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7699,10 +7335,8 @@ define void @v_shuffle_v4p0_v4p0__6_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v6, v0
-; GFX942-NEXT: v_mov_b32_e32 v7, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7738,10 +7372,8 @@ define void @v_shuffle_v4p0_v4p0__7_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7754,10 +7386,8 @@ define void @v_shuffle_v4p0_v4p0__7_4_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7791,8 +7421,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7805,8 +7434,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7843,8 +7471,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -7860,8 +7487,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
@@ -7904,8 +7530,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7922,8 +7547,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v14, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -7963,8 +7587,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -7981,8 +7604,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8022,8 +7644,7 @@ define void @v_shuffle_v4p0_v4p0__7_3_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8040,8 +7661,7 @@ define void @v_shuffle_v4p0_v4p0__7_3_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8077,10 +7697,8 @@ define void @v_shuffle_v4p0_v4p0__7_5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8094,10 +7712,8 @@ define void @v_shuffle_v4p0_v4p0__7_5_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8133,10 +7749,8 @@ define void @v_shuffle_v4p0_v4p0__7_6_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8149,10 +7763,8 @@ define void @v_shuffle_v4p0_v4p0__7_6_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8188,10 +7800,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v0
-; GFX90A-NEXT: v_mov_b32_e32 v3, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8204,10 +7814,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v0
-; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8241,8 +7849,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8256,8 +7863,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v0, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v0, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8296,8 +7902,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8314,8 +7919,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8354,8 +7958,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8372,8 +7975,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v14, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8412,8 +8014,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8430,8 +8031,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
; GFX942-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8467,8 +8067,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -8488,8 +8087,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -8524,10 +8122,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8540,10 +8136,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8579,10 +8173,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v0, v6
-; GFX90A-NEXT: v_mov_b32_e32 v1, v7
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8596,10 +8188,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v6
-; GFX942-NEXT: v_mov_b32_e32 v1, v7
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8633,8 +8223,7 @@ define void @v_shuffle_v4p0_v4p0__u_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8647,8 +8236,7 @@ define void @v_shuffle_v4p0_v4p0__u_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8690,10 +8278,8 @@ define void @v_shuffle_v4p0_v4p0__0_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8710,10 +8296,8 @@ define void @v_shuffle_v4p0_v4p0__0_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8755,10 +8339,8 @@ define void @v_shuffle_v4p0_v4p0__1_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8775,10 +8357,8 @@ define void @v_shuffle_v4p0_v4p0__1_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8820,10 +8400,8 @@ define void @v_shuffle_v4p0_v4p0__2_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
-; GFX90A-NEXT: v_mov_b32_e32 v6, v8
-; GFX90A-NEXT: v_mov_b32_e32 v7, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8840,10 +8418,8 @@ define void @v_shuffle_v4p0_v4p0__2_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
-; GFX942-NEXT: v_mov_b32_e32 v6, v8
-; GFX942-NEXT: v_mov_b32_e32 v7, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8882,10 +8458,8 @@ define void @v_shuffle_v4p0_v4p0__3_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -8901,10 +8475,8 @@ define void @v_shuffle_v4p0_v4p0__3_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -8941,8 +8513,7 @@ define void @v_shuffle_v4p0_v4p0__4_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -8955,8 +8526,7 @@ define void @v_shuffle_v4p0_v4p0__4_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -8990,8 +8560,7 @@ define void @v_shuffle_v4p0_v4p0__5_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9004,8 +8573,7 @@ define void @v_shuffle_v4p0_v4p0__5_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9041,10 +8609,8 @@ define void @v_shuffle_v4p0_v4p0__6_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v6, v2
-; GFX90A-NEXT: v_mov_b32_e32 v7, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9057,10 +8623,8 @@ define void @v_shuffle_v4p0_v4p0__6_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v6, v2
-; GFX942-NEXT: v_mov_b32_e32 v7, v3
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9096,10 +8660,8 @@ define void @v_shuffle_v4p0_v4p0__7_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9112,10 +8674,8 @@ define void @v_shuffle_v4p0_v4p0__7_5_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9149,8 +8709,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9163,8 +8722,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9201,8 +8759,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -9218,8 +8775,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
@@ -9262,8 +8818,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9280,8 +8835,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9321,8 +8875,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9339,8 +8892,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9380,8 +8932,7 @@ define void @v_shuffle_v4p0_v4p0__7_3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9398,8 +8949,7 @@ define void @v_shuffle_v4p0_v4p0__7_3_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9435,10 +8985,8 @@ define void @v_shuffle_v4p0_v4p0__7_4_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9451,10 +8999,8 @@ define void @v_shuffle_v4p0_v4p0__7_4_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9490,10 +9036,8 @@ define void @v_shuffle_v4p0_v4p0__7_6_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v2
-; GFX90A-NEXT: v_mov_b32_e32 v1, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9506,10 +9050,8 @@ define void @v_shuffle_v4p0_v4p0__7_6_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v2
-; GFX942-NEXT: v_mov_b32_e32 v1, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9545,10 +9087,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v2
-; GFX90A-NEXT: v_mov_b32_e32 v5, v3
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9561,10 +9101,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v2
-; GFX942-NEXT: v_mov_b32_e32 v5, v3
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -9598,8 +9136,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9613,8 +9150,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9656,12 +9192,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9677,12 +9211,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9724,12 +9256,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9745,12 +9275,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9792,12 +9320,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v2
-; GFX90A-NEXT: v_mov_b32_e32 v11, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -9813,12 +9339,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v2
-; GFX942-NEXT: v_mov_b32_e32 v11, v3
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9856,10 +9380,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -9875,10 +9397,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v18, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -9915,8 +9435,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9930,8 +9449,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -9966,10 +9484,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v0, v4
-; GFX90A-NEXT: v_mov_b32_e32 v1, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[0:1], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -9982,10 +9498,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v0, v4
-; GFX942-NEXT: v_mov_b32_e32 v1, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10019,8 +9533,7 @@ define void @v_shuffle_v4p0_v4p0__u_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10033,8 +9546,7 @@ define void @v_shuffle_v4p0_v4p0__u_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10076,10 +9588,8 @@ define void @v_shuffle_v4p0_v4p0__0_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[2:9]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10096,10 +9606,8 @@ define void @v_shuffle_v4p0_v4p0__0_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[2:9]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10141,10 +9649,8 @@ define void @v_shuffle_v4p0_v4p0__1_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[4:11]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v10, v8
-; GFX90A-NEXT: v_mov_b32_e32 v11, v9
-; GFX90A-NEXT: v_mov_b32_e32 v4, v8
-; GFX90A-NEXT: v_mov_b32_e32 v5, v9
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[8:9], v[8:9] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10161,10 +9667,8 @@ define void @v_shuffle_v4p0_v4p0__1_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[4:11]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v8
-; GFX942-NEXT: v_mov_b32_e32 v11, v9
-; GFX942-NEXT: v_mov_b32_e32 v4, v8
-; GFX942-NEXT: v_mov_b32_e32 v5, v9
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[8:9]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10206,10 +9710,8 @@ define void @v_shuffle_v4p0_v4p0__2_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[6:13]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v12, v10
-; GFX90A-NEXT: v_mov_b32_e32 v13, v11
-; GFX90A-NEXT: v_mov_b32_e32 v6, v10
-; GFX90A-NEXT: v_mov_b32_e32 v7, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[10:11], v[10:11] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10226,10 +9728,8 @@ define void @v_shuffle_v4p0_v4p0__2_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[6:13]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v10
-; GFX942-NEXT: v_mov_b32_e32 v13, v11
-; GFX942-NEXT: v_mov_b32_e32 v6, v10
-; GFX942-NEXT: v_mov_b32_e32 v7, v11
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10268,10 +9768,8 @@ define void @v_shuffle_v4p0_v4p0__3_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v14, v12
-; GFX90A-NEXT: v_mov_b32_e32 v15, v13
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[12:13], v[12:13] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -10287,10 +9785,8 @@ define void @v_shuffle_v4p0_v4p0__3_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v14, v12
-; GFX942-NEXT: v_mov_b32_e32 v15, v13
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -10329,10 +9825,8 @@ define void @v_shuffle_v4p0_v4p0__4_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10345,10 +9839,8 @@ define void @v_shuffle_v4p0_v4p0__4_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10382,8 +9874,7 @@ define void @v_shuffle_v4p0_v4p0__5_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10396,8 +9887,7 @@ define void @v_shuffle_v4p0_v4p0__5_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10431,8 +9921,7 @@ define void @v_shuffle_v4p0_v4p0__6_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v6, v4
-; GFX90A-NEXT: v_mov_b32_e32 v7, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[6:7], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10445,8 +9934,7 @@ define void @v_shuffle_v4p0_v4p0__6_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v6, v4
-; GFX942-NEXT: v_mov_b32_e32 v7, v5
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10482,10 +9970,8 @@ define void @v_shuffle_v4p0_v4p0__7_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10498,10 +9984,8 @@ define void @v_shuffle_v4p0_v4p0__7_6_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10535,8 +10019,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v8, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v8, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v8, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10549,8 +10032,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v8, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v8, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v8, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10587,8 +10069,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v16, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
@@ -10604,8 +10085,7 @@ define void @v_shuffle_v4p0_v4p0__7_0_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v16, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
@@ -10648,8 +10128,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v14, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10666,8 +10145,7 @@ define void @v_shuffle_v4p0_v4p0__7_1_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10707,8 +10185,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v12, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10725,8 +10202,7 @@ define void @v_shuffle_v4p0_v4p0__7_2_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10766,8 +10242,7 @@ define void @v_shuffle_v4p0_v4p0__7_3_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10784,8 +10259,7 @@ define void @v_shuffle_v4p0_v4p0__7_3_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10821,10 +10295,8 @@ define void @v_shuffle_v4p0_v4p0__7_4_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10837,10 +10309,8 @@ define void @v_shuffle_v4p0_v4p0__7_4_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10879,12 +10349,9 @@ define void @v_shuffle_v4p0_v4p0__7_5_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v12, v4
-; GFX90A-NEXT: v_mov_b32_e32 v13, v5
-; GFX90A-NEXT: v_mov_b32_e32 v14, v4
-; GFX90A-NEXT: v_mov_b32_e32 v15, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[14:15], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[12:15], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10898,12 +10365,9 @@ define void @v_shuffle_v4p0_v4p0__7_5_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v12, v4
-; GFX942-NEXT: v_mov_b32_e32 v13, v5
-; GFX942-NEXT: v_mov_b32_e32 v14, v4
-; GFX942-NEXT: v_mov_b32_e32 v15, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[12:15], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10939,10 +10403,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -10955,10 +10417,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -10992,8 +10452,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11007,8 +10466,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11050,12 +10508,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11071,12 +10527,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11118,12 +10572,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11139,12 +10591,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11186,12 +10636,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v4
-; GFX90A-NEXT: v_mov_b32_e32 v11, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11207,12 +10655,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v4
-; GFX942-NEXT: v_mov_b32_e32 v11, v5
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11250,10 +10696,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v12
-; GFX90A-NEXT: v_mov_b32_e32 v9, v13
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -11269,10 +10713,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v18, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v12
-; GFX942-NEXT: v_mov_b32_e32 v9, v13
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -11311,10 +10753,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v4
-; GFX90A-NEXT: v_mov_b32_e32 v3, v5
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[4:5], v[4:5] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11327,10 +10767,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v4
-; GFX942-NEXT: v_mov_b32_e32 v3, v5
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11364,8 +10802,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_6(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11379,8 +10816,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_6(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -11413,8 +10849,7 @@ define void @v_shuffle_v4p0_v4p0__u_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11428,8 +10863,7 @@ define void @v_shuffle_v4p0_v4p0__u_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11471,10 +10905,8 @@ define void @v_shuffle_v4p0_v4p0__0_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v18, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11491,10 +10923,8 @@ define void @v_shuffle_v4p0_v4p0__0_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v18, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11536,10 +10966,8 @@ define void @v_shuffle_v4p0_v4p0__1_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v16, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11556,10 +10984,8 @@ define void @v_shuffle_v4p0_v4p0__1_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v16, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11601,10 +11027,8 @@ define void @v_shuffle_v4p0_v4p0__2_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v12, v6
-; GFX90A-NEXT: v_mov_b32_e32 v13, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[12:13], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11621,10 +11045,8 @@ define void @v_shuffle_v4p0_v4p0__2_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v12, v6
-; GFX942-NEXT: v_mov_b32_e32 v13, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v14, v[10:13], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11662,10 +11084,8 @@ define void @v_shuffle_v4p0_v4p0__3_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -11681,10 +11101,8 @@ define void @v_shuffle_v4p0_v4p0__3_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v18, 0
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -11723,10 +11141,8 @@ define void @v_shuffle_v4p0_v4p0__4_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11739,10 +11155,8 @@ define void @v_shuffle_v4p0_v4p0__4_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11778,10 +11192,8 @@ define void @v_shuffle_v4p0_v4p0__5_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11794,10 +11206,8 @@ define void @v_shuffle_v4p0_v4p0__5_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11831,8 +11241,7 @@ define void @v_shuffle_v4p0_v4p0__6_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11846,8 +11255,7 @@ define void @v_shuffle_v4p0_v4p0__6_7_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11881,8 +11289,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -11896,8 +11303,7 @@ define void @v_shuffle_v4p0_v4p0__7_u_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -11937,15 +11343,13 @@ define void @v_shuffle_v4p0_v4p0__7_0_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[10:17]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -11961,12 +11365,10 @@ define void @v_shuffle_v4p0_v4p0__7_0_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[10:17]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12008,12 +11410,10 @@ define void @v_shuffle_v4p0_v4p0__7_1_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12029,12 +11429,10 @@ define void @v_shuffle_v4p0_v4p0__7_1_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12076,12 +11474,10 @@ define void @v_shuffle_v4p0_v4p0__7_2_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12097,12 +11493,10 @@ define void @v_shuffle_v4p0_v4p0__7_2_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12144,12 +11538,10 @@ define void @v_shuffle_v4p0_v4p0__7_3_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v10
-; GFX90A-NEXT: v_mov_b32_e32 v9, v11
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12165,12 +11557,10 @@ define void @v_shuffle_v4p0_v4p0__7_3_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v10
-; GFX942-NEXT: v_mov_b32_e32 v9, v11
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[10:11]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12206,12 +11596,10 @@ define void @v_shuffle_v4p0_v4p0__7_4_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v0
-; GFX90A-NEXT: v_mov_b32_e32 v9, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12224,12 +11612,10 @@ define void @v_shuffle_v4p0_v4p0__7_4_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v0
-; GFX942-NEXT: v_mov_b32_e32 v9, v1
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12265,12 +11651,10 @@ define void @v_shuffle_v4p0_v4p0__7_5_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v2
-; GFX90A-NEXT: v_mov_b32_e32 v9, v3
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12283,12 +11667,10 @@ define void @v_shuffle_v4p0_v4p0__7_5_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v2
-; GFX942-NEXT: v_mov_b32_e32 v9, v3
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[2:3]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12324,12 +11706,10 @@ define void @v_shuffle_v4p0_v4p0__7_6_7_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v4
-; GFX90A-NEXT: v_mov_b32_e32 v9, v5
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[4:5], v[4:5] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12342,12 +11722,10 @@ define void @v_shuffle_v4p0_v4p0__7_6_7_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v4
-; GFX942-NEXT: v_mov_b32_e32 v9, v5
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[4:5]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12380,8 +11758,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -12395,8 +11772,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12438,12 +11814,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12459,12 +11833,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_0_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v16, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12506,12 +11878,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v14, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12527,12 +11897,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_1_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v14, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12574,12 +11942,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v10, v6
-; GFX90A-NEXT: v_mov_b32_e32 v11, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[8:11], s[16:17] offset:16
; GFX90A-NEXT: s_nop 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v12, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -12595,12 +11961,10 @@ define void @v_shuffle_v4p0_v4p0__7_7_2_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v10, v6
-; GFX942-NEXT: v_mov_b32_e32 v11, v7
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GFX942-NEXT: s_nop 1
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v12, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
@@ -12638,10 +12002,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[8:15]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v18, 0
-; GFX90A-NEXT: v_mov_b32_e32 v8, v14
-; GFX90A-NEXT: v_mov_b32_e32 v9, v15
-; GFX90A-NEXT: v_mov_b32_e32 v16, v14
-; GFX90A-NEXT: v_mov_b32_e32 v17, v15
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[14:15], v[14:15] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[16:17], v[14:15], v[14:15] op_sel:[0,1]
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
@@ -12657,10 +12019,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[8:15]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v18, 0
-; GFX942-NEXT: v_mov_b32_e32 v8, v14
-; GFX942-NEXT: v_mov_b32_e32 v9, v15
-; GFX942-NEXT: v_mov_b32_e32 v16, v14
-; GFX942-NEXT: v_mov_b32_e32 v17, v15
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[14:15]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], v[14:15]
; GFX942-NEXT: ;;#ASMSTART
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
@@ -12699,10 +12059,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v2, v6
-; GFX90A-NEXT: v_mov_b32_e32 v3, v7
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -12715,10 +12073,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_4_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v2, v6
-; GFX942-NEXT: v_mov_b32_e32 v3, v7
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -12754,10 +12110,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v10, 0
-; GFX90A-NEXT: v_mov_b32_e32 v4, v6
-; GFX90A-NEXT: v_mov_b32_e32 v5, v7
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[6:7], v[6:7] op_sel:[0,1]
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[2:5], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -12770,10 +12124,8 @@ define void @v_shuffle_v4p0_v4p0__7_7_5_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v10, 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v6
-; GFX942-NEXT: v_mov_b32_e32 v5, v7
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[2:5], s[0:1] offset:16
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -12807,8 +12159,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:7]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v8, v6
-; GFX90A-NEXT: v_mov_b32_e32 v9, v7
+; GFX90A-NEXT: v_pk_mov_b32 v[8:9], v[6:7], v[6:7] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v10, v[4:7], s[16:17] offset:16
; GFX90A-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
@@ -12822,8 +12173,7 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_7(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:7]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
-; GFX942-NEXT: v_mov_b32_e32 v8, v6
-; GFX942-NEXT: v_mov_b32_e32 v9, v7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], v[6:7]
; GFX942-NEXT: global_store_dwordx4 v10, v[6:9], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
index 1cf5c6cd3f286..ad82344589767 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
@@ -272,8 +272,7 @@ define void @v_shuffle_v4p3_v2p3__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMSTART
; GFX90A-NEXT: ; def v[0:1]
; GFX90A-NEXT: ;;#ASMEND
-; GFX90A-NEXT: v_mov_b32_e32 v4, v1
-; GFX90A-NEXT: v_mov_b32_e32 v5, v0
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX90A-NEXT: global_store_dwordx4 v2, v[4:7], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -286,8 +285,7 @@ define void @v_shuffle_v4p3_v2p3__3_2_u_u(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ; def v[0:1]
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
-; GFX942-NEXT: v_mov_b32_e32 v4, v1
-; GFX942-NEXT: v_mov_b32_e32 v5, v0
+; GFX942-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[1,0]
; GFX942-NEXT: global_store_dwordx4 v2, v[4:7], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
index 3253b4914420f..1a042bfcf25fe 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
@@ -5708,8 +5708,7 @@ define void @v_shuffle_v4p3_v3p3__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ; def v[0:2]
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v3, v2
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -5723,8 +5722,7 @@ define void @v_shuffle_v4p3_v3p3__5_5_3_4(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: s_nop 0
; GFX942-NEXT: v_mov_b32_e32 v3, v2
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
index 9672a7d0c0e8e..8cc28a7a4b880 100644
--- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
@@ -8880,8 +8880,7 @@ define void @v_shuffle_v4p3_v4p3__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX90A-NEXT: ;;#ASMEND
; GFX90A-NEXT: v_mov_b32_e32 v6, 0
; GFX90A-NEXT: v_mov_b32_e32 v2, v3
-; GFX90A-NEXT: v_mov_b32_e32 v4, v0
-; GFX90A-NEXT: v_mov_b32_e32 v5, v1
+; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[0:1], v[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx4 v6, v[2:5], s[16:17]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: s_setpc_b64 s[30:31]
@@ -8894,8 +8893,7 @@ define void @v_shuffle_v4p3_v4p3__7_7_4_5(ptr addrspace(1) inreg %ptr) {
; GFX942-NEXT: ;;#ASMEND
; GFX942-NEXT: v_mov_b32_e32 v6, 0
; GFX942-NEXT: v_mov_b32_e32 v2, v3
-; GFX942-NEXT: v_mov_b32_e32 v4, v0
-; GFX942-NEXT: v_mov_b32_e32 v5, v1
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX942-NEXT: global_store_dwordx4 v6, v[2:5], s[0:1]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll b/llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
index 41ffd01fc7e23..f47534d225c94 100644
--- a/llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
+++ b/llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
@@ -15,10 +15,8 @@ define protected amdgpu_kernel void @test(ptr addrspace(1) %in, ptr addrspace(1)
; GFX942-NEXT: v_mov_b64_e32 v[12:13], v[2:3]
; GFX942-NEXT: v_mov_b64_e32 v[10:11], v[0:1]
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v8, s4
-; GFX942-NEXT: v_mov_b32_e32 v9, s5
-; GFX942-NEXT: v_mov_b32_e32 v4, s6
-; GFX942-NEXT: v_mov_b32_e32 v5, s7
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[6:7]
; GFX942-NEXT: v_mov_b32_e32 v6, s7
; GFX942-NEXT: v_mov_b32_e32 v7, s7
; GFX942-NEXT: s_nop 1
diff --git a/llvm/test/CodeGen/AMDGPU/swdev373493.ll b/llvm/test/CodeGen/AMDGPU/swdev373493.ll
index c1e83e6f05624..65fbe49f1cd89 100644
--- a/llvm/test/CodeGen/AMDGPU/swdev373493.ll
+++ b/llvm/test/CodeGen/AMDGPU/swdev373493.ll
@@ -40,16 +40,11 @@ define hidden fastcc void @bar(i32 %arg, ptr %arg1, ptr %arg2, ptr %arg3, ptr %a
; CHECK-NEXT: s_add_u32 s16, s16, quux at rel32@lo+4
; CHECK-NEXT: s_addc_u32 s17, s17, quux at rel32@hi+12
; CHECK-NEXT: v_mov_b32_e32 v1, v2
-; CHECK-NEXT: v_mov_b32_e32 v2, v6
-; CHECK-NEXT: v_mov_b32_e32 v3, v7
-; CHECK-NEXT: v_mov_b32_e32 v4, v8
-; CHECK-NEXT: v_mov_b32_e32 v5, v9
-; CHECK-NEXT: v_mov_b32_e32 v6, v10
-; CHECK-NEXT: v_mov_b32_e32 v7, v11
-; CHECK-NEXT: v_mov_b32_e32 v8, v12
-; CHECK-NEXT: v_mov_b32_e32 v9, v13
-; CHECK-NEXT: v_mov_b32_e32 v10, v14
-; CHECK-NEXT: v_mov_b32_e32 v11, v15
+; CHECK-NEXT: v_pk_mov_b32 v[2:3], v[6:7], v[6:7] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[4:5], v[8:9], v[8:9] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[6:7], v[10:11], v[10:11] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[8:9], v[12:13], v[12:13] op_sel:[0,1]
+; CHECK-NEXT: v_pk_mov_b32 v[10:11], v[14:15], v[14:15] op_sel:[0,1]
; CHECK-NEXT: s_setpc_b64 s[16:17]
; CHECK-NEXT: .LBB0_5: ; %bb9
; CHECK-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
index 1d495f5a7f01c..784fa79c7d6d7 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
@@ -2496,8 +2496,7 @@ define i64 @test_vector_reduce_mul_v2i64(<2 x i64> %v) {
; GFX9-GISEL-LABEL: test_vector_reduce_mul_v2i64:
; GFX9-GISEL: ; %bb.0: ; %entry
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v0
-; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, v1
+; GFX9-GISEL-NEXT: v_mov_b64_e32 v[4:5], v[0:1]
; GFX9-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[0:1], v4, v3, 0
; GFX9-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v4, v2, 0
; GFX9-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[0:1], v5, v2, v[6:7]
diff --git a/llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll b/llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
index 6bf6d540299f1..4b43229a9f890 100644
--- a/llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
@@ -120,8 +120,7 @@ define <4 x half> @shuffle_v4f16_u3u1(ptr addrspace(1) %arg0, ptr addrspace(1) %
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-NEXT: global_load_dwordx2 v[2:3], v[0:1], off
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_u3u1:
@@ -468,16 +467,25 @@ define <4 x half> @shuffle_v4f16_0123(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v4f16_0145(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4f16_0145:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off
-; GFX9-NEXT: global_load_dword v5, v[2:3], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4f16_0145:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off
+; GX900-NEXT: global_load_dword v5, v[2:3], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4f16_0145:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off
+; GFX942-NEXT: global_load_dword v5, v[2:3], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_0145:
; GFX10: ; %bb.0:
@@ -504,16 +512,25 @@ define <4 x half> @shuffle_v4f16_0145(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v4f16_0167(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4f16_0167:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off
-; GFX9-NEXT: global_load_dword v5, v[2:3], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4f16_0167:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off
+; GX900-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4f16_0167:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off
+; GFX942-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_0167:
; GFX10: ; %bb.0:
@@ -553,8 +570,7 @@ define <4 x half> @shuffle_v4f16_2301(ptr addrspace(1) %arg0, ptr addrspace(1) %
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-NEXT: global_load_dwordx2 v[2:3], v[0:1], off
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_2301:
@@ -609,16 +625,25 @@ define <4 x half> @shuffle_v4f16_2323(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v4f16_2345(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4f16_2345:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[2:3], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4f16_2345:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off offset:4
+; GX900-NEXT: global_load_dword v5, v[2:3], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4f16_2345:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[2:3], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_2345:
; GFX10: ; %bb.0:
@@ -645,16 +670,25 @@ define <4 x half> @shuffle_v4f16_2345(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v4f16_2367(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4f16_2367:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[2:3], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4f16_2367:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off offset:4
+; GX900-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4f16_2367:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_2367:
; GFX10: ; %bb.0:
@@ -681,16 +715,25 @@ define <4 x half> @shuffle_v4f16_2367(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v4f16_4501(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4f16_4501:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off
-; GFX9-NEXT: global_load_dword v5, v[0:1], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4f16_4501:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off
+; GX900-NEXT: global_load_dword v5, v[0:1], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4f16_4501:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off
+; GFX942-NEXT: global_load_dword v5, v[0:1], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_4501:
; GFX10: ; %bb.0:
@@ -719,16 +762,25 @@ define <4 x half> @shuffle_v4f16_4501(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v4f16_4523(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4f16_4523:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off
-; GFX9-NEXT: global_load_dword v5, v[0:1], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4f16_4523:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off
+; GX900-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4f16_4523:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off
+; GFX942-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_4523:
; GFX10: ; %bb.0:
@@ -814,16 +866,25 @@ define <4 x half> @shuffle_v4f16_4567(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v4f16_6701(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4f16_6701:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[0:1], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4f16_6701:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GX900-NEXT: global_load_dword v5, v[0:1], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4f16_6701:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[0:1], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_6701:
; GFX10: ; %bb.0:
@@ -852,16 +913,25 @@ define <4 x half> @shuffle_v4f16_6701(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v4f16_6723(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4f16_6723:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[0:1], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4f16_6723:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GX900-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4f16_6723:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_6723:
; GFX10: ; %bb.0:
@@ -903,8 +973,7 @@ define <4 x half> @shuffle_v4f16_6745(ptr addrspace(1) %arg0, ptr addrspace(1) %
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4f16_6745:
@@ -1309,16 +1378,25 @@ define <4 x i16> @shuffle_v4i16_2356(ptr addrspace(1) %arg0, ptr addrspace(1) %a
}
define <4 x i16> @shuffle_v4i16_0167(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4i16_0167:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off
-; GFX9-NEXT: global_load_dword v5, v[2:3], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4i16_0167:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off
+; GX900-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4i16_0167:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off
+; GFX942-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4i16_0167:
; GFX10: ; %bb.0:
@@ -1716,16 +1794,25 @@ define <4 x half> @shuffle_v8f16_0123(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v8f16_4589(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v8f16_4589:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:8
-; GFX9-NEXT: global_load_dword v5, v[2:3], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v8f16_4589:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off offset:8
+; GX900-NEXT: global_load_dword v5, v[2:3], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v8f16_4589:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off offset:8
+; GFX942-NEXT: global_load_dword v5, v[2:3], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v8f16_4589:
; GFX10: ; %bb.0:
@@ -1752,16 +1839,25 @@ define <4 x half> @shuffle_v8f16_4589(ptr addrspace(1) %arg0, ptr addrspace(1) %
}
define <4 x half> @shuffle_v8f16_10_11_2_3(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v8f16_10_11_2_3:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[0:1], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v8f16_10_11_2_3:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GX900-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v8f16_10_11_2_3:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v8f16_10_11_2_3:
; GFX10: ; %bb.0:
@@ -3410,8 +3506,7 @@ define <4 x bfloat> @shuffle_v4bf16_u3u1(ptr addrspace(1) %arg0, ptr addrspace(1
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-NEXT: global_load_dwordx2 v[2:3], v[0:1], off
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_u3u1:
@@ -3758,16 +3853,25 @@ define <4 x bfloat> @shuffle_v4bf16_0123(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v4bf16_0145(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4bf16_0145:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off
-; GFX9-NEXT: global_load_dword v5, v[2:3], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4bf16_0145:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off
+; GX900-NEXT: global_load_dword v5, v[2:3], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4bf16_0145:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off
+; GFX942-NEXT: global_load_dword v5, v[2:3], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_0145:
; GFX10: ; %bb.0:
@@ -3794,16 +3898,25 @@ define <4 x bfloat> @shuffle_v4bf16_0145(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v4bf16_0167(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4bf16_0167:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off
-; GFX9-NEXT: global_load_dword v5, v[2:3], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4bf16_0167:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off
+; GX900-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4bf16_0167:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off
+; GFX942-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_0167:
; GFX10: ; %bb.0:
@@ -3843,8 +3956,7 @@ define <4 x bfloat> @shuffle_v4bf16_2301(ptr addrspace(1) %arg0, ptr addrspace(1
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-NEXT: global_load_dwordx2 v[2:3], v[0:1], off
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_2301:
@@ -3899,16 +4011,25 @@ define <4 x bfloat> @shuffle_v4bf16_2323(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v4bf16_2345(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4bf16_2345:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[2:3], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4bf16_2345:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off offset:4
+; GX900-NEXT: global_load_dword v5, v[2:3], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4bf16_2345:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[2:3], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_2345:
; GFX10: ; %bb.0:
@@ -3935,16 +4056,25 @@ define <4 x bfloat> @shuffle_v4bf16_2345(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v4bf16_2367(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4bf16_2367:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[2:3], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4bf16_2367:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off offset:4
+; GX900-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4bf16_2367:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[2:3], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_2367:
; GFX10: ; %bb.0:
@@ -3971,16 +4101,25 @@ define <4 x bfloat> @shuffle_v4bf16_2367(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v4bf16_4501(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4bf16_4501:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off
-; GFX9-NEXT: global_load_dword v5, v[0:1], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4bf16_4501:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off
+; GX900-NEXT: global_load_dword v5, v[0:1], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4bf16_4501:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off
+; GFX942-NEXT: global_load_dword v5, v[0:1], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_4501:
; GFX10: ; %bb.0:
@@ -4009,16 +4148,25 @@ define <4 x bfloat> @shuffle_v4bf16_4501(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v4bf16_4523(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4bf16_4523:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off
-; GFX9-NEXT: global_load_dword v5, v[0:1], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4bf16_4523:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off
+; GX900-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4bf16_4523:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off
+; GFX942-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_4523:
; GFX10: ; %bb.0:
@@ -4104,16 +4252,25 @@ define <4 x bfloat> @shuffle_v4bf16_4567(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v4bf16_6701(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4bf16_6701:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[0:1], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4bf16_6701:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GX900-NEXT: global_load_dword v5, v[0:1], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4bf16_6701:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[0:1], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_6701:
; GFX10: ; %bb.0:
@@ -4142,16 +4299,25 @@ define <4 x bfloat> @shuffle_v4bf16_6701(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v4bf16_6723(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v4bf16_6723:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[0:1], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v4bf16_6723:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GX900-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v4bf16_6723:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_6723:
; GFX10: ; %bb.0:
@@ -4193,8 +4359,7 @@ define <4 x bfloat> @shuffle_v4bf16_6745(ptr addrspace(1) %arg0, ptr addrspace(1
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX942-NEXT: s_waitcnt vmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, v3
-; GFX942-NEXT: v_mov_b32_e32 v1, v2
+; GFX942-NEXT: v_pk_mov_b32 v[0:1], v[2:3], v[2:3] op_sel:[1,0]
; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v4bf16_6745:
@@ -4910,16 +5075,25 @@ define <4 x bfloat> @shuffle_v8bf16_0123(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v8bf16_4589(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v8bf16_4589:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:8
-; GFX9-NEXT: global_load_dword v5, v[2:3], off
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v8bf16_4589:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[0:1], off offset:8
+; GX900-NEXT: global_load_dword v5, v[2:3], off
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v8bf16_4589:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[0:1], off offset:8
+; GFX942-NEXT: global_load_dword v5, v[2:3], off
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v8bf16_4589:
; GFX10: ; %bb.0:
@@ -4946,16 +5120,25 @@ define <4 x bfloat> @shuffle_v8bf16_4589(ptr addrspace(1) %arg0, ptr addrspace(1
}
define <4 x bfloat> @shuffle_v8bf16_10_11_2_3(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
-; GFX9-LABEL: shuffle_v8bf16_10_11_2_3:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: global_load_dword v4, v[2:3], off offset:4
-; GFX9-NEXT: global_load_dword v5, v[0:1], off offset:4
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_mov_b32_e32 v0, v4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_mov_b32_e32 v1, v5
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GX900-LABEL: shuffle_v8bf16_10_11_2_3:
+; GX900: ; %bb.0:
+; GX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GX900-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GX900-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GX900-NEXT: s_waitcnt vmcnt(1)
+; GX900-NEXT: v_mov_b32_e32 v0, v4
+; GX900-NEXT: s_waitcnt vmcnt(0)
+; GX900-NEXT: v_mov_b32_e32 v1, v5
+; GX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX942-LABEL: shuffle_v8bf16_10_11_2_3:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: global_load_dword v4, v[2:3], off offset:4
+; GFX942-NEXT: global_load_dword v5, v[0:1], off offset:4
+; GFX942-NEXT: s_waitcnt vmcnt(0)
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], v[4:5]
+; GFX942-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: shuffle_v8bf16_10_11_2_3:
; GFX10: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll b/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
index 20789232b1f25..661dd222d1fc5 100644
--- a/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
+++ b/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
@@ -576,11 +576,9 @@ define amdgpu_kernel void @v8i8_phi_const(ptr addrspace(1) %src1, ptr addrspace(
; GFX942-NEXT: global_store_dwordx2 v4, v[2:3], s[12:13]
; GFX942-NEXT: v_mov_b32_e32 v2, v0
; GFX942-NEXT: v_mov_b32_e32 v11, v10
-; GFX942-NEXT: v_mov_b32_e32 v12, v9
-; GFX942-NEXT: v_mov_b32_e32 v13, v8
+; GFX942-NEXT: v_pk_mov_b32 v[12:13], v[8:9], v[8:9] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v3, v1
-; GFX942-NEXT: v_mov_b32_e32 v14, v7
-; GFX942-NEXT: v_mov_b32_e32 v15, v6
+; GFX942-NEXT: v_pk_mov_b32 v[14:15], v[6:7], v[6:7] op_sel:[1,0]
; GFX942-NEXT: v_mov_b32_e32 v16, v5
; GFX942-NEXT: .LBB10_4: ; %bb.3
; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]
@@ -928,38 +926,22 @@ define amdgpu_kernel void @v8i8_mfma_half(ptr addrspace(1) %src1, ptr addrspace(
; GFX942-NEXT: s_load_dwordx16 s[16:31], s[42:43], 0x0
; GFX942-NEXT: s_load_dwordx16 s[0:15], s[42:43], 0x40
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-NEXT: v_mov_b32_e32 v0, s16
-; GFX942-NEXT: v_mov_b32_e32 v1, s17
-; GFX942-NEXT: v_mov_b32_e32 v2, s18
-; GFX942-NEXT: v_mov_b32_e32 v3, s19
-; GFX942-NEXT: v_mov_b32_e32 v4, s20
-; GFX942-NEXT: v_mov_b32_e32 v5, s21
-; GFX942-NEXT: v_mov_b32_e32 v6, s22
-; GFX942-NEXT: v_mov_b32_e32 v7, s23
-; GFX942-NEXT: v_mov_b32_e32 v8, s24
-; GFX942-NEXT: v_mov_b32_e32 v9, s25
-; GFX942-NEXT: v_mov_b32_e32 v10, s26
-; GFX942-NEXT: v_mov_b32_e32 v11, s27
-; GFX942-NEXT: v_mov_b32_e32 v12, s28
-; GFX942-NEXT: v_mov_b32_e32 v13, s29
-; GFX942-NEXT: v_mov_b32_e32 v14, s30
-; GFX942-NEXT: v_mov_b32_e32 v15, s31
-; GFX942-NEXT: v_mov_b32_e32 v16, s0
-; GFX942-NEXT: v_mov_b32_e32 v17, s1
-; GFX942-NEXT: v_mov_b32_e32 v18, s2
-; GFX942-NEXT: v_mov_b32_e32 v19, s3
-; GFX942-NEXT: v_mov_b32_e32 v20, s4
-; GFX942-NEXT: v_mov_b32_e32 v21, s5
-; GFX942-NEXT: v_mov_b32_e32 v22, s6
-; GFX942-NEXT: v_mov_b32_e32 v23, s7
-; GFX942-NEXT: v_mov_b32_e32 v24, s8
-; GFX942-NEXT: v_mov_b32_e32 v25, s9
-; GFX942-NEXT: v_mov_b32_e32 v26, s10
-; GFX942-NEXT: v_mov_b32_e32 v27, s11
-; GFX942-NEXT: v_mov_b32_e32 v28, s12
-; GFX942-NEXT: v_mov_b32_e32 v29, s13
-; GFX942-NEXT: v_mov_b32_e32 v30, s14
-; GFX942-NEXT: v_mov_b32_e32 v31, s15
+; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[16:17]
+; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[18:19]
+; GFX942-NEXT: v_mov_b64_e32 v[4:5], s[20:21]
+; GFX942-NEXT: v_mov_b64_e32 v[6:7], s[22:23]
+; GFX942-NEXT: v_mov_b64_e32 v[8:9], s[24:25]
+; GFX942-NEXT: v_mov_b64_e32 v[10:11], s[26:27]
+; GFX942-NEXT: v_mov_b64_e32 v[12:13], s[28:29]
+; GFX942-NEXT: v_mov_b64_e32 v[14:15], s[30:31]
+; GFX942-NEXT: v_mov_b64_e32 v[16:17], s[0:1]
+; GFX942-NEXT: v_mov_b64_e32 v[18:19], s[2:3]
+; GFX942-NEXT: v_mov_b64_e32 v[20:21], s[4:5]
+; GFX942-NEXT: v_mov_b64_e32 v[22:23], s[6:7]
+; GFX942-NEXT: v_mov_b64_e32 v[24:25], s[8:9]
+; GFX942-NEXT: v_mov_b64_e32 v[26:27], s[10:11]
+; GFX942-NEXT: v_mov_b64_e32 v[28:29], s[12:13]
+; GFX942-NEXT: v_mov_b64_e32 v[30:31], s[14:15]
; GFX942-NEXT: s_waitcnt vmcnt(0)
; GFX942-NEXT: s_nop 0
; GFX942-NEXT: v_mfma_f32_32x32x4_2b_f16 v[0:31], v[34:35], v[34:35], v[0:31] cbsz:1 abid:2 blgp:3
>From 350ed94dd30c6b7a0c22b2d4ba606917aebdf6b5 Mon Sep 17 00:00:00 2001
From: Steffen Holst Larsen <sholstla at amd.com>
Date: Wed, 22 Apr 2026 05:23:24 -0500
Subject: [PATCH 2/4] Refactor and allow odd-aligned when supported
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
---
llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp | 69 +++++-----
.../test/CodeGen/AMDGPU/merge-vgpr-copies.mir | 128 ++++++++++++++++++
2 files changed, 162 insertions(+), 35 deletions(-)
create mode 100644 llvm/test/CodeGen/AMDGPU/merge-vgpr-copies.mir
diff --git a/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
index 1fb53fddeff2a..287fd01498088 100644
--- a/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
@@ -73,16 +73,14 @@ bool SIMergeVGPRCopiesLegacy::runOnMachineFunction(MachineFunction &MF) {
return SIMergeVGPRCopies().run(MF);
}
-static bool getBaseIfAlignedAndConsecutive(const Register &Reg1,
- const Register &Reg2,
- const SIRegisterInfo *TRI,
- Register &Base) {
+static bool getBaseIfConsecutive(const Register &Reg1, const Register &Reg2,
+ const SIRegisterInfo *TRI, Register &Base) {
long Dist =
static_cast<long>(TRI->getHWRegIndex(Reg2)) - TRI->getHWRegIndex(Reg1);
if (std::abs(Dist) != 1)
return false;
Base = (Dist == 1) ? Reg1 : Reg2;
- return TRI->getHWRegIndex(Base) % 2 == 0;
+ return true;
}
bool SIMergeVGPRCopies::run(MachineFunction &MF) {
@@ -109,51 +107,52 @@ bool SIMergeVGPRCopies::run(MachineFunction &MF) {
continue;
MachineInstr &NextMI = *I;
- {
- // Both destinations must be VGPRs.
- Register MIDstReg = MI.getOperand(0).getReg();
- Register NextMIDstReg = NextMI.getOperand(0).getReg();
- if (!AMDGPU::VGPR_32RegClass.contains(MIDstReg) ||
- !AMDGPU::VGPR_32RegClass.contains(NextMIDstReg))
- continue;
- }
+ // Both destinations must be VGPRs.
+ Register MIDstReg = MI.getOperand(0).getReg();
+ Register NextMIDstReg = NextMI.getOperand(0).getReg();
+ if (!AMDGPU::VGPR_32RegClass.contains(MIDstReg) ||
+ !AMDGPU::VGPR_32RegClass.contains(NextMIDstReg))
+ continue;
- bool UsesSGPRSources = false;
- {
- // Sources may always be VGPRs, but can also be SGPRs if the target
- // supports V_MOV_B64. Either way, the sources must be the same class.
- Register MISrcReg = MI.getOperand(1).getReg();
- Register NextMISrcReg = NextMI.getOperand(1).getReg();
- UsesSGPRSources = ST.hasMovB64() &&
- AMDGPU::SGPR_32RegClass.contains(MISrcReg) &&
- AMDGPU::SGPR_32RegClass.contains(NextMISrcReg);
- if (!UsesSGPRSources &&
- !(AMDGPU::VGPR_32RegClass.contains(MISrcReg) &&
- AMDGPU::VGPR_32RegClass.contains(NextMISrcReg)))
- continue;
- }
+ // Sources may always be VGPRs, but can also be SGPRs if the target
+ // supports V_MOV_B64. Either way, the sources must be the same class.
+ Register MISrcReg = MI.getOperand(1).getReg();
+ Register NextMISrcReg = NextMI.getOperand(1).getReg();
+ bool UsesSGPRSources = ST.hasMovB64() &&
+ AMDGPU::SGPR_32RegClass.contains(MISrcReg) &&
+ AMDGPU::SGPR_32RegClass.contains(NextMISrcReg);
+ if (!UsesSGPRSources && !(AMDGPU::VGPR_32RegClass.contains(MISrcReg) &&
+ AMDGPU::VGPR_32RegClass.contains(NextMISrcReg)))
+ continue;
// Ensure the first copy is the one with the lower-numbered destination
// register. This simplifies checking for consecutive sources and ensures
// the merged copy reads the same registers as the original pair.
Register DstBase;
- if (!getBaseIfAlignedAndConsecutive(MI.getOperand(0).getReg(),
- NextMI.getOperand(0).getReg(), TRI,
- DstBase))
+ if (!getBaseIfConsecutive(MIDstReg, NextMIDstReg, TRI, DstBase))
+ continue;
+
+ // If the target requires aligned VGPRs, the destination base must be
+ // even-aligned.
+ if (ST.needsAlignedVGPRs() && TRI->getHWRegIndex(DstBase) % 2 != 0)
continue;
Register SrcBase;
- if (!getBaseIfAlignedAndConsecutive(MI.getOperand(1).getReg(),
- NextMI.getOperand(1).getReg(), TRI,
- SrcBase))
+ if (!getBaseIfConsecutive(MISrcReg, NextMISrcReg, TRI, SrcBase))
+ continue;
+
+ // If the sources are SGPRs or the target requires aligned VGPRs, the
+ // source base must be even-aligned.
+ if ((UsesSGPRSources || ST.needsAlignedVGPRs()) &&
+ TRI->getHWRegIndex(SrcBase) % 2 != 0)
continue;
// The sources must also be consecutive and even-aligned, but they can be
// in either order. If they are inversed, the merged copy needs to use
// V_PK_MOV_B32 which in turn cannot use SGPR sources, otherwise it can
// use V_MOV_B64.
- bool SrcIsInversed = (DstBase == NextMI.getOperand(0).getReg()) !=
- (SrcBase == NextMI.getOperand(1).getReg());
+ bool SrcIsInversed =
+ (DstBase == NextMIDstReg) != (SrcBase == NextMISrcReg);
if (SrcIsInversed && (UsesSGPRSources || !ST.hasPkMovB32()))
continue;
diff --git a/llvm/test/CodeGen/AMDGPU/merge-vgpr-copies.mir b/llvm/test/CodeGen/AMDGPU/merge-vgpr-copies.mir
new file mode 100644
index 0000000000000..c192f67938658
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/merge-vgpr-copies.mir
@@ -0,0 +1,128 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -mattr=-vgpr-align2 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX90A,NO-ALIGN,GFX90A-NO-ALIGN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX90A,ALIGN,GFX90A-ALIGN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -mattr=-vgpr-align2 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX942,NO-ALIGN,GFX942-NO-ALIGN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX942,ALIGN,GFX942-ALIGN %s
+
+# Check that merging of 32-bit copies can be done for odd-aligned VGPR registers
+# if the target supports it.
+# All targets that currently enable this pass (hasPkMovB32 or hasMovB64) also
+# require even-aligned VGPR pairs (needsAlignedVGPRs). The -vgpr-align2 flag
+# is used here to synthesize a target where the pass runs without the alignment
+# requirement, exercising the conditional alignment check.
+
+---
+name: test_odd_aligned_src
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr4, $vgpr5
+ ; NO-ALIGN-LABEL: name: test_odd_aligned_src
+ ; NO-ALIGN: liveins: $vgpr4, $vgpr5
+ ; NO-ALIGN-NEXT: {{ $}}
+ ; NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $vgpr4_vgpr5, implicit $exec
+ ; NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; ALIGN-LABEL: name: test_odd_aligned_src
+ ; ALIGN: liveins: $vgpr4, $vgpr5
+ ; ALIGN-NEXT: {{ $}}
+ ; ALIGN-NEXT: $vgpr1 = COPY $vgpr4
+ ; ALIGN-NEXT: $vgpr2 = COPY $vgpr5
+ ; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ $vgpr1 = COPY $vgpr4
+ $vgpr2 = COPY $vgpr5
+ S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+...
+
+---
+name: test_odd_aligned_dst
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr3, $vgpr4
+ ; NO-ALIGN-LABEL: name: test_odd_aligned_dst
+ ; NO-ALIGN: liveins: $vgpr3, $vgpr4
+ ; NO-ALIGN-NEXT: {{ $}}
+ ; NO-ALIGN-NEXT: $vgpr0_vgpr1 = COPY $vgpr3_vgpr4, implicit $exec
+ ; NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+ ;
+ ; ALIGN-LABEL: name: test_odd_aligned_dst
+ ; ALIGN: liveins: $vgpr3, $vgpr4
+ ; ALIGN-NEXT: {{ $}}
+ ; ALIGN-NEXT: $vgpr0 = COPY $vgpr3
+ ; ALIGN-NEXT: $vgpr1 = COPY $vgpr4
+ ; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+ $vgpr0 = COPY $vgpr3
+ $vgpr1 = COPY $vgpr4
+ S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+...
+
+---
+name: test_odd_aligned_src_dst
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr3, $vgpr4
+ ; NO-ALIGN-LABEL: name: test_odd_aligned_src_dst
+ ; NO-ALIGN: liveins: $vgpr3, $vgpr4
+ ; NO-ALIGN-NEXT: {{ $}}
+ ; NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $vgpr3_vgpr4, implicit $exec
+ ; NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; ALIGN-LABEL: name: test_odd_aligned_src_dst
+ ; ALIGN: liveins: $vgpr3, $vgpr4
+ ; ALIGN-NEXT: {{ $}}
+ ; ALIGN-NEXT: $vgpr1 = COPY $vgpr3
+ ; ALIGN-NEXT: $vgpr2 = COPY $vgpr4
+ ; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ $vgpr1 = COPY $vgpr3
+ $vgpr2 = COPY $vgpr4
+ S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+...
+
+---
+name: test_odd_aligned_dst_even_aligned_sgpr_src
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr4, $sgpr5
+ ; GFX90A-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
+ ; GFX90A: liveins: $sgpr4, $sgpr5
+ ; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: $vgpr1 = COPY $sgpr4
+ ; GFX90A-NEXT: $vgpr2 = COPY $sgpr5
+ ; GFX90A-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; GFX942-NO-ALIGN-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
+ ; GFX942-NO-ALIGN: liveins: $sgpr4, $sgpr5
+ ; GFX942-NO-ALIGN-NEXT: {{ $}}
+ ; GFX942-NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $sgpr4_sgpr5, implicit $exec
+ ; GFX942-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; ALIGN-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
+ ; ALIGN: liveins: $sgpr4, $sgpr5
+ ; ALIGN-NEXT: {{ $}}
+ ; ALIGN-NEXT: $vgpr1 = COPY $sgpr4
+ ; ALIGN-NEXT: $vgpr2 = COPY $sgpr5
+ ; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ $vgpr1 = COPY $sgpr4
+ $vgpr2 = COPY $sgpr5
+ S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+...
+
+---
+name: test_no_odd_aligned_sgpr_src
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr3, $sgpr4
+ ; GCN-LABEL: name: test_no_odd_aligned_sgpr_src
+ ; GCN: liveins: $sgpr3, $sgpr4
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: $vgpr0 = COPY $sgpr3
+ ; GCN-NEXT: $vgpr1 = COPY $sgpr4
+ ; GCN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+ $vgpr0 = COPY $sgpr3
+ $vgpr1 = COPY $sgpr4
+ S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+...
>From 2c28b9ff956b9b406d1877c782ab7aeb8457c3c1 Mon Sep 17 00:00:00 2001
From: Steffen Holst Larsen <sholstla at amd.com>
Date: Wed, 22 Apr 2026 06:14:09 -0500
Subject: [PATCH 3/4] Fix prefixes
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
---
.../test/CodeGen/AMDGPU/merge-vgpr-copies.mir | 117 ++++++++++++++++--
1 file changed, 104 insertions(+), 13 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/merge-vgpr-copies.mir b/llvm/test/CodeGen/AMDGPU/merge-vgpr-copies.mir
index c192f67938658..baf99e8984713 100644
--- a/llvm/test/CodeGen/AMDGPU/merge-vgpr-copies.mir
+++ b/llvm/test/CodeGen/AMDGPU/merge-vgpr-copies.mir
@@ -1,8 +1,8 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
-# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -mattr=-vgpr-align2 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX90A,NO-ALIGN,GFX90A-NO-ALIGN %s
-# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX90A,ALIGN,GFX90A-ALIGN %s
-# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -mattr=-vgpr-align2 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX942,NO-ALIGN,GFX942-NO-ALIGN %s
-# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX942,ALIGN,GFX942-ALIGN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -mattr=-vgpr-align2 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX90A-NO-ALIGN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX90A-ALIGN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -mattr=-vgpr-align2 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX942-NO-ALIGN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass=si-merge-vgpr-copies -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GCN,GFX942-ALIGN %s
# Check that merging of 32-bit copies can be done for odd-aligned VGPR registers
# if the target supports it.
@@ -22,13 +22,37 @@ body: |
; NO-ALIGN-NEXT: {{ $}}
; NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $vgpr4_vgpr5, implicit $exec
; NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
- ;
; ALIGN-LABEL: name: test_odd_aligned_src
; ALIGN: liveins: $vgpr4, $vgpr5
; ALIGN-NEXT: {{ $}}
; ALIGN-NEXT: $vgpr1 = COPY $vgpr4
; ALIGN-NEXT: $vgpr2 = COPY $vgpr5
; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ; GFX90A-NO-ALIGN-LABEL: name: test_odd_aligned_src
+ ; GFX90A-NO-ALIGN: liveins: $vgpr4, $vgpr5
+ ; GFX90A-NO-ALIGN-NEXT: {{ $}}
+ ; GFX90A-NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $vgpr4_vgpr5, implicit $exec
+ ; GFX90A-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; GFX90A-ALIGN-LABEL: name: test_odd_aligned_src
+ ; GFX90A-ALIGN: liveins: $vgpr4, $vgpr5
+ ; GFX90A-ALIGN-NEXT: {{ $}}
+ ; GFX90A-ALIGN-NEXT: $vgpr1 = COPY $vgpr4
+ ; GFX90A-ALIGN-NEXT: $vgpr2 = COPY $vgpr5
+ ; GFX90A-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; GFX942-NO-ALIGN-LABEL: name: test_odd_aligned_src
+ ; GFX942-NO-ALIGN: liveins: $vgpr4, $vgpr5
+ ; GFX942-NO-ALIGN-NEXT: {{ $}}
+ ; GFX942-NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $vgpr4_vgpr5, implicit $exec
+ ; GFX942-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; GFX942-ALIGN-LABEL: name: test_odd_aligned_src
+ ; GFX942-ALIGN: liveins: $vgpr4, $vgpr5
+ ; GFX942-ALIGN-NEXT: {{ $}}
+ ; GFX942-ALIGN-NEXT: $vgpr1 = COPY $vgpr4
+ ; GFX942-ALIGN-NEXT: $vgpr2 = COPY $vgpr5
+ ; GFX942-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
$vgpr1 = COPY $vgpr4
$vgpr2 = COPY $vgpr5
S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
@@ -45,13 +69,37 @@ body: |
; NO-ALIGN-NEXT: {{ $}}
; NO-ALIGN-NEXT: $vgpr0_vgpr1 = COPY $vgpr3_vgpr4, implicit $exec
; NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
- ;
; ALIGN-LABEL: name: test_odd_aligned_dst
; ALIGN: liveins: $vgpr3, $vgpr4
; ALIGN-NEXT: {{ $}}
; ALIGN-NEXT: $vgpr0 = COPY $vgpr3
; ALIGN-NEXT: $vgpr1 = COPY $vgpr4
; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+ ; GFX90A-NO-ALIGN-LABEL: name: test_odd_aligned_dst
+ ; GFX90A-NO-ALIGN: liveins: $vgpr3, $vgpr4
+ ; GFX90A-NO-ALIGN-NEXT: {{ $}}
+ ; GFX90A-NO-ALIGN-NEXT: $vgpr0_vgpr1 = COPY $vgpr3_vgpr4, implicit $exec
+ ; GFX90A-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+ ;
+ ; GFX90A-ALIGN-LABEL: name: test_odd_aligned_dst
+ ; GFX90A-ALIGN: liveins: $vgpr3, $vgpr4
+ ; GFX90A-ALIGN-NEXT: {{ $}}
+ ; GFX90A-ALIGN-NEXT: $vgpr0 = COPY $vgpr3
+ ; GFX90A-ALIGN-NEXT: $vgpr1 = COPY $vgpr4
+ ; GFX90A-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+ ;
+ ; GFX942-NO-ALIGN-LABEL: name: test_odd_aligned_dst
+ ; GFX942-NO-ALIGN: liveins: $vgpr3, $vgpr4
+ ; GFX942-NO-ALIGN-NEXT: {{ $}}
+ ; GFX942-NO-ALIGN-NEXT: $vgpr0_vgpr1 = COPY $vgpr3_vgpr4, implicit $exec
+ ; GFX942-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
+ ;
+ ; GFX942-ALIGN-LABEL: name: test_odd_aligned_dst
+ ; GFX942-ALIGN: liveins: $vgpr3, $vgpr4
+ ; GFX942-ALIGN-NEXT: {{ $}}
+ ; GFX942-ALIGN-NEXT: $vgpr0 = COPY $vgpr3
+ ; GFX942-ALIGN-NEXT: $vgpr1 = COPY $vgpr4
+ ; GFX942-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
$vgpr0 = COPY $vgpr3
$vgpr1 = COPY $vgpr4
S_ENDPGM 0, implicit $vgpr0, implicit $vgpr1
@@ -68,13 +116,37 @@ body: |
; NO-ALIGN-NEXT: {{ $}}
; NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $vgpr3_vgpr4, implicit $exec
; NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
- ;
; ALIGN-LABEL: name: test_odd_aligned_src_dst
; ALIGN: liveins: $vgpr3, $vgpr4
; ALIGN-NEXT: {{ $}}
; ALIGN-NEXT: $vgpr1 = COPY $vgpr3
; ALIGN-NEXT: $vgpr2 = COPY $vgpr4
; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ; GFX90A-NO-ALIGN-LABEL: name: test_odd_aligned_src_dst
+ ; GFX90A-NO-ALIGN: liveins: $vgpr3, $vgpr4
+ ; GFX90A-NO-ALIGN-NEXT: {{ $}}
+ ; GFX90A-NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $vgpr3_vgpr4, implicit $exec
+ ; GFX90A-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; GFX90A-ALIGN-LABEL: name: test_odd_aligned_src_dst
+ ; GFX90A-ALIGN: liveins: $vgpr3, $vgpr4
+ ; GFX90A-ALIGN-NEXT: {{ $}}
+ ; GFX90A-ALIGN-NEXT: $vgpr1 = COPY $vgpr3
+ ; GFX90A-ALIGN-NEXT: $vgpr2 = COPY $vgpr4
+ ; GFX90A-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; GFX942-NO-ALIGN-LABEL: name: test_odd_aligned_src_dst
+ ; GFX942-NO-ALIGN: liveins: $vgpr3, $vgpr4
+ ; GFX942-NO-ALIGN-NEXT: {{ $}}
+ ; GFX942-NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $vgpr3_vgpr4, implicit $exec
+ ; GFX942-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; GFX942-ALIGN-LABEL: name: test_odd_aligned_src_dst
+ ; GFX942-ALIGN: liveins: $vgpr3, $vgpr4
+ ; GFX942-ALIGN-NEXT: {{ $}}
+ ; GFX942-ALIGN-NEXT: $vgpr1 = COPY $vgpr3
+ ; GFX942-ALIGN-NEXT: $vgpr2 = COPY $vgpr4
+ ; GFX942-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
$vgpr1 = COPY $vgpr3
$vgpr2 = COPY $vgpr4
S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
@@ -92,6 +164,25 @@ body: |
; GFX90A-NEXT: $vgpr1 = COPY $sgpr4
; GFX90A-NEXT: $vgpr2 = COPY $sgpr5
; GFX90A-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ; ALIGN-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
+ ; ALIGN: liveins: $sgpr4, $sgpr5
+ ; ALIGN-NEXT: {{ $}}
+ ; ALIGN-NEXT: $vgpr1 = COPY $sgpr4
+ ; ALIGN-NEXT: $vgpr2 = COPY $sgpr5
+ ; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ; GFX90A-NO-ALIGN-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
+ ; GFX90A-NO-ALIGN: liveins: $sgpr4, $sgpr5
+ ; GFX90A-NO-ALIGN-NEXT: {{ $}}
+ ; GFX90A-NO-ALIGN-NEXT: $vgpr1 = COPY $sgpr4
+ ; GFX90A-NO-ALIGN-NEXT: $vgpr2 = COPY $sgpr5
+ ; GFX90A-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ;
+ ; GFX90A-ALIGN-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
+ ; GFX90A-ALIGN: liveins: $sgpr4, $sgpr5
+ ; GFX90A-ALIGN-NEXT: {{ $}}
+ ; GFX90A-ALIGN-NEXT: $vgpr1 = COPY $sgpr4
+ ; GFX90A-ALIGN-NEXT: $vgpr2 = COPY $sgpr5
+ ; GFX90A-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
;
; GFX942-NO-ALIGN-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
; GFX942-NO-ALIGN: liveins: $sgpr4, $sgpr5
@@ -99,12 +190,12 @@ body: |
; GFX942-NO-ALIGN-NEXT: $vgpr1_vgpr2 = COPY $sgpr4_sgpr5, implicit $exec
; GFX942-NO-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
;
- ; ALIGN-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
- ; ALIGN: liveins: $sgpr4, $sgpr5
- ; ALIGN-NEXT: {{ $}}
- ; ALIGN-NEXT: $vgpr1 = COPY $sgpr4
- ; ALIGN-NEXT: $vgpr2 = COPY $sgpr5
- ; ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
+ ; GFX942-ALIGN-LABEL: name: test_odd_aligned_dst_even_aligned_sgpr_src
+ ; GFX942-ALIGN: liveins: $sgpr4, $sgpr5
+ ; GFX942-ALIGN-NEXT: {{ $}}
+ ; GFX942-ALIGN-NEXT: $vgpr1 = COPY $sgpr4
+ ; GFX942-ALIGN-NEXT: $vgpr2 = COPY $sgpr5
+ ; GFX942-ALIGN-NEXT: S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
$vgpr1 = COPY $sgpr4
$vgpr2 = COPY $sgpr5
S_ENDPGM 0, implicit $vgpr1, implicit $vgpr2
>From 37bf7fb36cbfb6fff3e978021157335ae60d701a Mon Sep 17 00:00:00 2001
From: Steffen Holst Larsen <sholstla at amd.com>
Date: Wed, 22 Apr 2026 08:19:01 -0500
Subject: [PATCH 4/4] Address comments
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
---
llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp | 16 +++-------------
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
index 287fd01498088..0af8226194c83 100644
--- a/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMergeVGPRCopies.cpp
@@ -101,6 +101,8 @@ bool SIMergeVGPRCopies::run(MachineFunction &MF) {
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
MachineInstr &MI = *I;
+ // Move to next non-debug instruction. If the instructions are not merged,
+ // this becomes the origin of the next iteration.
I = next_nodbg(I, E);
if (I == E || I->getOpcode() != AMDGPU::COPY ||
MI.getOpcode() != AMDGPU::COPY)
@@ -131,22 +133,10 @@ bool SIMergeVGPRCopies::run(MachineFunction &MF) {
Register DstBase;
if (!getBaseIfConsecutive(MIDstReg, NextMIDstReg, TRI, DstBase))
continue;
-
- // If the target requires aligned VGPRs, the destination base must be
- // even-aligned.
- if (ST.needsAlignedVGPRs() && TRI->getHWRegIndex(DstBase) % 2 != 0)
- continue;
-
Register SrcBase;
if (!getBaseIfConsecutive(MISrcReg, NextMISrcReg, TRI, SrcBase))
continue;
- // If the sources are SGPRs or the target requires aligned VGPRs, the
- // source base must be even-aligned.
- if ((UsesSGPRSources || ST.needsAlignedVGPRs()) &&
- TRI->getHWRegIndex(SrcBase) % 2 != 0)
- continue;
-
// The sources must also be consecutive and even-aligned, but they can be
// in either order. If they are inversed, the merged copy needs to use
// V_PK_MOV_B32 which in turn cannot use SGPR sources, otherwise it can
@@ -184,7 +174,7 @@ bool SIMergeVGPRCopies::run(MachineFunction &MF) {
}
LLVM_DEBUG(dbgs() << "Merged VGPR32 copy pair into 64-bit copy from "
- << MI << " and " << NextMI << '\n');
+ << MI << " and " << NextMI);
I = next_nodbg(I, E); // Advance past NextMI before erasing it.
MI.eraseFromParent();
NextMI.eraseFromParent();
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