[compiler-rt] [compiler-rt] Initial support for compiler-rt builtins on SPIRV64 target (PR #192897)
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Sun Apr 19 23:18:28 PDT 2026
https://github.com/jinge90 created https://github.com/llvm/llvm-project/pull/192897
None
>From cd82a1aa6151e156fa464b4d1e1a4e90e132486d Mon Sep 17 00:00:00 2001
From: jinge90 <ge.jin at intel.com>
Date: Mon, 20 Apr 2026 13:10:47 +0800
Subject: [PATCH 1/2] [compiler-rt] Enable compiler-rt builtin library for
SPIRV64 target
Signed-off-by: jinge90 <ge.jin at intel.com>
---
compiler-rt/cmake/Modules/CompilerRTUtils.cmake | 5 ++++-
compiler-rt/cmake/builtin-config-ix.cmake | 3 ++-
compiler-rt/lib/builtins/CMakeLists.txt | 4 +++-
compiler-rt/lib/builtins/int_lib.h | 2 +-
compiler-rt/lib/builtins/int_types.h | 4 ++++
5 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/compiler-rt/cmake/Modules/CompilerRTUtils.cmake b/compiler-rt/cmake/Modules/CompilerRTUtils.cmake
index a8757acce7f5a..dc9d2f4c473f8 100644
--- a/compiler-rt/cmake/Modules/CompilerRTUtils.cmake
+++ b/compiler-rt/cmake/Modules/CompilerRTUtils.cmake
@@ -165,6 +165,7 @@ macro(detect_target_arch)
check_symbol_exists(__s390x__ "" __S390X)
check_symbol_exists(__sparc "" __SPARC)
check_symbol_exists(__sparcv9 "" __SPARCV9)
+ check_symbol_exists(__SPIRV64__ "" __SPIRV64)
check_symbol_exists(__wasm32__ "" __WEBASSEMBLY32)
check_symbol_exists(__wasm64__ "" __WEBASSEMBLY64)
check_symbol_exists(__ve__ "" __VE)
@@ -222,6 +223,8 @@ macro(detect_target_arch)
add_default_target_arch(sparcv9)
elseif(__SPARC)
add_default_target_arch(sparc)
+ elseif(__SPIRV64)
+ add_default_target_arch(spirv64)
elseif(__WEBASSEMBLY32)
add_default_target_arch(wasm32)
elseif(__WEBASSEMBLY64)
@@ -423,7 +426,7 @@ macro(construct_compiler_rt_default_triple)
# Pass the necessary flags to make flag detection work.
if("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "amdgcn")
set(COMPILER_RT_GPU_BUILD ON)
- elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "nvptx")
+ elseif("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "nvptx|spirv64")
set(COMPILER_RT_GPU_BUILD ON)
set(CMAKE_REQUIRED_FLAGS "${CMAKE_REQUIRED_FLAGS} -flto -c")
endif()
diff --git a/compiler-rt/cmake/builtin-config-ix.cmake b/compiler-rt/cmake/builtin-config-ix.cmake
index abaaeadf3bd06..07955f3340d0a 100644
--- a/compiler-rt/cmake/builtin-config-ix.cmake
+++ b/compiler-rt/cmake/builtin-config-ix.cmake
@@ -95,6 +95,7 @@ set(RISCV64 riscv64)
set(S390X s390x)
set(SPARC sparc)
set(SPARCV9 sparcv9)
+set(SPIRV64 spirv64)
set(WASM32 wasm32)
set(WASM64 wasm64)
set(VE ve)
@@ -109,7 +110,7 @@ endif()
set(ALL_BUILTIN_SUPPORTED_ARCH
${X86} ${X86_64} ${AMDGPU} ${ARM32} ${ARM64} ${AVR}
${HEXAGON} ${MIPS32} ${MIPS64} ${NVPTX} ${PPC32} ${PPC64}
- ${RISCV32} ${RISCV64} ${S390X} ${SPARC} ${SPARCV9}
+ ${RISCV32} ${RISCV64} ${S390X} ${SPARC} ${SPARCV9} ${SPIRV64}
${WASM32} ${WASM64} ${VE} ${LOONGARCH64} ${M68K})
include(CompilerRTUtils)
diff --git a/compiler-rt/lib/builtins/CMakeLists.txt b/compiler-rt/lib/builtins/CMakeLists.txt
index 503a9aa3ff4ec..f0204d9be9b9f 100644
--- a/compiler-rt/lib/builtins/CMakeLists.txt
+++ b/compiler-rt/lib/builtins/CMakeLists.txt
@@ -901,6 +901,8 @@ set(riscv64_SOURCES
set(sparc_SOURCES ${GENERIC_SOURCES} ${GENERIC_TF_SOURCES})
set(sparcv9_SOURCES ${GENERIC_SOURCES} ${GENERIC_TF_SOURCES})
+set(spirv64_SOURCES ${GENERIC_SOURCES})
+
set(s390x_SOURCES
${GENERIC_SOURCES}
${GENERIC_TF_SOURCES}
@@ -969,7 +971,7 @@ else ()
endif()
# Directly targeting the GPU requires a few extra flags.
- if("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "amdgcn|nvptx")
+ if("${COMPILER_RT_DEFAULT_TARGET_ARCH}" MATCHES "amdgcn|nvptx|spirv64")
append_list_if(COMPILER_RT_HAS_FFREESTANDING_FLAG -ffreestanding BUILTIN_CFLAGS)
append_list_if(COMPILER_RT_HAS_NOGPULIB_FLAG -nogpulib BUILTIN_CFLAGS)
append_list_if(COMPILER_RT_HAS_FLTO_FLAG -flto BUILTIN_CFLAGS)
diff --git a/compiler-rt/lib/builtins/int_lib.h b/compiler-rt/lib/builtins/int_lib.h
index 943430de259d8..629c3065da6a0 100644
--- a/compiler-rt/lib/builtins/int_lib.h
+++ b/compiler-rt/lib/builtins/int_lib.h
@@ -64,7 +64,7 @@
COMPILER_RT_ALIAS_VISIBILITY(aliasname) \
__asm__(SYMBOL_NAME(aliasname) " = " SYMBOL_NAME(name)); \
COMPILER_RT_ABI __typeof(name) aliasname;
-#elif defined(_WIN32) || defined(__UEFI__)
+#elif defined(_WIN32) || defined(__UEFI__) || defined(__SPIRV__)
#define COMPILER_RT_ALIAS(name, aliasname)
#else
#error Unsupported target
diff --git a/compiler-rt/lib/builtins/int_types.h b/compiler-rt/lib/builtins/int_types.h
index 7c7f8cb64aa9a..0be6852ccc03d 100644
--- a/compiler-rt/lib/builtins/int_types.h
+++ b/compiler-rt/lib/builtins/int_types.h
@@ -75,6 +75,10 @@ typedef union {
#undef CRT_HAS_128BIT
#endif
+#if defined(__SPIRV__)
+#undef CRT_HAS_128BIT
+#endif
+
#ifdef CRT_HAS_128BIT
typedef int ti_int __attribute__((mode(TI)));
typedef unsigned tu_int __attribute__((mode(TI)));
>From b535386befc52b0efe85a36df25ac40b08e9092c Mon Sep 17 00:00:00 2001
From: jinge90 <ge.jin at intel.com>
Date: Mon, 20 Apr 2026 13:55:08 +0800
Subject: [PATCH 2/2] Add SPIRV64.cmake for cmake caches
Signed-off-by: jinge90 <ge.jin at intel.com>
---
compiler-rt/cmake/caches/SPIRV64.cmake | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
create mode 100644 compiler-rt/cmake/caches/SPIRV64.cmake
diff --git a/compiler-rt/cmake/caches/SPIRV64.cmake b/compiler-rt/cmake/caches/SPIRV64.cmake
new file mode 100644
index 0000000000000..15593bd4ac629
--- /dev/null
+++ b/compiler-rt/cmake/caches/SPIRV64.cmake
@@ -0,0 +1,18 @@
+# This file sets up a CMakeCache for SPIRV64 builds of compiler-rt.
+set(COMPILER_RT_INCLUDE_TESTS OFF CACHE BOOL "")
+set(COMPILER_RT_HAS_SAFESTACK OFF CACHE BOOL "")
+set(COMPILER_RT_DEFAULT_TARGET_ONLY ON CACHE BOOL "")
+
+set(COMPILER_RT_BUILD_BUILTINS ON CACHE BOOL "")
+set(COMPILER_RT_BAREMETAL_BUILD ON CACHE BOOL "")
+set(COMPILER_RT_BUILD_CRT OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_SANITIZERS OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_XRAY OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_LIBFUZZER OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_PROFILE OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_MEMPROF OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_XRAY_NO_PREINIT OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_ORC OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_GWP_ASAN OFF CACHE BOOL "")
+set(COMPILER_RT_BUILD_SCUDO_SANTDALONE_WITH_LLVM_LIBC OFF CACHE BOOL "")
+set(COMPILER_RT_PROFILE_BAREMETAL OFF CACHE BOOL "")
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