[llvm] [ARM] Refactor getARMCmp to deal with the vselect situation (PR #192873)

via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 19 14:32:34 PDT 2026


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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMISelLowering.h --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 397c45c71..cb18b6b28 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -1632,18 +1632,19 @@ static bool isS16(const SDValue &Op, SelectionDAG &DAG) {
 }
 
 /// IntCCToARMCC - Convert a DAG integer condition code to an ARM CC
-static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC, SDValue RHS, bool ForbidMIandPL = false) {
+static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC, SDValue RHS,
+                                     bool ForbidMIandPL = false) {
   switch (CC) {
   default: llvm_unreachable("Unknown condition code!");
   case ISD::SETNE:  return ARMCC::NE;
   case ISD::SETEQ:  return ARMCC::EQ;
   case ISD::SETGT:  return ARMCC::GT;
-  case ISD::SETGE: 
+  case ISD::SETGE:
     if (!ForbidMIandPL && isNullConstant(RHS)) {
       return ARMCC::PL;
     }
     return ARMCC::GE;
-  case ISD::SETLT:  
+  case ISD::SETLT:
     if (!ForbidMIandPL && isNullConstant(RHS)) {
       return ARMCC::MI;
     }

``````````

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https://github.com/llvm/llvm-project/pull/192873


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