[llvm] [SPARC] Add BSWAP tests (PR #192838)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 19 02:42:34 PDT 2026
https://github.com/koachan created https://github.com/llvm/llvm-project/pull/192838
None
>From 713ff3be309ac0759d2aea9ec3430688011e6ad5 Mon Sep 17 00:00:00 2001
From: Koakuma <koachan at protonmail.com>
Date: Sun, 19 Apr 2026 16:35:55 +0700
Subject: [PATCH] [SPARC] Add BSWAP tests
---
llvm/test/CodeGen/SPARC/bswap.ll | 523 +++++++++++++++++++++++++++++++
1 file changed, 523 insertions(+)
create mode 100644 llvm/test/CodeGen/SPARC/bswap.ll
diff --git a/llvm/test/CodeGen/SPARC/bswap.ll b/llvm/test/CodeGen/SPARC/bswap.ll
new file mode 100644
index 0000000000000..dd389f7902a72
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/bswap.ll
@@ -0,0 +1,523 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=sparc -mcpu=v9 | FileCheck %s --check-prefix=SPARC32
+; RUN: llc < %s -mtriple=sparcel -mcpu=v9 | FileCheck %s --check-prefix=SPARCEL
+; RUN: llc < %s -mtriple=sparc64 -mcpu=v9 | FileCheck %s --check-prefix=SPARC64
+
+declare i16 @llvm.bswap.i16(i16)
+declare i32 @llvm.bswap.i32(i32)
+declare i64 @llvm.bswap.i64(i64)
+
+define i16 @u16_bswap(i16 %0) #0 {
+; SPARC32-LABEL: u16_bswap:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: sethi 63, %o1
+; SPARC32-NEXT: or %o1, 768, %o1
+; SPARC32-NEXT: and %o0, %o1, %o1
+; SPARC32-NEXT: srl %o1, 8, %o1
+; SPARC32-NEXT: sll %o0, 8, %o0
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: or %o0, %o1, %o0
+;
+; SPARCEL-LABEL: u16_bswap:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: sethi 63, %o1
+; SPARCEL-NEXT: or %o1, 768, %o1
+; SPARCEL-NEXT: and %o0, %o1, %o1
+; SPARCEL-NEXT: srl %o1, 8, %o1
+; SPARCEL-NEXT: sll %o0, 8, %o0
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: or %o0, %o1, %o0
+;
+; SPARC64-LABEL: u16_bswap:
+; SPARC64: ! %bb.0:
+; SPARC64-NEXT: sethi 63, %o1
+; SPARC64-NEXT: or %o1, 768, %o1
+; SPARC64-NEXT: and %o0, %o1, %o1
+; SPARC64-NEXT: srl %o1, 8, %o1
+; SPARC64-NEXT: sll %o0, 8, %o0
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: or %o0, %o1, %o0
+ %2 = tail call i16 @llvm.bswap.i16(i16 %0)
+ ret i16 %2
+}
+
+define i32 @u32_bswap(i32 %0) #0 {
+; SPARC32-LABEL: u32_bswap:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: srl %o0, 8, %o1
+; SPARC32-NEXT: sethi 63, %o2
+; SPARC32-NEXT: or %o2, 768, %o2
+; SPARC32-NEXT: and %o1, %o2, %o1
+; SPARC32-NEXT: srl %o0, 24, %o3
+; SPARC32-NEXT: or %o1, %o3, %o1
+; SPARC32-NEXT: and %o0, %o2, %o2
+; SPARC32-NEXT: sll %o2, 8, %o2
+; SPARC32-NEXT: sll %o0, 24, %o0
+; SPARC32-NEXT: or %o0, %o2, %o0
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: or %o0, %o1, %o0
+;
+; SPARCEL-LABEL: u32_bswap:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: srl %o0, 8, %o1
+; SPARCEL-NEXT: sethi 63, %o2
+; SPARCEL-NEXT: or %o2, 768, %o2
+; SPARCEL-NEXT: and %o1, %o2, %o1
+; SPARCEL-NEXT: srl %o0, 24, %o3
+; SPARCEL-NEXT: or %o1, %o3, %o1
+; SPARCEL-NEXT: and %o0, %o2, %o2
+; SPARCEL-NEXT: sll %o2, 8, %o2
+; SPARCEL-NEXT: sll %o0, 24, %o0
+; SPARCEL-NEXT: or %o0, %o2, %o0
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: or %o0, %o1, %o0
+;
+; SPARC64-LABEL: u32_bswap:
+; SPARC64: ! %bb.0:
+; SPARC64-NEXT: srl %o0, 8, %o1
+; SPARC64-NEXT: sethi 63, %o2
+; SPARC64-NEXT: or %o2, 768, %o2
+; SPARC64-NEXT: and %o1, %o2, %o1
+; SPARC64-NEXT: srl %o0, 24, %o3
+; SPARC64-NEXT: or %o1, %o3, %o1
+; SPARC64-NEXT: and %o0, %o2, %o2
+; SPARC64-NEXT: sll %o2, 8, %o2
+; SPARC64-NEXT: sll %o0, 24, %o0
+; SPARC64-NEXT: or %o0, %o2, %o0
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: or %o0, %o1, %o0
+ %2 = tail call i32 @llvm.bswap.i32(i32 %0)
+ ret i32 %2
+}
+
+define i64 @u64_bswap(i64 %0) #0 {
+; SPARC32-LABEL: u64_bswap:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: srl %o1, 8, %o2
+; SPARC32-NEXT: sethi 63, %o3
+; SPARC32-NEXT: or %o3, 768, %o3
+; SPARC32-NEXT: and %o2, %o3, %o2
+; SPARC32-NEXT: srl %o1, 24, %o4
+; SPARC32-NEXT: or %o2, %o4, %o2
+; SPARC32-NEXT: and %o1, %o3, %o4
+; SPARC32-NEXT: sll %o4, 8, %o4
+; SPARC32-NEXT: sll %o1, 24, %o1
+; SPARC32-NEXT: or %o1, %o4, %o1
+; SPARC32-NEXT: or %o1, %o2, %o2
+; SPARC32-NEXT: srl %o0, 8, %o1
+; SPARC32-NEXT: and %o1, %o3, %o1
+; SPARC32-NEXT: srl %o0, 24, %o4
+; SPARC32-NEXT: or %o1, %o4, %o1
+; SPARC32-NEXT: and %o0, %o3, %o3
+; SPARC32-NEXT: sll %o3, 8, %o3
+; SPARC32-NEXT: sll %o0, 24, %o0
+; SPARC32-NEXT: or %o0, %o3, %o0
+; SPARC32-NEXT: or %o0, %o1, %o1
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: mov %o2, %o0
+;
+; SPARCEL-LABEL: u64_bswap:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: srl %o1, 8, %o2
+; SPARCEL-NEXT: sethi 63, %o3
+; SPARCEL-NEXT: or %o3, 768, %o3
+; SPARCEL-NEXT: and %o2, %o3, %o2
+; SPARCEL-NEXT: srl %o1, 24, %o4
+; SPARCEL-NEXT: or %o2, %o4, %o2
+; SPARCEL-NEXT: and %o1, %o3, %o4
+; SPARCEL-NEXT: sll %o4, 8, %o4
+; SPARCEL-NEXT: sll %o1, 24, %o1
+; SPARCEL-NEXT: or %o1, %o4, %o1
+; SPARCEL-NEXT: or %o1, %o2, %o2
+; SPARCEL-NEXT: srl %o0, 8, %o1
+; SPARCEL-NEXT: and %o1, %o3, %o1
+; SPARCEL-NEXT: srl %o0, 24, %o4
+; SPARCEL-NEXT: or %o1, %o4, %o1
+; SPARCEL-NEXT: and %o0, %o3, %o3
+; SPARCEL-NEXT: sll %o3, 8, %o3
+; SPARCEL-NEXT: sll %o0, 24, %o0
+; SPARCEL-NEXT: or %o0, %o3, %o0
+; SPARCEL-NEXT: or %o0, %o1, %o1
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: mov %o2, %o0
+;
+; SPARC64-LABEL: u64_bswap:
+; SPARC64: .register %g2, #scratch
+; SPARC64-NEXT: ! %bb.0:
+; SPARC64-NEXT: srlx %o0, 24, %o1
+; SPARC64-NEXT: sethi 16320, %o2
+; SPARC64-NEXT: and %o1, %o2, %o1
+; SPARC64-NEXT: srlx %o0, 8, %o3
+; SPARC64-NEXT: sethi 4177920, %o4
+; SPARC64-NEXT: and %o3, %o4, %o3
+; SPARC64-NEXT: or %o3, %o1, %o1
+; SPARC64-NEXT: srlx %o0, 40, %o3
+; SPARC64-NEXT: sethi 63, %o5
+; SPARC64-NEXT: or %o5, 768, %o5
+; SPARC64-NEXT: and %o3, %o5, %o3
+; SPARC64-NEXT: srlx %o0, 56, %g2
+; SPARC64-NEXT: or %o3, %g2, %o3
+; SPARC64-NEXT: or %o1, %o3, %o1
+; SPARC64-NEXT: and %o0, %o4, %o3
+; SPARC64-NEXT: sllx %o3, 8, %o3
+; SPARC64-NEXT: and %o0, %o2, %o2
+; SPARC64-NEXT: sllx %o2, 24, %o2
+; SPARC64-NEXT: or %o2, %o3, %o2
+; SPARC64-NEXT: and %o0, %o5, %o3
+; SPARC64-NEXT: sllx %o3, 40, %o3
+; SPARC64-NEXT: sllx %o0, 56, %o0
+; SPARC64-NEXT: or %o0, %o3, %o0
+; SPARC64-NEXT: or %o0, %o2, %o0
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: or %o0, %o1, %o0
+ %2 = tail call i64 @llvm.bswap.i64(i64 %0)
+ ret i64 %2
+}
+
+define i16 @u16_bswapload(ptr %0) #0 {
+; SPARC32-LABEL: u16_bswapload:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: lduh [%o0], %o0
+; SPARC32-NEXT: srl %o0, 8, %o1
+; SPARC32-NEXT: sll %o0, 8, %o0
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: or %o0, %o1, %o0
+;
+; SPARCEL-LABEL: u16_bswapload:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: lduh [%o0], %o0
+; SPARCEL-NEXT: srl %o0, 8, %o1
+; SPARCEL-NEXT: sll %o0, 8, %o0
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: or %o0, %o1, %o0
+;
+; SPARC64-LABEL: u16_bswapload:
+; SPARC64: ! %bb.0:
+; SPARC64-NEXT: lduh [%o0], %o0
+; SPARC64-NEXT: srl %o0, 8, %o1
+; SPARC64-NEXT: sll %o0, 8, %o0
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: or %o0, %o1, %o0
+ %2 = load i16, ptr %0, align 2
+ %3 = tail call i16 @llvm.bswap.i16(i16 %2)
+ ret i16 %3
+}
+
+define i32 @u32_bswapload(ptr %0) #0 {
+; SPARC32-LABEL: u32_bswapload:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: ld [%o0], %o0
+; SPARC32-NEXT: srl %o0, 8, %o1
+; SPARC32-NEXT: sethi 63, %o2
+; SPARC32-NEXT: or %o2, 768, %o2
+; SPARC32-NEXT: and %o1, %o2, %o1
+; SPARC32-NEXT: srl %o0, 24, %o3
+; SPARC32-NEXT: or %o1, %o3, %o1
+; SPARC32-NEXT: and %o0, %o2, %o2
+; SPARC32-NEXT: sll %o2, 8, %o2
+; SPARC32-NEXT: sll %o0, 24, %o0
+; SPARC32-NEXT: or %o0, %o2, %o0
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: or %o0, %o1, %o0
+;
+; SPARCEL-LABEL: u32_bswapload:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: ld [%o0], %o0
+; SPARCEL-NEXT: srl %o0, 8, %o1
+; SPARCEL-NEXT: sethi 63, %o2
+; SPARCEL-NEXT: or %o2, 768, %o2
+; SPARCEL-NEXT: and %o1, %o2, %o1
+; SPARCEL-NEXT: srl %o0, 24, %o3
+; SPARCEL-NEXT: or %o1, %o3, %o1
+; SPARCEL-NEXT: and %o0, %o2, %o2
+; SPARCEL-NEXT: sll %o2, 8, %o2
+; SPARCEL-NEXT: sll %o0, 24, %o0
+; SPARCEL-NEXT: or %o0, %o2, %o0
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: or %o0, %o1, %o0
+;
+; SPARC64-LABEL: u32_bswapload:
+; SPARC64: ! %bb.0:
+; SPARC64-NEXT: ld [%o0], %o0
+; SPARC64-NEXT: srl %o0, 8, %o1
+; SPARC64-NEXT: sethi 63, %o2
+; SPARC64-NEXT: or %o2, 768, %o2
+; SPARC64-NEXT: and %o1, %o2, %o1
+; SPARC64-NEXT: srl %o0, 24, %o3
+; SPARC64-NEXT: or %o1, %o3, %o1
+; SPARC64-NEXT: and %o0, %o2, %o2
+; SPARC64-NEXT: sll %o2, 8, %o2
+; SPARC64-NEXT: sll %o0, 24, %o0
+; SPARC64-NEXT: or %o0, %o2, %o0
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: or %o0, %o1, %o0
+ %2 = load i32, ptr %0, align 4
+ %3 = tail call i32 @llvm.bswap.i32(i32 %2)
+ ret i32 %3
+}
+
+define i64 @u64_bswapload(ptr %0) #0 {
+; SPARC32-LABEL: u64_bswapload:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: ldd [%o0], %o2
+; SPARC32-NEXT: srl %o3, 8, %o0
+; SPARC32-NEXT: sethi 63, %o1
+; SPARC32-NEXT: or %o1, 768, %o1
+; SPARC32-NEXT: and %o0, %o1, %o0
+; SPARC32-NEXT: srl %o3, 24, %o4
+; SPARC32-NEXT: or %o0, %o4, %o0
+; SPARC32-NEXT: and %o3, %o1, %o4
+; SPARC32-NEXT: sll %o4, 8, %o4
+; SPARC32-NEXT: sll %o3, 24, %o5
+; SPARC32-NEXT: or %o5, %o4, %o4
+; SPARC32-NEXT: or %o4, %o0, %o0
+; SPARC32-NEXT: srl %o2, 8, %o4
+; SPARC32-NEXT: and %o4, %o1, %o4
+; SPARC32-NEXT: srl %o2, 24, %o5
+; SPARC32-NEXT: or %o4, %o5, %o4
+; SPARC32-NEXT: and %o2, %o1, %o1
+; SPARC32-NEXT: sll %o1, 8, %o1
+; SPARC32-NEXT: sll %o2, 24, %o2
+; SPARC32-NEXT: or %o2, %o1, %o1
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: or %o1, %o4, %o1
+;
+; SPARCEL-LABEL: u64_bswapload:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: ldd [%o0], %o2
+; SPARCEL-NEXT: srl %o3, 8, %o0
+; SPARCEL-NEXT: sethi 63, %o1
+; SPARCEL-NEXT: or %o1, 768, %o1
+; SPARCEL-NEXT: and %o0, %o1, %o0
+; SPARCEL-NEXT: srl %o3, 24, %o4
+; SPARCEL-NEXT: or %o0, %o4, %o0
+; SPARCEL-NEXT: and %o3, %o1, %o4
+; SPARCEL-NEXT: sll %o4, 8, %o4
+; SPARCEL-NEXT: sll %o3, 24, %o5
+; SPARCEL-NEXT: or %o5, %o4, %o4
+; SPARCEL-NEXT: or %o4, %o0, %o0
+; SPARCEL-NEXT: srl %o2, 8, %o4
+; SPARCEL-NEXT: and %o4, %o1, %o4
+; SPARCEL-NEXT: srl %o2, 24, %o5
+; SPARCEL-NEXT: or %o4, %o5, %o4
+; SPARCEL-NEXT: and %o2, %o1, %o1
+; SPARCEL-NEXT: sll %o1, 8, %o1
+; SPARCEL-NEXT: sll %o2, 24, %o2
+; SPARCEL-NEXT: or %o2, %o1, %o1
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: or %o1, %o4, %o1
+;
+; SPARC64-LABEL: u64_bswapload:
+; SPARC64: .register %g2, #scratch
+; SPARC64-NEXT: ! %bb.0:
+; SPARC64-NEXT: ldx [%o0], %o0
+; SPARC64-NEXT: srlx %o0, 24, %o1
+; SPARC64-NEXT: sethi 16320, %o2
+; SPARC64-NEXT: and %o1, %o2, %o1
+; SPARC64-NEXT: srlx %o0, 8, %o3
+; SPARC64-NEXT: sethi 4177920, %o4
+; SPARC64-NEXT: and %o3, %o4, %o3
+; SPARC64-NEXT: or %o3, %o1, %o1
+; SPARC64-NEXT: srlx %o0, 40, %o3
+; SPARC64-NEXT: sethi 63, %o5
+; SPARC64-NEXT: or %o5, 768, %o5
+; SPARC64-NEXT: and %o3, %o5, %o3
+; SPARC64-NEXT: srlx %o0, 56, %g2
+; SPARC64-NEXT: or %o3, %g2, %o3
+; SPARC64-NEXT: or %o1, %o3, %o1
+; SPARC64-NEXT: and %o0, %o4, %o3
+; SPARC64-NEXT: sllx %o3, 8, %o3
+; SPARC64-NEXT: and %o0, %o2, %o2
+; SPARC64-NEXT: sllx %o2, 24, %o2
+; SPARC64-NEXT: or %o2, %o3, %o2
+; SPARC64-NEXT: and %o0, %o5, %o3
+; SPARC64-NEXT: sllx %o3, 40, %o3
+; SPARC64-NEXT: sllx %o0, 56, %o0
+; SPARC64-NEXT: or %o0, %o3, %o0
+; SPARC64-NEXT: or %o0, %o2, %o0
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: or %o0, %o1, %o0
+ %2 = load i64, ptr %0, align 8
+ %3 = tail call i64 @llvm.bswap.i64(i64 %2)
+ ret i64 %3
+}
+
+define void @u16_bswapstore(ptr %0, i16 %1) #0 {
+; SPARC32-LABEL: u16_bswapstore:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: sethi 63, %o2
+; SPARC32-NEXT: or %o2, 768, %o2
+; SPARC32-NEXT: and %o1, %o2, %o2
+; SPARC32-NEXT: srl %o2, 8, %o2
+; SPARC32-NEXT: sll %o1, 8, %o1
+; SPARC32-NEXT: or %o1, %o2, %o1
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: sth %o1, [%o0]
+;
+; SPARCEL-LABEL: u16_bswapstore:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: sethi 63, %o2
+; SPARCEL-NEXT: or %o2, 768, %o2
+; SPARCEL-NEXT: and %o1, %o2, %o2
+; SPARCEL-NEXT: srl %o2, 8, %o2
+; SPARCEL-NEXT: sll %o1, 8, %o1
+; SPARCEL-NEXT: or %o1, %o2, %o1
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: sth %o1, [%o0]
+;
+; SPARC64-LABEL: u16_bswapstore:
+; SPARC64: ! %bb.0:
+; SPARC64-NEXT: sethi 63, %o2
+; SPARC64-NEXT: or %o2, 768, %o2
+; SPARC64-NEXT: and %o1, %o2, %o2
+; SPARC64-NEXT: srl %o2, 8, %o2
+; SPARC64-NEXT: sll %o1, 8, %o1
+; SPARC64-NEXT: or %o1, %o2, %o1
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: sth %o1, [%o0]
+ %3 = tail call i16 @llvm.bswap.i16(i16 %1)
+ store i16 %3, ptr %0, align 2
+ ret void
+}
+
+define void @u32_bswapstore(ptr %0, i32 %1) #0 {
+; SPARC32-LABEL: u32_bswapstore:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: srl %o1, 8, %o2
+; SPARC32-NEXT: sethi 63, %o3
+; SPARC32-NEXT: or %o3, 768, %o3
+; SPARC32-NEXT: and %o2, %o3, %o2
+; SPARC32-NEXT: srl %o1, 24, %o4
+; SPARC32-NEXT: or %o2, %o4, %o2
+; SPARC32-NEXT: and %o1, %o3, %o3
+; SPARC32-NEXT: sll %o3, 8, %o3
+; SPARC32-NEXT: sll %o1, 24, %o1
+; SPARC32-NEXT: or %o1, %o3, %o1
+; SPARC32-NEXT: or %o1, %o2, %o1
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: st %o1, [%o0]
+;
+; SPARCEL-LABEL: u32_bswapstore:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: srl %o1, 8, %o2
+; SPARCEL-NEXT: sethi 63, %o3
+; SPARCEL-NEXT: or %o3, 768, %o3
+; SPARCEL-NEXT: and %o2, %o3, %o2
+; SPARCEL-NEXT: srl %o1, 24, %o4
+; SPARCEL-NEXT: or %o2, %o4, %o2
+; SPARCEL-NEXT: and %o1, %o3, %o3
+; SPARCEL-NEXT: sll %o3, 8, %o3
+; SPARCEL-NEXT: sll %o1, 24, %o1
+; SPARCEL-NEXT: or %o1, %o3, %o1
+; SPARCEL-NEXT: or %o1, %o2, %o1
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: st %o1, [%o0]
+;
+; SPARC64-LABEL: u32_bswapstore:
+; SPARC64: ! %bb.0:
+; SPARC64-NEXT: srl %o1, 8, %o2
+; SPARC64-NEXT: sethi 63, %o3
+; SPARC64-NEXT: or %o3, 768, %o3
+; SPARC64-NEXT: and %o2, %o3, %o2
+; SPARC64-NEXT: srl %o1, 24, %o4
+; SPARC64-NEXT: or %o2, %o4, %o2
+; SPARC64-NEXT: and %o1, %o3, %o3
+; SPARC64-NEXT: sll %o3, 8, %o3
+; SPARC64-NEXT: sll %o1, 24, %o1
+; SPARC64-NEXT: or %o1, %o3, %o1
+; SPARC64-NEXT: or %o1, %o2, %o1
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: st %o1, [%o0]
+ %3 = tail call i32 @llvm.bswap.i32(i32 %1)
+ store i32 %3, ptr %0, align 4
+ ret void
+}
+
+define void @u64_bswapstore(ptr %0, i64 %1) #0 {
+; SPARC32-LABEL: u64_bswapstore:
+; SPARC32: ! %bb.0:
+; SPARC32-NEXT: srl %o1, 8, %o3
+; SPARC32-NEXT: sethi 63, %o4
+; SPARC32-NEXT: or %o4, 768, %o4
+; SPARC32-NEXT: and %o3, %o4, %o3
+; SPARC32-NEXT: srl %o1, 24, %o5
+; SPARC32-NEXT: or %o3, %o5, %o3
+; SPARC32-NEXT: and %o1, %o4, %o5
+; SPARC32-NEXT: sll %o5, 8, %o5
+; SPARC32-NEXT: sll %o1, 24, %o1
+; SPARC32-NEXT: or %o1, %o5, %o1
+; SPARC32-NEXT: or %o1, %o3, %g3
+; SPARC32-NEXT: srl %o2, 8, %o1
+; SPARC32-NEXT: and %o1, %o4, %o1
+; SPARC32-NEXT: srl %o2, 24, %o3
+; SPARC32-NEXT: or %o1, %o3, %o1
+; SPARC32-NEXT: and %o2, %o4, %o3
+; SPARC32-NEXT: sll %o3, 8, %o3
+; SPARC32-NEXT: sll %o2, 24, %o2
+; SPARC32-NEXT: or %o2, %o3, %o2
+; SPARC32-NEXT: or %o2, %o1, %g2
+; SPARC32-NEXT: retl
+; SPARC32-NEXT: std %g2, [%o0]
+;
+; SPARCEL-LABEL: u64_bswapstore:
+; SPARCEL: ! %bb.0:
+; SPARCEL-NEXT: srl %o1, 8, %o3
+; SPARCEL-NEXT: sethi 63, %o4
+; SPARCEL-NEXT: or %o4, 768, %o4
+; SPARCEL-NEXT: and %o3, %o4, %o3
+; SPARCEL-NEXT: srl %o1, 24, %o5
+; SPARCEL-NEXT: or %o3, %o5, %o3
+; SPARCEL-NEXT: and %o1, %o4, %o5
+; SPARCEL-NEXT: sll %o5, 8, %o5
+; SPARCEL-NEXT: sll %o1, 24, %o1
+; SPARCEL-NEXT: or %o1, %o5, %o1
+; SPARCEL-NEXT: or %o1, %o3, %g3
+; SPARCEL-NEXT: srl %o2, 8, %o1
+; SPARCEL-NEXT: and %o1, %o4, %o1
+; SPARCEL-NEXT: srl %o2, 24, %o3
+; SPARCEL-NEXT: or %o1, %o3, %o1
+; SPARCEL-NEXT: and %o2, %o4, %o3
+; SPARCEL-NEXT: sll %o3, 8, %o3
+; SPARCEL-NEXT: sll %o2, 24, %o2
+; SPARCEL-NEXT: or %o2, %o3, %o2
+; SPARCEL-NEXT: or %o2, %o1, %g2
+; SPARCEL-NEXT: retl
+; SPARCEL-NEXT: std %g2, [%o0]
+;
+; SPARC64-LABEL: u64_bswapstore:
+; SPARC64: .register %g2, #scratch
+; SPARC64-NEXT: .register %g3, #scratch
+; SPARC64-NEXT: ! %bb.0:
+; SPARC64-NEXT: srlx %o1, 24, %o2
+; SPARC64-NEXT: sethi 16320, %o3
+; SPARC64-NEXT: and %o2, %o3, %o2
+; SPARC64-NEXT: srlx %o1, 8, %o4
+; SPARC64-NEXT: sethi 4177920, %o5
+; SPARC64-NEXT: and %o4, %o5, %o4
+; SPARC64-NEXT: or %o4, %o2, %o2
+; SPARC64-NEXT: srlx %o1, 40, %o4
+; SPARC64-NEXT: sethi 63, %g2
+; SPARC64-NEXT: or %g2, 768, %g2
+; SPARC64-NEXT: and %o4, %g2, %o4
+; SPARC64-NEXT: srlx %o1, 56, %g3
+; SPARC64-NEXT: or %o4, %g3, %o4
+; SPARC64-NEXT: or %o2, %o4, %o2
+; SPARC64-NEXT: and %o1, %o5, %o4
+; SPARC64-NEXT: sllx %o4, 8, %o4
+; SPARC64-NEXT: and %o1, %o3, %o3
+; SPARC64-NEXT: sllx %o3, 24, %o3
+; SPARC64-NEXT: or %o3, %o4, %o3
+; SPARC64-NEXT: and %o1, %g2, %o4
+; SPARC64-NEXT: sllx %o4, 40, %o4
+; SPARC64-NEXT: sllx %o1, 56, %o1
+; SPARC64-NEXT: or %o1, %o4, %o1
+; SPARC64-NEXT: or %o1, %o3, %o1
+; SPARC64-NEXT: or %o1, %o2, %o1
+; SPARC64-NEXT: retl
+; SPARC64-NEXT: stx %o1, [%o0]
+ %3 = tail call i64 @llvm.bswap.i64(i64 %1)
+ store i64 %3, ptr %0, align 8
+ ret void
+}
+
+attributes #0 = { nounwind }
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